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Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.N1213 | 55 | ||||
| -rw-r--r-- | doc/README.NDS32 | 41 | ||||
| -rw-r--r-- | doc/README.ag101 | 74 | ||||
| -rw-r--r-- | doc/README.standalone | 1 |
4 files changed, 171 insertions, 0 deletions
diff --git a/doc/README.N1213 b/doc/README.N1213 new file mode 100644 index 0000000..e107166 --- /dev/null +++ b/doc/README.N1213 @@ -0,0 +1,55 @@ +N1213 is a configurable hard/soft core of NDS32's N12 CPU family. + +Features +======== + +CPU Core + - 16-/32-bit mixable instruction format. + - 32 general-purpose 32-bit registers. + - 8-stage pipeline. + - Dynamic branch prediction. + - 32/64/128/256 BTB. + - Return address stack (RAS). + - Vector interrupts for internal/external. + interrupt controller with 6 hardware interrupt signals. + - 3 HW-level nested interruptions. + - User and super-user mode support. + - Memory-mapped I/O. + - Address space up to 4GB. + +Memory Management Unit + - TLB + - 4/8-entry fully associative iTLB/dTLB. + - 32/64/128-entry 4-way set-associati.ve main TLB. + - TLB locking support + - Optional hardware page table walker. + - Two groups of page size support. + - 4KB & 1MB. + - 8KB & 1MB. + +Memory Subsystem + - I & D cache. + - Virtually indexed and physically tagged. + - Cache size: 8KB/16KB/32KB/64KB. + - Cache line size: 16B/32B. + - Set associativity: 2-way, 4-way or direct-mapped. + - Cache locking support. + - I & D local memory (LM). + - Size: 4KB to 1MB. + - Bank numbers: 1 or 2. + - Optional 1D/2D DMA engine. + - Internal or external to CPU core. + +Bus Interface + - Synchronous/Asynchronous AHB bus: 0, 1 or 2 ports. + - Synchronous High speed memory port. + (HSMP): 0, 1 or 2 ports. + +Debug + - JTAG debug interface. + - Embedded debug module (EDM). + - Optional embedded program tracer interface. + +Miscellaneous + - Programmable data endian control. + - Performance monitoring mechanism. diff --git a/doc/README.NDS32 b/doc/README.NDS32 new file mode 100644 index 0000000..b2b58fc --- /dev/null +++ b/doc/README.NDS32 @@ -0,0 +1,41 @@ +NDS32 is a new high-performance 32-bit RISC microprocessor core. + +http://www.andestech.com/ + +AndeStar ISA +============ +AndeStar is a patent-pending 16-bit/32-bit mixed-length instruction set to +achieve optimal system performance, code density, and power efficiency. + +It contains the following features: + - Intermixable 32-bit and 16-bit instruction sets without the need for + mode switch. + - 16-bit instructions as a frequently used subset of 32-bit instructions. + - RISC-style register-based instruction set. + - 32 32-bit General Purpose Registers (GPR). + - Upto 1024 User Special Registers (USR) for existing and extension + instructions. + - Rich load/store instructions for... + - Single memory access with base address update. + - Multiple aligned and unaligned memory accesses for memory copy and stack + operations. + - Data prefetch to improve data cache performance. + - Non-bus locking synchronization instructions. + - PC relative jump and PC read instructions for efficient position independent + code. + - Multiply-add and multiple-sub with 64-bit accumulator. + - Instruction for efficient power management. + - Bi-endian support. + - Three instruction extension space for application acceleration: + - Performance extension. + - Andes future extensions (for floating-point, multimedia, etc.) + - Customer extensions. + +AndesCore CPU +============= +Andes Technology has 4 families of CPU cores: N12, N10, N9, N8. + +For details about N12 CPU family, please check doc/README.N1213. + +The NDS32 ports of u-boot, the Linux kernel, the GNU toolchain and +other associated software are actively supported by Andes Technology Corporation. diff --git a/doc/README.ag101 b/doc/README.ag101 new file mode 100644 index 0000000..46fc637 --- /dev/null +++ b/doc/README.ag101 @@ -0,0 +1,74 @@ +Andes Technology SoC AG101 +========================== + +AG101 is the first SoC produced by Andes Technology using N1213 CPU core. +AG101 has integrated both AHB and APB bus and many periphals for application +and product development. + +ADP-AG101 +========= + +ADP-AG101 is the SoC with AG101 hardcore CPU. + +Please check http://www.andestech.com/p2-4.htm for detail of this SoC. + +Configurations +============== + +CONFIG_MEM_REMAP: + Doing memory remap is essential for preparing some non-OS or RTOS + applications. + + This is also a must on ADP-AG101 board. + (While other boards may not have this problem). + + The reason is because the ROM/FLASH circuit on PCB board. + AG101-A0 board has 2 jumpers MA17 and SW5 to configure which + ROM/FLASH is used to boot. + + When SW5 = "0101", MA17 = LO, the ROM is connected to BANK0, + and the FLASH is connected to BANK1. + When SW5 = "1010", MA17 = HI, the ROM is disabled (still at BANK0), + and the FLASH is connected to BANK0. + It will occur problem when doing flash probing if the flash is at + BANK0 (0x00000000) while memory remapping was skipped. + + Other board like ADP-AG101P may not enable this since there is only + a FLASH connected to bank0. + +CONFIG_SKIP_LOWLEVEL_INIT: + If you want to boot this system from FLASH and bypass e-bios (the + other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT + in "include/configs/adp-ag101.h". + +Build and boot steps +==================== + +build: +1. Prepare the toolchains and make sure the $PATH to toolchains is correct. +2. Use `make adp-ag101` in u-boot root to build the image. + +burn u-boot to flash: +1. Make sure the MA17 (J16) is Lo. +2. Make sure the dip switch SW5 is set to "0101". +3. Power On. Press button "S1", then press button "SW1", then you will found the + debug LED show 67 means the system successfully booted into e-bios. + Now you can control the e-bios boot loader from your console. +4. Under "Command>>" prompt, enter "97" (CopyImageFromCard) +5. Under "Type Dir Name of [CF/SD] =>" promtp, enter "c". +6. Under "Enter Filename =>" prompt, enter the file name of u-boot image you + just build. It is usually "u-boot.bin". +7. Under "Enter Dest. Address =>" prompt, enter the memory address where you + want to put the binary from SD card to RAM. + Address "0x500000" is our suggestion. +8. Under "Command>>" prompt again, enter "55" (CLI) to use interactive command + environment. +9. Under "CLI>" prompt, enter "burn 0x500000 0x80400000 0x30000" to burn the + binary from RAM to FLASH. +10. Under "CLI>" prompt, enter "exit" to finish the burn process. + +boot u-boot from flash: +1. Make sure the MA17 (J16) is Hi). +2. Make sure the dip switch SW5 is set to "1010". +3. Power On. Press button "S1", then you will see the debug LED count to 20. +4. Now you can use u-boot on ADP-AG101 board. diff --git a/doc/README.standalone b/doc/README.standalone index 6e6b65f..2be5f27 100644 --- a/doc/README.standalone +++ b/doc/README.standalone @@ -56,6 +56,7 @@ Design Notes on Exporting U-Boot Functions to Standalone Applications: ARM 0x0c100000 0x0c100000 MIPS 0x80200000 0x80200000 Blackfin 0x00001000 0x00001000 + NDS32 0x00300000 0x00300000 Nios II 0x02000000 0x02000000 For example, the "hello world" application may be loaded and |