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diff --git a/doc/README.imx5 b/doc/README.imx5
index f7eab7d..e08941e 100644
--- a/doc/README.imx5
+++ b/doc/README.imx5
@@ -15,3 +15,8 @@ i.MX5x SoCs.
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
+
+1.2 CONFIG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup.
+ This option should be enabled for boards having a SYS_ON_OFF_CTL signal
+ connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
+ reference designs.