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Diffstat (limited to 'doc/README.SBC8560')
| -rw-r--r-- | doc/README.SBC8560 | 48 |
1 files changed, 25 insertions, 23 deletions
diff --git a/doc/README.SBC8560 b/doc/README.SBC8560 index 83f2640..c4b6422 100644 --- a/doc/README.SBC8560 +++ b/doc/README.SBC8560 @@ -1,49 +1,52 @@ -The port was tested on Wind River System Sbc8560 board <www.windriver.com>. U-Boot was -installed on the flash memory of the CPU card (no the SODIMM). +The port was tested on Wind River System Sbc8560 board +<www.windriver.com>. U-Boot was installed on the flash memory of the +CPU card (no the SODIMM). -NOTE: Please configure uboot compile to the proper PCI frequency and setup the -appropriate DIP switch settings. +NOTE: Please configure uboot compile to the proper PCI frequency and +setup the appropriate DIP switch settings. SBC8560 board: -Make sure boards switches are set to their appropriate conditions. Refer -to the Engineering Reference Guide ERG-00300-002. Of particular -importance are: 1)Tthe settings for JP4 (JP4 1-3 and 2-4), which select -the on-board FLASH device (Intel 28F128Jx); 2) The settings for the Clock SW9 (33 MHz -or 66 MHz). +Make sure boards switches are set to their appropriate conditions. +Refer to the Engineering Reference Guide ERG-00300-002. Of particular +importance are: 1) the settings for JP4 (JP4 1-3 and 2-4), which +select the on-board FLASH device (Intel 28F128Jx); 2) The settings +for the Clock SW9 (33 MHz or 66 MHz). - Note: SW9 Settings: 66 MHz - 4:1 ratio CCB clocks:SYSCLK + Note: SW9 Settings: 66 MHz + 4:1 ratio CCB clocks:SYSCLK 3:1 ration e500 Core:CCB pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on - Note: SW9 Settings: 33 MHz + Note: SW9 Settings: 33 MHz 8:1 ratio CCB clocks:SYSCLK 3:1 ration e500 Core:CCB pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on - + Flashing the FLASH device with the "Wind River ICE": -1) Properly connect and configure the Wind River ICE to the - target JTAG port. This includes running the SBC8560 register script. - Make sure target memory can be read and written. +1) Properly connect and configure the Wind River ICE to the target + JTAG port. This includes running the SBC8560 register script. Make + sure target memory can be read and written. 2) Build the u-boot image: make distclean make SBC8560_66_config or SBC8560_33_config make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all - Note: reference is made to the ELDK3.0 compiler. Further, it seems the ppc_8xx compiler is - required for the 85xx (no 85xx designated compiler in ELDK3.0) + Note: reference is made to the ELDK3.0 compiler. Further, it seems + the ppc_8xx compiler is required for the 85xx (no 85xx + designated compiler in ELDK3.0) -3) Convert the uboot (.elf) file to a uboot.bin file (using visionClick converter). - The bin file should be converted from fffc0000 to ffffffff +3) Convert the uboot (.elf) file to a uboot.bin file (using + visionClick converter). The bin file should be converted from + fffc0000 to ffffffff 4) Setup the Flash Utility (tools menu) for: - + Do a "dc clr" [visionClick] to load the default register settings Determine the clock speed of the PCI bus and set SW9 accordingly - Note: the speed of the PCI bus defaults to the slowest PCI card + Note: the speed of the PCI bus defaults to the slowest PCI card PlayBack the "default" register file for the SBC8560 Select the uboot.bin file with zero bias Select the initialize Target prior to programming @@ -52,4 +55,3 @@ Flashing the FLASH device with the "Wind River ICE": Select the start address from 0 with size of 4000 5) Erase and Program - |