diff options
Diffstat (limited to 'cpu')
73 files changed, 397 insertions, 761 deletions
diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S index b5484e3..792cd30 100644 --- a/cpu/74xx_7xx/start.S +++ b/cpu/74xx_7xx/start.S @@ -34,6 +34,7 @@ */ #include <config.h> #include <74xx_7xx.h> +#include <timestamp.h> #include <version.h> #include <ppc_asm.tmpl> @@ -87,7 +88,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/arm720t/config.mk b/cpu/arm720t/config.mk index 641b91c..3cae1dc 100644 --- a/cpu/arm720t/config.mk +++ b/cpu/arm720t/config.mk @@ -32,4 +32,5 @@ PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c index b68c5dd..9fd72d3 100644 --- a/cpu/arm920t/at91rm9200/i2c.c +++ b/cpu/arm920t/at91rm9200/i2c.c @@ -189,20 +189,6 @@ i2c_init(int speed, int slaveaddr) return; } -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - unsigned char buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return(buf); -} - -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - int i2c_set_bus_speed(unsigned int speed) { return -1; diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/cpu/arm920t/at91rm9200/lowlevel_init.S index 66b07da..0913284 100644 --- a/cpu/arm920t/at91rm9200/lowlevel_init.S +++ b/cpu/arm920t/at91rm9200/lowlevel_init.S @@ -38,33 +38,7 @@ * turn is based on the boot.bin code from ATMEL * */ - -/* flash */ -#define MC_PUIA 0xFFFFFF10 -#define MC_PUP 0xFFFFFF50 -#define MC_PUER 0xFFFFFF54 -#define MC_ASR 0xFFFFFF04 -#define MC_AASR 0xFFFFFF08 -#define EBI_CFGR 0xFFFFFF64 -#define SMC_CSR0 0xFFFFFF70 - -/* clocks */ -#define PLLAR 0xFFFFFC28 -#define PLLBR 0xFFFFFC2C -#define MCKR 0xFFFFFC30 - -#define AT91C_BASE_CKGR 0xFFFFFC20 -#define CKGR_MOR 0 - -/* sdram */ -#define PIOC_ASR 0xFFFFF870 -#define PIOC_BSR 0xFFFFF874 -#define PIOC_PDR 0xFFFFF804 -#define EBI_CSA 0xFFFFFF60 -#define SDRC_CR 0xFFFFFF98 -#define SDRC_MR 0xFFFFFF90 -#define SDRC_TR 0xFFFFFF94 - +#include <asm/arch/AT91RM9200.h> _MTEXT_BASE: #undef START_FROM_MEM @@ -84,7 +58,7 @@ lowlevel_init: #else ldr r0, =0x0000FF00 /* Disable main oscillator, OSCOUNT = 0xFF */ #endif - str r0, [r1, #CKGR_MOR] + str r0, [r1, #AT91C_CKGR_MOR] /* Add loop to compensate Main Oscillator startup time */ ldr r0, =0x00000010 LoopOsc: @@ -134,72 +108,72 @@ LoopOsc: .ltorg SMRDATA: - .word MC_PUIA - .word MC_PUIA_VAL - .word MC_PUP - .word MC_PUP_VAL - .word MC_PUER - .word MC_PUER_VAL - .word MC_ASR - .word MC_ASR_VAL - .word MC_AASR - .word MC_AASR_VAL - .word EBI_CFGR - .word EBI_CFGR_VAL - .word SMC_CSR0 - .word SMC_CSR0_VAL - .word PLLAR - .word PLLAR_VAL - .word PLLBR - .word PLLBR_VAL - .word MCKR - .word MCKR_VAL + .word AT91C_MC_PUIA + .word CONFIG_SYS_MC_PUIA_VAL + .word AT91C_MC_PUP + .word CONFIG_SYS_MC_PUP_VAL + .word AT91C_MC_PUER + .word CONFIG_SYS_MC_PUER_VAL + .word AT91C_MC_ASR + .word CONFIG_SYS_MC_ASR_VAL + .word AT91C_MC_AASR + .word CONFIG_SYS_MC_AASR_VAL + .word AT91C_EBI_CFGR + .word CONFIG_SYS_EBI_CFGR_VAL + .word AT91C_SMC_CSR0 + .word CONFIG_SYS_SMC_CSR0_VAL + .word AT91C_PLLAR + .word CONFIG_SYS_PLLAR_VAL + .word AT91C_PLLBR + .word CONFIG_SYS_PLLBR_VAL + .word AT91C_MCKR + .word CONFIG_SYS_MCKR_VAL /* SMRDATA is 80 bytes long */ /* here there's a delay of 100 */ SMRDATA1: - .word PIOC_ASR - .word PIOC_ASR_VAL - .word PIOC_BSR - .word PIOC_BSR_VAL - .word PIOC_PDR - .word PIOC_PDR_VAL - .word EBI_CSA - .word EBI_CSA_VAL - .word SDRC_CR - .word SDRC_CR_VAL - .word SDRC_MR - .word SDRC_MR_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRC_MR - .word SDRC_MR_VAL1 - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRC_MR - .word SDRC_MR_VAL2 - .word SDRAM1 - .word SDRAM_VAL - .word SDRC_TR - .word SDRC_TR_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRC_MR - .word SDRC_MR_VAL3 - .word SDRAM - .word SDRAM_VAL + .word AT91C_PIOC_ASR + .word CONFIG_SYS_PIOC_ASR_VAL + .word AT91C_PIOC_BSR + .word CONFIG_SYS_PIOC_BSR_VAL + .word AT91C_PIOC_PDR + .word CONFIG_SYS_PIOC_PDR_VAL + .word AT91C_EBI_CSA + .word CONFIG_SYS_EBI_CSA_VAL + .word AT91C_SDRC_CR + .word CONFIG_SYS_SDRC_CR_VAL + .word AT91C_SDRC_MR + .word CONFIG_SYS_SDRC_MR_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word AT91C_SDRC_MR + .word CONFIG_SYS_SDRC_MR_VAL1 + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word AT91C_SDRC_MR + .word CONFIG_SYS_SDRC_MR_VAL2 + .word CONFIG_SYS_SDRAM1 + .word CONFIG_SYS_SDRAM_VAL + .word AT91C_SDRC_TR + .word CONFIG_SYS_SDRC_TR_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word AT91C_SDRC_MR + .word CONFIG_SYS_SDRC_MR_VAL3 + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL /* SMRDATA1 is 176 bytes long */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/cpu/arm920t/config.mk b/cpu/arm920t/config.mk index 8db4adb..38718a3 100644 --- a/cpu/arm920t/config.mk +++ b/cpu/arm920t/config.mk @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv4 # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 17977c2..fbcfe6d 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -24,7 +24,6 @@ * MA 02111-1307 USA */ - #include <config.h> #include <version.h> #include <status_led.h> @@ -119,7 +118,7 @@ start_code: bl coloured_LED_init bl red_LED_on -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) +#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) /* * relocate exception table */ @@ -178,8 +177,6 @@ copyex: bl cpu_init_crit #endif -#ifndef CONFIG_AT91RM9200 - #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -198,7 +195,7 @@ copy_loop: cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ -#endif + /* Set up the stack */ stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ @@ -261,7 +258,7 @@ cpu_init_crit: * find a lowlevel_init.S in your board directory. */ mov ip, lr -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) +#if defined(CONFIG_AT91RM9200EK) #else bl lowlevel_init diff --git a/cpu/arm925t/config.mk b/cpu/arm925t/config.mk index 8db4adb..38718a3 100644 --- a/cpu/arm925t/config.mk +++ b/cpu/arm925t/config.mk @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv4 # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/arm926ejs/at91/config.mk b/cpu/arm926ejs/at91/config.mk index 31491a8..06177e6 100644 --- a/cpu/arm926ejs/at91/config.mk +++ b/cpu/arm926ejs/at91/config.mk @@ -1,3 +1,2 @@ -PLATFORM_CPPFLAGS += -march=armv5te PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) LDSCRIPT := $(SRCTREE)/cpu/arm926ejs/at91/u-boot.lds diff --git a/cpu/arm926ejs/at91/usb.c b/cpu/arm926ejs/at91/usb.c index 7cb082d..a15ab16 100644 --- a/cpu/arm926ejs/at91/usb.c +++ b/cpu/arm926ejs/at91/usb.c @@ -31,6 +31,15 @@ int usb_cpu_init(void) { + +#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ + defined(CONFIG_AT91SAM9263) + /* Enable PLLB */ + at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB); + while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) + ; +#endif + /* Enable USB host clock. */ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP); #ifdef CONFIG_AT91SAM9261 @@ -51,6 +60,15 @@ int usb_cpu_stop(void) #else at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP); #endif + +#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ + defined(CONFIG_AT91SAM9263) + /* Disable PLLB */ + at91_sys_write(AT91_CKGR_PLLBR, 0); + while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0) + ; +#endif + return 0; } diff --git a/cpu/arm926ejs/config.mk b/cpu/arm926ejs/config.mk index 8db4adb..a57d03a 100644 --- a/cpu/arm926ejs/config.mk +++ b/cpu/arm926ejs/config.mk @@ -24,11 +24,12 @@ PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ -msoft-float -PLATFORM_CPPFLAGS += -march=armv4 +PLATFORM_CPPFLAGS += -march=armv5te # ========================================================================= # # Supply options according to compiler version # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/arm926ejs/davinci/i2c.c b/cpu/arm926ejs/davinci/i2c.c index d220a4c..3ba20ef 100644 --- a/cpu/arm926ejs/davinci/i2c.c +++ b/cpu/arm926ejs/davinci/i2c.c @@ -331,21 +331,4 @@ int i2c_write(u_int8_t chip, u_int32_t addr, int alen, u_int8_t *buf, int len) return(0); } - -u_int8_t i2c_reg_read(u_int8_t chip, u_int8_t reg) -{ - u_int8_t tmp; - - i2c_read(chip, reg, 1, &tmp, 1); - return(tmp); -} - - -void i2c_reg_write(u_int8_t chip, u_int8_t reg, u_int8_t val) -{ - u_int8_t tmp; - - i2c_write(chip, reg, 1, &tmp, 1); -} - #endif /* CONFIG_DRIVER_DAVINCI_I2C */ diff --git a/cpu/arm946es/config.mk b/cpu/arm946es/config.mk index f774c7e..6190e16 100644 --- a/cpu/arm946es/config.mk +++ b/cpu/arm946es/config.mk @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv4 # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/arm_intcm/config.mk b/cpu/arm_intcm/config.mk index f774c7e..6190e16 100644 --- a/cpu/arm_intcm/config.mk +++ b/cpu/arm_intcm/config.mk @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv4 # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/blackfin/i2c.c b/cpu/blackfin/i2c.c index 60f03d4..2a3e223 100644 --- a/cpu/blackfin/i2c.c +++ b/cpu/blackfin/i2c.c @@ -425,20 +425,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) } -uchar i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - PRINTD("i2c_reg_read: chip=0x%02x, reg=0x%02x\n", chip, reg); - i2c_read(chip, reg, 0, &buf, 1); - return (buf); -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - PRINTD("i2c_reg_write: chip=0x%02x, reg=0x%02x, val=0x%02x\n", chip, - reg, val); - i2c_write(chip, reg, 0, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/i386/sc520.c b/cpu/i386/sc520.c index 8bcb979..cb6bc03 100644 --- a/cpu/i386/sc520.c +++ b/cpu/i386/sc520.c @@ -32,7 +32,7 @@ #include <config.h> #include <pci.h> #ifdef CONFIG_SC520_SSI -#include <ssi.h> +#include <asm/ic/ssi.h> #endif #include <asm/io.h> #include <asm/pci.h> diff --git a/cpu/leon2/start.S b/cpu/leon2/start.S index 9b5d83e..b1f1eb5 100644 --- a/cpu/leon2/start.S +++ b/cpu/leon2/start.S @@ -27,6 +27,7 @@ #include <asm/psr.h> #include <asm/stack.h> #include <asm/leon.h> +#include <timestamp.h> #include <version.h> /* Entry for traps which jump to a programmer-specified trap handler. */ @@ -199,7 +200,7 @@ _trap_table: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .section ".text" diff --git a/cpu/leon3/start.S b/cpu/leon3/start.S index 7afe10e..bd634bd 100644 --- a/cpu/leon3/start.S +++ b/cpu/leon3/start.S @@ -27,6 +27,7 @@ #include <asm/psr.h> #include <asm/stack.h> #include <asm/leon.h> +#include <timestamp.h> #include <version.h> /* Entry for traps which jump to a programmer-specified trap handler. */ @@ -200,7 +201,7 @@ _trap_table: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .section ".text" diff --git a/cpu/lh7a40x/config.mk b/cpu/lh7a40x/config.mk index 10e755b..32fd1d1 100644 --- a/cpu/lh7a40x/config.mk +++ b/cpu/lh7a40x/config.mk @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv4 # # ======================================================================== PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/mcf5227x/start.S b/cpu/mcf5227x/start.S index 9387250..0c9c89c 100644 --- a/cpu/mcf5227x/start.S +++ b/cpu/mcf5227x/start.S @@ -22,6 +22,7 @@ */ #include <config.h> +#include <timestamp.h> #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -591,6 +592,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf523x/start.S b/cpu/mcf523x/start.S index b70b83b..d44da37 100644 --- a/cpu/mcf523x/start.S +++ b/cpu/mcf523x/start.S @@ -22,6 +22,7 @@ */ #include <config.h> +#include <timestamp.h> #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -336,6 +337,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 18308c8..66f9164 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -131,7 +131,7 @@ void cpu_init_f(void) mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */ mbar2_writeByte(MCFSIM_SPURVEC, 0x00); - /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */ + /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */ /* FlexBus Chipselect */ init_fbcs(); diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index da45bcb..ba6b884 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -22,6 +22,7 @@ */ #include <config.h> +#include <timestamp.h> #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -474,6 +475,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 8fa605a..a46c47a 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -25,6 +25,7 @@ */ #include <config.h> +#include <timestamp.h> #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -342,6 +343,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S index 61e43ff..d5a7f93 100644 --- a/cpu/mcf5445x/start.S +++ b/cpu/mcf5445x/start.S @@ -22,6 +22,7 @@ */ #include <config.h> +#include <timestamp.h> #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -627,6 +628,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf547x_8x/start.S b/cpu/mcf547x_8x/start.S index 41fc694..94ef14b 100644 --- a/cpu/mcf547x_8x/start.S +++ b/cpu/mcf547x_8x/start.S @@ -22,6 +22,7 @@ */ #include <config.h> +#include <timestamp.h> #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -357,6 +358,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mips/start.S b/cpu/mips/start.S index 6a22302..57db589 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -243,9 +243,11 @@ reset: mtc0 zero, CP0_COUNT mtc0 zero, CP0_COMPARE +#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) /* CONFIG0 register */ li t0, CONF_CM_UNCACHED mtc0 t0, CP0_CONFIG +#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */ /* Initialize $gp. */ @@ -255,6 +257,7 @@ reset: 1: lw gp, 0(ra) +#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) /* Initialize any external memory. */ la t9, lowlevel_init @@ -271,6 +274,7 @@ reset: */ li t0, CONF_CM_CACHABLE_NONCOHERENT mtc0 t0, CP0_CONFIG +#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */ /* Set up temporary stack. */ @@ -307,6 +311,7 @@ relocate_code: la t3, in_ram lw t2, -12(t3) /* t2 <-- uboot_end_data */ move t1, a2 + move s2, a2 /* s2 <-- destination address */ /* * Fix $gp: @@ -316,13 +321,21 @@ relocate_code: move t6, gp sub gp, CONFIG_SYS_MONITOR_BASE add gp, a2 /* gp now adjusted */ - sub t6, gp, t6 /* t6 <-- relocation offset */ + sub s1, gp, t6 /* s1 <-- relocation offset */ /* * t0 = source address * t1 = target address * t2 = source end address */ + + /* + * Save destination address and size for later usage in flush_cache() + */ + move s0, a1 /* save gd in s0 */ + move a0, t1 /* a0 <-- destination addr */ + sub a1, t2, t0 /* a1 <-- size */ + /* On the purple board we copy the code earlier in a special way * in order to solve flash problems */ @@ -338,9 +351,14 @@ relocate_code: /* If caches were enabled, we would have to flush them here. */ + /* a0 & a1 are already set up for flush_cache(start, size) */ + la t9, flush_cache + jalr t9 + nop + /* Jump to where we've relocated ourselves. */ - addi t0, a2, in_ram - _start + addi t0, s2, in_ram - _start jr t0 nop @@ -367,7 +385,7 @@ in_ram: 1: lw t1, 0(t4) beqz t1, 2f - add t1, t6 + add t1, s1 sw t1, 0(t4) 2: addi t2, 1 @@ -378,8 +396,8 @@ in_ram: */ lw t1, -12(t0) /* t1 <-- uboot_end_data */ lw t2, -8(t0) /* t2 <-- uboot_end */ - add t1, t6 /* adjust pointers */ - add t2, t6 + add t1, s1 /* adjust pointers */ + add t2, s1 sub t1, 4 1: @@ -387,10 +405,10 @@ in_ram: bltl t1, t2, 1b sw zero, 0(t1) /* delay slot */ - move a0, a1 + move a0, s0 /* a0 <-- gd */ la t9, board_init_r jr t9 - move a1, a2 /* delay slot */ + move a1, s2 /* delay slot */ .end relocate_code diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c index 77a6f0d..4f6bc86 100644 --- a/cpu/mpc512x/i2c.c +++ b/cpu/mpc512x/i2c.c @@ -382,23 +382,6 @@ Done: return ret; } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - i2c_read (chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write (uchar chip, uchar reg, uchar val) -{ - i2c_write (chip, reg, 1, &val, 1); - - return; -} - - int i2c_set_bus_num (unsigned int bus) { if (bus >= I2C_BUS_CNT) { diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S index 26f3c52..360682d 100644 --- a/cpu/mpc512x/start.S +++ b/cpu/mpc512x/start.S @@ -31,6 +31,7 @@ #include <config.h> #include <mpc512x.h> +#include <timestamp.h> #include <version.h> #define CONFIG_521X 1 /* needed for Linux kernel header files*/ @@ -85,7 +86,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii " ", CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc5xx/start.S b/cpu/mpc5xx/start.S index f2ffe84..106935c 100644 --- a/cpu/mpc5xx/start.S +++ b/cpu/mpc5xx/start.S @@ -32,6 +32,7 @@ #include <config.h> #include <mpc5xx.h> +#include <timestamp.h> #include <version.h> #define CONFIG_5xx 1 /* needed for Linux kernel header files */ @@ -80,7 +81,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c index 4d16bbe..7d76274 100644 --- a/cpu/mpc5xxx/i2c.c +++ b/cpu/mpc5xxx/i2c.c @@ -380,20 +380,4 @@ Done: return ret; } -uchar i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - i2c_read(chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - i2c_write(chip, reg, 1, &val, 1); - - return; -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S index defe77d..6b1162a 100644 --- a/cpu/mpc5xxx/start.S +++ b/cpu/mpc5xxx/start.S @@ -27,6 +27,7 @@ */ #include <config.h> #include <mpc5xxx.h> +#include <timestamp.h> #include <version.h> #define CONFIG_MPC5xxx 1 /* needed for Linux kernel header files */ @@ -78,7 +79,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc8220/i2c.c b/cpu/mpc8220/i2c.c index d67936d..76ecdf1 100644 --- a/cpu/mpc8220/i2c.c +++ b/cpu/mpc8220/i2c.c @@ -387,20 +387,4 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buf, int len) return ret; } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - i2c_read (chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write (uchar chip, uchar reg, uchar val) -{ - i2c_write (chip, reg, 1, &val, 1); - - return; -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc8220/start.S b/cpu/mpc8220/start.S index 373be2c..3abc619 100644 --- a/cpu/mpc8220/start.S +++ b/cpu/mpc8220/start.S @@ -27,6 +27,7 @@ */ #include <config.h> #include <mpc8220.h> +#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -77,7 +78,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc824x/Makefile b/cpu/mpc824x/Makefile index f249dd7..a57ad12 100644 --- a/cpu/mpc824x/Makefile +++ b/cpu/mpc824x/Makefile @@ -44,7 +44,7 @@ $(LIB): $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) $(obj)bedbug_603e.c: - ln -s $(src)../mpc8260/bedbug_603e.c $(obj)bedbug_603e.c + ln -sf $(src)../mpc8260/bedbug_603e.c $(obj)bedbug_603e.c ######################################################################### diff --git a/cpu/mpc824x/drivers/i2c/i2c.c b/cpu/mpc824x/drivers/i2c/i2c.c index 854345e..637ae4c 100644 --- a/cpu/mpc824x/drivers/i2c/i2c.c +++ b/cpu/mpc824x/drivers/i2c/i2c.c @@ -267,18 +267,4 @@ int i2c_probe (uchar chip) return i2c_read (chip, 0, 1, (uchar *) &tmp, 1); } -uchar i2c_reg_read (uchar i2c_addr, uchar reg) -{ - uchar buf[1]; - - i2c_read (i2c_addr, reg, 1, buf, 1); - - return (buf[0]); -} - -void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write (i2c_addr, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S index b5d7eb1..39325cd 100644 --- a/cpu/mpc824x/start.S +++ b/cpu/mpc824x/start.S @@ -39,6 +39,7 @@ */ #include <config.h> #include <mpc824x.h> +#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -90,7 +91,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c index a934193..35cf8f1 100644 --- a/cpu/mpc8260/i2c.c +++ b/cpu/mpc8260/i2c.c @@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_I2C_MULTI_BUS) -static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; +static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; #endif /* CONFIG_I2C_MULTI_BUS */ /* uSec to wait between polls of the i2c */ @@ -753,22 +753,6 @@ i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -uchar -i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - i2c_read(chip, reg, 1, &buf, 1); - - return (buf); -} - -void -i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - i2c_write(chip, reg, 1, &val, 1); -} - #if defined(CONFIG_I2C_MULTI_BUS) /* * Functions for multiple I2C bus handling diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S index da0c516..379f2fb 100644 --- a/cpu/mpc8260/start.S +++ b/cpu/mpc8260/start.S @@ -27,6 +27,7 @@ */ #include <config.h> #include <mpc8260.h> +#include <timestamp.h> #include <version.h> #define CONFIG_8260 1 /* needed for Linux kernel header files */ @@ -85,7 +86,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index cd566b2..792b2c8 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -29,6 +29,7 @@ #include <config.h> #include <mpc83xx.h> +#include <timestamp.h> #include <version.h> #define CONFIG_83XX 1 /* needed for Linux kernel header files*/ @@ -105,7 +106,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii " ", CONFIG_IDENT_STRING, "\0" diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 943602f..15ba7f1 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -77,8 +77,6 @@ struct cpu_type *identify_cpu(u32 ver) int checkcpu (void) { sys_info_t sysinfo; - uint lcrr; /* local bus clock ratio register */ - uint clkdiv; /* clock divider portion of lcrr */ uint pvr, svr; uint fam; uint ver; @@ -165,30 +163,11 @@ int checkcpu (void) break; } -#if defined(CONFIG_SYS_LBC_LCRR) - lcrr = CONFIG_SYS_LBC_LCRR; -#else - { - volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); - - lcrr = lbc->lcrr; - } -#endif - clkdiv = lcrr & 0x0f; - if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { -#if defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \ - defined(CONFIG_MPC8572) || defined(CONFIG_MPC8536) - /* - * Yes, the entire PQ38 family use the same - * bit-representation for twice the clock divider values. - */ - clkdiv *= 2; -#endif - printf("LBC:%-4s MHz\n", - strmhz(buf1, sysinfo.freqSystemBus / clkdiv)); - } else { - printf("LBC: unknown (lcrr: 0x%08x)\n", lcrr); - } + if (sysinfo.freqLocalBus > LCRR_CLKDIV) + printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus)); + else + printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", + sysinfo.freqLocalBus); #ifdef CONFIG_CPM2 printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus)); diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 3a8aef2..0b7c609 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -132,6 +132,12 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm) /* We run cpu_init_early_f in AS = 1 */ void cpu_init_early_f(void) { + /* Pointer is writable since we allocated a register for it */ + gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + + /* Clear initial global data */ + memset ((void *) gd, 0, sizeof (gd_t)); + set_tlb(0, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 1, 0, BOOKE_PAGESZ_4K, 0); @@ -140,24 +146,19 @@ void cpu_init_early_f(void) #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS) { u32 temp; + volatile u32 *ccsr_virt = + (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000); - set_tlb(0, CONFIG_SYS_CCSRBAR_DEFAULT, CONFIG_SYS_CCSRBAR_DEFAULT, + set_tlb(0, (u32)ccsr_virt, CONFIG_SYS_CCSRBAR_DEFAULT, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 1, 1, BOOKE_PAGESZ_4K, 0); - temp = in_be32((volatile u32 *)CONFIG_SYS_CCSRBAR_DEFAULT); - out_be32((volatile u32 *)CONFIG_SYS_CCSRBAR_DEFAULT, CONFIG_SYS_CCSRBAR_PHYS >> 12); - + temp = in_be32(ccsr_virt); + out_be32(ccsr_virt, CONFIG_SYS_CCSRBAR_PHYS >> 12); temp = in_be32((volatile u32 *)CONFIG_SYS_CCSRBAR); } #endif - /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); - - /* Clear initial global data */ - memset ((void *) gd, 0, sizeof (gd_t)); - init_laws(); invalidate_tlb(0); init_tlbs(); @@ -174,6 +175,19 @@ void cpu_init_f (void) { volatile ccsr_lbc_t *memctl = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); extern void m8560_cpm_reset (void); +#ifdef CONFIG_MPC8548 + ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR); + uint svr = get_svr(); + + /* + * CPU2 errata workaround: A core hang possible while executing + * a msync instruction and a snoopable transaction from an I/O + * master tagged to make quick forward progress is present. + * Fixed in silicon rev 2.1. + */ + if ((SVR_MAJ(svr) == 1) || ((SVR_MAJ(svr) == 2 && SVR_MIN(svr) == 0x0))) + out_be32(&ecm->eebpcr, in_be32(&ecm->eebpcr) | (1 << 16)); +#endif disable_tlb(14); disable_tlb(15); diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 59aafb1..69fab99 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -28,11 +28,12 @@ #include <fdt_support.h> #include <asm/processor.h> +DECLARE_GLOBAL_DATA_PTR; + extern void ft_qe_setup(void *blob); #ifdef CONFIG_MP #include "mp.h" -DECLARE_GLOBAL_DATA_PTR; void ft_fixup_cpu(void *blob, u64 memory_limit) { @@ -231,6 +232,11 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", bd->bi_intfreq, 1); do_fixup_by_prop_u32(blob, "device_type", "soc", 4, "bus-frequency", bd->bi_busfreq, 1); + + do_fixup_by_compat_u32(blob, "fsl,pq3-localbus", + "bus-frequency", gd->lbc_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,elbc", + "bus-frequency", gd->lbc_clk, 1); #ifdef CONFIG_QE ft_qe_setup(blob); #endif diff --git a/cpu/mpc85xx/pci.c b/cpu/mpc85xx/pci.c index 112f18c..787c6eb 100644 --- a/cpu/mpc85xx/pci.c +++ b/cpu/mpc85xx/pci.c @@ -70,7 +70,7 @@ pci_mpc85xx_init(struct pci_controller *board_hose) */ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff); - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { /* PCI-X init */ if (CONFIG_SYS_CLK_FREQ < 66000000) printf("PCI-X will only work at 66 MHz\n"); diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index 7c3e8a1..54c936c 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -157,6 +157,7 @@ __secondary_start_page: mfspr r0,SPRN_PIR stw r0,ENTRY_PIR(r10) + mtspr IVPR,r12 /* * Coming here, we know the cpu has one TLB mapping in TLB1[0] * which maps 0xfffff000-0xffffffff one-to-one. We set up a diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index 1e0f483..0d55228 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -28,6 +28,7 @@ #include <common.h> #include <ppc_asm.tmpl> #include <asm/processor.h> +#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -37,6 +38,7 @@ void get_sys_info (sys_info_t * sysInfo) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); uint plat_ratio,e500_ratio,half_freqSystemBus; + uint lcrr_div; plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; @@ -60,6 +62,30 @@ void get_sys_info (sys_info_t * sysInfo) sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ; } #endif + +#if defined(CONFIG_SYS_LBC_LCRR) + /* We will program LCRR to this value later */ + lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; +#else + { + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + lcrr_div = in_be32(&lbc->lcrr) & LCRR_CLKDIV; + } +#endif + if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { +#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \ + !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560) + /* + * Yes, the entire PQ38 family use the same + * bit-representation for twice the clock divider values. + */ + lcrr_div *= 2; +#endif + sysInfo->freqLocalBus = sysInfo->freqSystemBus / lcrr_div; + } else { + /* In case anyone cares what the unknown value is */ + sysInfo->freqLocalBus = lcrr_div; + } } @@ -82,6 +108,7 @@ int get_clocks (void) gd->cpu_clk = sys_info.freqProcessor; gd->bus_clk = sys_info.freqSystemBus; gd->mem_clk = sys_info.freqDDRBus; + gd->lbc_clk = sys_info.freqLocalBus; /* * The base clock for I2C depends on the actual SOC. Unfortunately, diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 651ff1c..80f9677 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -30,6 +30,7 @@ #include <config.h> #include <mpc85xx.h> +#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -183,19 +184,19 @@ _start_e500: mtspr DBCR0,r0 #endif - /* create a temp mapping in AS=1 to the boot window */ + /* create a temp mapping in AS=1 to the 4M boot window */ lis r6,FSL_BOOKE_MAS0(1, 15, 0)@h ori r6,r6,FSL_BOOKE_MAS0(1, 15, 0)@l - lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@h - ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@l + lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@h + ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@l - /* Align the mapping to 16MB */ - lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@h - ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@l + lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h + ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l - lis r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h - ori r9,r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l + /* The 85xx has the default boot window 0xff800000 - 0xffffffff */ + lis r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h + ori r9,r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l mtspr MAS0,r6 mtspr MAS1,r7 @@ -274,7 +275,7 @@ _start: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index a2d16ae..25fa9ee 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -26,6 +26,11 @@ #include <common.h> #include <asm/processor.h> #include <asm/mmu.h> +#ifdef CONFIG_ADDR_MAP +#include <addr_map.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; void set_tlb(u8 tlb, u32 epn, u64 rpn, u8 perms, u8 wimge, @@ -47,6 +52,11 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn, mtspr(MAS7, _mas7); #endif asm volatile("isync;msync;tlbwe;isync"); + +#ifdef CONFIG_ADDR_MAP + if ((tlb == 1) && (gd->flags & GD_FLG_RELOC)) + addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel); +#endif } void disable_tlb(u8 esel) @@ -67,6 +77,11 @@ void disable_tlb(u8 esel) mtspr(MAS7, _mas7); #endif asm volatile("isync;msync;tlbwe;isync"); + +#ifdef CONFIG_ADDR_MAP + if (gd->flags & GD_FLG_RELOC) + addrmap_set_entry(0, 0, 0, esel); +#endif } void invalidate_tlb(u8 tlb) @@ -91,6 +106,29 @@ void init_tlbs(void) return ; } +#ifdef CONFIG_ADDR_MAP +void init_addr_map(void) +{ + int i; + + for (i = 0; i < num_tlb_entries; i++) { + if (tlb_table[i].tlb == 0) + continue; + + addrmap_set_entry(tlb_table[i].epn, + tlb_table[i].rpn, + (1UL << ((tlb_table[i].tsize * 2) + 10)), + tlb_table[i].esel); + } + + return ; +} +#endif + +#ifndef CONFIG_SYS_DDR_TLB_START +#define CONFIG_SYS_DDR_TLB_START 8 +#endif + unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg) { unsigned int tlb_size; @@ -137,7 +175,7 @@ unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg) * Configure DDR TLB1 entries. * Starting at TLB1 8, use no more than 8 TLB1 entries. */ - ram_tlb_index = 8; + ram_tlb_index = CONFIG_SYS_DDR_TLB_START; ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE; while (ram_tlb_address < (memsize_in_meg * 1024 * 1024) && ram_tlb_index < 16) { diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index 4cace98..dc53bee 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -39,8 +39,6 @@ checkcpu(void) uint pvr, svr; uint ver; uint major, minor; - uint lcrr; /* local bus clock ratio register */ - uint clkdiv; /* clock divider portion of lcrr */ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; @@ -100,22 +98,11 @@ checkcpu(void) printf("MPX:%4lu MHz, ", sysinfo.freqSystemBus / 1000000); printf("DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000); -#if defined(CONFIG_SYS_LBC_LCRR) - lcrr = CONFIG_SYS_LBC_LCRR; -#else - { - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile ccsr_lbc_t *lbc = &immap->im_lbc; - - lcrr = lbc->lcrr; - } -#endif - clkdiv = lcrr & 0x0f; - if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { - printf("LBC:%4lu MHz\n", - sysinfo.freqSystemBus / 1000000 / clkdiv); + if (sysinfo.freqLocalBus > LCRR_CLKDIV) { + printf("LBC:%4lu MHz\n", sysinfo.freqLocalBus / 1000000); } else { - printf(" LBC: unknown (lcrr: 0x%08x)\n", lcrr); + printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", + sysinfo.freqLocalBus); } puts(" L2: "); diff --git a/cpu/mpc86xx/fdt.c b/cpu/mpc86xx/fdt.c index 3adfad9..383b06b 100644 --- a/cpu/mpc86xx/fdt.c +++ b/cpu/mpc86xx/fdt.c @@ -29,6 +29,13 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_prop_u32(blob, "device_type", "soc", 4, "bus-frequency", bd->bi_busfreq, 1); +#if defined(CONFIG_MPC8641) + do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus", + "bus-frequency", gd->lbc_clk, 1); +#endif + do_fixup_by_compat_u32(blob, "fsl,elbc", + "bus-frequency", gd->lbc_clk, 1); + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) \ diff --git a/cpu/mpc86xx/release.S b/cpu/mpc86xx/release.S index b524e50..95efbb4 100644 --- a/cpu/mpc86xx/release.S +++ b/cpu/mpc86xx/release.S @@ -125,7 +125,7 @@ invl2: mtspr HID0, r5 /* enable + invalidate */ mtspr HID0, r3 /* enable */ sync -#ifdef CFG_L2 +#ifdef CONFIG_SYS_L2 sync lis r3, L2_ENABLE@h ori r3, r3, L2_ENABLE@l diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c index 415ac9d..64a3479 100644 --- a/cpu/mpc86xx/speed.c +++ b/cpu/mpc86xx/speed.c @@ -28,6 +28,7 @@ #include <common.h> #include <mpc86xx.h> #include <asm/processor.h> +#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -39,6 +40,7 @@ void get_sys_info(sys_info_t *sysInfo) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; uint plat_ratio, e600_ratio; + uint lcrr_div; plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; @@ -90,6 +92,22 @@ void get_sys_info(sys_info_t *sysInfo) sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus; break; } + +#if defined(CONFIG_SYS_LBC_LCRR) + /* We will program LCRR to this value later */ + lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; +#else + { + volatile ccsr_lbc_t *lbc = &immap->im_lbc; + lcrr_div = in_be32(&lbc->lcrr) & LCRR_CLKDIV; + } +#endif + if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { + sysInfo->freqLocalBus = sysInfo->freqSystemBus / (lcrr_div * 2); + } else { + /* In case anyone cares what the unknown value is */ + sysInfo->freqLocalBus = lcrr_div; + } } @@ -105,6 +123,7 @@ int get_clocks(void) get_sys_info(&sys_info); gd->cpu_clk = sys_info.freqProcessor; gd->bus_clk = sys_info.freqSystemBus; + gd->lbc_clk = sys_info.freqLocalBus; /* * The base clock for I2C depends on the actual SOC. Unfortunately, diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index efd654c..63cc8db 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -32,6 +32,7 @@ */ #include <config.h> #include <mpc86xx.h> +#include <timestamp.h> #include <version.h> #include <ppc_asm.tmpl> @@ -76,7 +77,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET @@ -981,5 +982,3 @@ unlock_ram_in_cache: blr #endif #endif - - diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index 40f81ef..2eb848b 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -644,7 +644,7 @@ void reset_8xx_watchdog (volatile immap_t * immr) */ int cpu_eth_init(bd_t *bis) { -#if defined(SCC_ENET) +#if defined(SCC_ENET) && defined(CONFIG_CMD_NET) scc_initialize(bis); #endif #if defined(FEC_ENET) diff --git a/cpu/mpc8xx/i2c.c b/cpu/mpc8xx/i2c.c index 29c7c71..338caba 100644 --- a/cpu/mpc8xx/i2c.c +++ b/cpu/mpc8xx/i2c.c @@ -42,19 +42,6 @@ DECLARE_GLOBAL_DATA_PTR; /* define to enable debug messages */ #undef DEBUG_I2C -/*----------------------------------------------------------------------- - * Set default values - */ -#ifndef CONFIG_SYS_I2C_SPEED -#define CONFIG_SYS_I2C_SPEED 50000 -#endif - -#ifndef CONFIG_SYS_I2C_SLAVE -#define CONFIG_SYS_I2C_SLAVE 0xFE -#endif -/*----------------------------------------------------------------------- - */ - /* tx/rx timeout (we need the i2c early, so we don't use get_timer()) */ #define TOUT_LOOP 1000000 @@ -717,24 +704,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -uchar -i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return (buf); -} - -void -i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - i2c_write(i2c_addr, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S index 7b75660..45c902e 100644 --- a/cpu/mpc8xx/start.S +++ b/cpu/mpc8xx/start.S @@ -39,6 +39,7 @@ */ #include <config.h> #include <mpc8xx.h> +#include <timestamp.h> #include <version.h> #define CONFIG_8xx 1 /* needed for Linux kernel header files */ @@ -87,7 +88,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c index 2e6a22a..4a59927 100644 --- a/cpu/mpc8xx/video.c +++ b/cpu/mpc8xx/video.c @@ -33,6 +33,7 @@ #include <common.h> #include <config.h> #include <version.h> +#include <timestamp.h> #include <i2c.h> #include <linux/types.h> #include <devices.h> @@ -1174,7 +1175,8 @@ static void *video_logo (void) easylogo_plot (VIDEO_LOGO_ADDR, screen, width, 0, 0); #ifdef VIDEO_INFO - sprintf (info, "%s (%s - %s) ", U_BOOT_VERSION, __DATE__, __TIME__); + sprintf (info, "%s (%s - %s) ", + U_BOOT_VERSION, U_BOOT_DATE, U_BOOT_TIME); video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y, info); sprintf (info, "(C) 2002 DENX Software Engineering"); diff --git a/cpu/mpc8xxx/ddr/main.c b/cpu/mpc8xxx/ddr/main.c index 21a16d9..f1ad132 100644 --- a/cpu/mpc8xxx/ddr/main.c +++ b/cpu/mpc8xxx/ddr/main.c @@ -475,9 +475,14 @@ phys_size_t fsl_ddr_sdram(void) */ memctl_interleaved = 1; } else { - printf("Error: memctl interleaving not " + printf("Warning: memctl interleaving not " "properly configured on all controllers\n"); - while (1); + memctl_interleaved = 0; + for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) + info.memctl_opts[i].memctl_interleaving = 0; + debug("Recomputing with memctl_interleaving off.\n"); + total_memory = fsl_ddr_compute(&info, + STEP_ASSIGN_ADDRESSES); } } diff --git a/cpu/mpc8xxx/ddr/options.c b/cpu/mpc8xxx/ddr/options.c index 714e88d..af7f73a 100644 --- a/cpu/mpc8xxx/ddr/options.c +++ b/cpu/mpc8xxx/ddr/options.c @@ -197,10 +197,10 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, */ if ((p = getenv("memctl_intlv_ctl")) != NULL) { if (pdimm[0].n_ranks == 0) { - printf("There is no rank on CS0. Because only rank on \ - CS0 and ranks chip-select interleaved with CS0\ - are controller interleaved, force non memory \ - controller interleaving\n"); + printf("There is no rank on CS0. Because only rank on " + "CS0 and ranks chip-select interleaved with CS0" + " are controller interleaved, force non memory " + "controller interleaving\n"); popts->memctl_interleaving = 0; } else { popts->memctl_interleaving = 1; @@ -239,22 +239,22 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, case FSL_DDR_CS0_CS1: if (pdimm[0].n_ranks != 2) { popts->ba_intlv_ctl = 0; - printf("No enough bank(chip-select) for \ - CS0+CS1, force non-interleaving!\n"); + printf("Not enough bank(chip-select) for " + "CS0+CS1, force non-interleaving!\n"); } break; case FSL_DDR_CS2_CS3: if (pdimm[1].n_ranks !=2){ popts->ba_intlv_ctl = 0; - printf("No enough bank(CS) for CS2+CS3, \ - force non-interleaving!\n"); + printf("Not enough bank(CS) for CS2+CS3, " + "force non-interleaving!\n"); } break; case FSL_DDR_CS0_CS1_AND_CS2_CS3: if ((pdimm[0].n_ranks != 2)||(pdimm[1].n_ranks != 2)) { popts->ba_intlv_ctl = 0; - printf("No enough bank(CS) for CS0+CS1 or \ - CS2+CS3, force non-interleaving!\n"); + printf("Not enough bank(CS) for CS0+CS1 or " + "CS2+CS3, force non-interleaving!\n"); } break; default: diff --git a/cpu/nios/start.S b/cpu/nios/start.S index 5d15e8d..3578a04 100644 --- a/cpu/nios/start.S +++ b/cpu/nios/start.S @@ -23,6 +23,7 @@ #include <config.h> +#include <timestamp.h> #include <version.h> #if !defined(CONFIG_IDENT_STRING) @@ -233,5 +234,5 @@ dly_clks: version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" diff --git a/cpu/nios2/start.S b/cpu/nios2/start.S index ea41435..31cd5b0 100644 --- a/cpu/nios2/start.S +++ b/cpu/nios2/start.S @@ -23,6 +23,7 @@ #include <config.h> +#include <timestamp.h> #include <version.h> /************************************************************************* @@ -212,5 +213,5 @@ dly_clks: version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 1f0b56c..d09c4c2 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -706,4 +706,3 @@ int cpu_eth_init(bd_t *bis) #endif return 0; } - diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c index 0deb149..9d416ca 100644 --- a/cpu/ppc4xx/i2c.c +++ b/cpu/ppc4xx/i2c.c @@ -42,11 +42,10 @@ DECLARE_GLOBAL_DATA_PTR; * runs from ROM, and we can't switch buses because we can't modify * the global variables. */ -#ifdef CONFIG_SYS_SPD_BUS_NUM -static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CONFIG_SYS_SPD_BUS_NUM; -#else -static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; +#ifndef CONFIG_SYS_SPD_BUS_NUM +#define CONFIG_SYS_SPD_BUS_NUM 0 #endif +static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM; #endif /* CONFIG_I2C_MULTI_BUS */ static void _i2c_bus_reset(void) @@ -420,26 +419,6 @@ int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) return (i2c_transfer(0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); } -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return (buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - #if defined(CONFIG_I2C_MULTI_BUS) /* * Functions for multiple I2C bus handling diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 882ef21..f2b8908 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -63,6 +63,7 @@ */ #include <config.h> #include <ppc4xx.h> +#include <timestamp.h> #include <version.h> #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -72,6 +73,7 @@ #include <asm/cache.h> #include <asm/mmu.h> +#include <asm/ppc4xx-isram.h> #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -509,7 +511,7 @@ rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET @@ -677,67 +679,80 @@ _start: /* not all PPC's have internal SRAM usable as L2-cache */ #if defined(CONFIG_440GX) || \ defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ defined(CONFIG_460SX) - mtdcr l2_cache_cfg,r0 /* Ensure L2 Cache is off */ + mtdcr L2_CACHE_CFG,r0 /* Ensure L2 Cache is off */ +#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) + lis r1, 0x0000 + ori r1,r1,0x0008 /* Set L2_CACHE_CFG[RDBW]=1 */ + mtdcr L2_CACHE_CFG,r1 #endif lis r2,0x7fff ori r2,r2,0xffff - mfdcr r1,isram0_dpc + mfdcr r1,ISRAM0_DPC and r1,r1,r2 /* Disable parity check */ - mtdcr isram0_dpc,r1 - mfdcr r1,isram0_pmeg + mtdcr ISRAM0_DPC,r1 + mfdcr r1,ISRAM0_PMEG and r1,r1,r2 /* Disable pwr mgmt */ - mtdcr isram0_pmeg,r1 + mtdcr ISRAM0_PMEG,r1 lis r1,0x8000 /* BAS = 8000_0000 */ #if defined(CONFIG_440GX) || defined(CONFIG_440SP) ori r1,r1,0x0980 /* first 64k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB0CR,r1 lis r1,0x8001 ori r1,r1,0x0980 /* second 64k */ - mtdcr isram0_sb1cr,r1 + mtdcr ISRAM0_SB1CR,r1 lis r1, 0x8002 ori r1,r1, 0x0980 /* third 64k */ - mtdcr isram0_sb2cr,r1 + mtdcr ISRAM0_SB2CR,r1 lis r1, 0x8003 ori r1,r1, 0x0980 /* fourth 64k */ - mtdcr isram0_sb3cr,r1 -#elif defined(CONFIG_440SPE) - lis r1,0x0000 /* BAS = 0000_0000 */ + mtdcr ISRAM0_SB3CR,r1 +#elif defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT) + lis r1,0x0000 /* BAS = X_0000_0000 */ ori r1,r1,0x0984 /* first 64k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB0CR,r1 lis r1,0x0001 ori r1,r1,0x0984 /* second 64k */ - mtdcr isram0_sb1cr,r1 + mtdcr ISRAM0_SB1CR,r1 lis r1, 0x0002 ori r1,r1, 0x0984 /* third 64k */ - mtdcr isram0_sb2cr,r1 + mtdcr ISRAM0_SB2CR,r1 lis r1, 0x0003 ori r1,r1, 0x0984 /* fourth 64k */ - mtdcr isram0_sb3cr,r1 -#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) - lis r1,0x4000 /* BAS = 8000_0000 */ - ori r1,r1,0x4580 /* 16k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB3CR,r1 +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) + lis r2,0x7fff + ori r2,r2,0xffff + mfdcr r1,ISRAM1_DPC + and r1,r1,r2 /* Disable parity check */ + mtdcr ISRAM1_DPC,r1 + mfdcr r1,ISRAM1_PMEG + and r1,r1,r2 /* Disable pwr mgmt */ + mtdcr ISRAM1_PMEG,r1 + + lis r1,0x0004 /* BAS = 4_0004_0000 */ + ori r1,r1,0x0984 /* 64k */ + mtdcr ISRAM1_SB0CR,r1 +#endif #elif defined(CONFIG_460SX) lis r1,0x0000 /* BAS = 0000_0000 */ ori r1,r1,0x0B84 /* first 128k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB0CR,r1 lis r1,0x0001 ori r1,r1,0x0B84 /* second 128k */ - mtdcr isram0_sb1cr,r1 + mtdcr ISRAM0_SB1CR,r1 lis r1, 0x0002 ori r1,r1, 0x0B84 /* third 128k */ - mtdcr isram0_sb2cr,r1 + mtdcr ISRAM0_SB2CR,r1 lis r1, 0x0003 ori r1,r1, 0x0B84 /* fourth 128k */ - mtdcr isram0_sb3cr,r1 + mtdcr ISRAM0_SB3CR,r1 #elif defined(CONFIG_440GP) ori r1,r1,0x0380 /* 8k rw */ - mtdcr isram0_sb0cr,r1 - mtdcr isram0_sb1cr,r0 /* Disable bank 1 */ + mtdcr ISRAM0_SB0CR,r1 + mtdcr ISRAM0_SB1CR,r0 /* Disable bank 1 */ #endif #endif /* #if !defined(CONFIG_440EP) && !defined(CONFIG_440GR) */ @@ -1440,6 +1455,10 @@ relocate_code: dccci 0,0 /* Invalidate data cache, now no longer our stack */ sync isync + + /* Clear all potential pending exceptions */ + mfspr r1,mcsr + mtspr mcsr,r1 #ifdef CONFIG_SYS_TLB_FOR_BOOT_FLASH addi r1,r0,CONFIG_SYS_TLB_FOR_BOOT_FLASH /* Use defined TLB */ #else diff --git a/cpu/pxa/config.mk b/cpu/pxa/config.mk index f0b86b7..af910e2 100644 --- a/cpu/pxa/config.mk +++ b/cpu/pxa/config.mk @@ -32,4 +32,5 @@ PLATFORM_CPPFLAGS += -march=armv5te -mtune=xscale # # ======================================================================== PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c index 08042be..6b72ba1 100644 --- a/cpu/pxa/i2c.c +++ b/cpu/pxa/i2c.c @@ -455,19 +455,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg)); - i2c_read(chip, reg, 1, &buf, 1); - return (buf); -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - PRINTD(("i2c_reg_write(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",chip,reg,val)); - i2c_write(chip, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/s3c44b0/config.mk b/cpu/s3c44b0/config.mk index 6dc9c46..01e7040 100644 --- a/cpu/s3c44b0/config.mk +++ b/cpu/s3c44b0/config.mk @@ -32,4 +32,5 @@ PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi -msoft-float # # ======================================================================== PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/sa1100/config.mk b/cpu/sa1100/config.mk index 5be7dfb..9ef4a19 100644 --- a/cpu/sa1100/config.mk +++ b/cpu/sa1100/config.mk @@ -32,4 +32,5 @@ PLATFORM_CPPFLAGS += -march=armv4 -mtune=strongarm1100 # # ======================================================================== PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/sh2/Makefile b/cpu/sh2/Makefile index 50f6720..346d328 100644 --- a/cpu/sh2/Makefile +++ b/cpu/sh2/Makefile @@ -28,18 +28,23 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a -START = start.o -OBJS = cpu.o interrupts.o watchdog.o time.o # cache.o +SOBJS = start.o +COBJS = cpu.o interrupts.o watchdog.o -all: .depend $(START) $(LIB) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) -######################################################################### +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend -.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@ +######################################################################### # defines $(obj).depend target include $(SRCTREE)/rules.mk diff --git a/cpu/sh2/time.c b/cpu/sh2/time.c deleted file mode 100644 index fcbb921..0000000 --- a/cpu/sh2/time.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright (C) 2007,2008 Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> - * Copyright (C) 2008 Renesas Solutions Corp. - * - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/processor.h> - -#define CMT_CMCSR_INIT 0x0001 /* PCLK/32 */ -#define CMT_CMCSR_CALIB 0x0000 -#define CMT_MAX_COUNTER (0xFFFFFFFF) -#define CMT_TIMER_RESET (0xFFFF) - -static vu_long cmt0_timer; - -static void cmt_timer_start(unsigned int timer) -{ - writew(readw(CMSTR) | 0x01, CMSTR); -} - -static void cmt_timer_stop(unsigned int timer) -{ - writew(readw(CMSTR) & ~0x01, CMSTR); -} - -int timer_init(void) -{ - cmt0_timer = 0; - /* Divide clock by 32 */ - readw(CMCSR_0); - writew(CMT_CMCSR_INIT, CMCSR_0); - - /* User Device 0 only */ - cmt_timer_stop(0); - set_timer(CMT_TIMER_RESET); - cmt_timer_start(0); - - return 0; -} - -unsigned long long get_ticks(void) -{ - return cmt0_timer; -} - -static vu_long cmcnt; -ulong get_timer(ulong base) -{ - ulong data = readw(CMCNT_0); - - if (data >= cmcnt) - cmcnt = data - cmcnt; - else - cmcnt = (CMT_TIMER_RESET - cmcnt) + data; - - if ((cmt0_timer + cmcnt) > CMT_MAX_COUNTER) - cmt0_timer = ((cmt0_timer + cmcnt) - CMT_MAX_COUNTER); - else - cmt0_timer += cmcnt; - - cmcnt = data; - return cmt0_timer - base; -} - -void set_timer(ulong t) -{ - writew((u16) t, CMCOR_0); -} - -void reset_timer(void) -{ - cmt_timer_stop(0); - set_timer(CMT_TIMER_RESET); - cmt0_timer = 0; - cmt_timer_start(0); -} - -void udelay(unsigned long usec) -{ - unsigned int start = get_timer(0); - - while (get_timer((ulong) start) < (usec * (CONFIG_SYS_HZ / 1000000))) - continue; -} - -unsigned long get_tbclk(void) -{ - return CONFIG_SYS_HZ; -} diff --git a/cpu/sh3/Makefile b/cpu/sh3/Makefile index 587413d..35e8f51 100644 --- a/cpu/sh3/Makefile +++ b/cpu/sh3/Makefile @@ -32,7 +32,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a SOBJS = start.o -COBJS = cpu.o interrupts.o watchdog.o time.o cache.o +COBJS = cpu.o interrupts.o watchdog.o cache.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/cpu/sh3/time.c b/cpu/sh3/time.c deleted file mode 100644 index aab3659..0000000 --- a/cpu/sh3/time.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * (C) Copyright 2007 - * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> - * - * (C) Copyright 2007 - * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> - * - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/processor.h> -#include <asm/io.h> - -#define TMU_MAX_COUNTER (~0UL) - -static void tmu_timer_start(unsigned int timer) -{ - if (timer > 2) - return; - - outb(inb(TSTR) | (1 << timer), TSTR); -} - -static void tmu_timer_stop(unsigned int timer) -{ - u8 val = inb(TSTR); - - if (timer > 2) - return; - outb(val & ~(1 << timer), TSTR); -} - -int timer_init(void) -{ - /* Divide clock by 4 */ - outw(0, TCR0); - - tmu_timer_stop(0); - tmu_timer_start(0); - return 0; -} - -/* - In theory we should return a true 64bit value (ie something that doesn't - overflow). However, we don't. Therefore if TMU runs at fastest rate of - 6.75 MHz this value will wrap after u-boot has been running for approx - 10 minutes. -*/ -unsigned long long get_ticks(void) -{ - return (0 - inl(TCNT0)); -} - -unsigned long get_timer(unsigned long base) -{ - return ((0 - inl(TCNT0)) - base); -} - -void set_timer(unsigned long t) -{ - outl(0 - t, TCNT0); -} - -void reset_timer(void) -{ - tmu_timer_stop(0); - set_timer(0); - tmu_timer_start(0); -} - -void udelay(unsigned long usec) -{ - unsigned int start = get_timer(0); - unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000)); - - while (get_timer(0) < end) - continue; -} - -unsigned long get_tbclk(void) -{ - return CONFIG_SYS_HZ; -} diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile index d3c5eef..3c96a49 100644 --- a/cpu/sh4/Makefile +++ b/cpu/sh4/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a SOBJS = start.o -COBJS = cpu.o interrupts.o watchdog.o time.o cache.o +COBJS = cpu.o interrupts.o watchdog.o cache.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/cpu/sh4/time.c b/cpu/sh4/time.c deleted file mode 100644 index 77e0ae2..0000000 --- a/cpu/sh4/time.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * (C) Copyright 2007 - * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> - * - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/processor.h> - -#define TMU_MAX_COUNTER (~0UL) - -static void tmu_timer_start (unsigned int timer) -{ - if (timer > 2) - return; - - *((volatile unsigned char *) TSTR) |= (1 << timer); -} - -static void tmu_timer_stop (unsigned int timer) -{ - u8 val = *((volatile u8 *)TSTR); - if (timer > 2) - return; - *((volatile unsigned char *)TSTR) = val &~(1 << timer); -} - -int timer_init (void) -{ - /* Divide clock by 4 */ - *(volatile u16 *)TCR0 = 0; - - tmu_timer_stop(0); - tmu_timer_start(0); - return 0; -} - -/* - In theory we should return a true 64bit value (ie something that doesn't - overflow). However, we don't. Therefore if TMU runs at fastest rate of - 6.75 MHz this value will wrap after u-boot has been running for approx - 10 minutes. -*/ -unsigned long long get_ticks (void) -{ - return (0 - *((volatile u32 *) TCNT0)); -} - -unsigned long get_timer (unsigned long base) -{ - return ((0 - *((volatile u32 *) TCNT0)) - base); -} - -void set_timer (unsigned long t) -{ - *((volatile unsigned int *) TCNT0) = (0 - t); -} - -void reset_timer (void) -{ - tmu_timer_stop(0); - set_timer (0); - tmu_timer_start(0); -} - -void udelay (unsigned long usec) -{ - unsigned int start = get_timer (0); - unsigned int end = start + (usec * ((CONFIG_SYS_HZ + 500000) / 1000000)); - - while (get_timer (0) < end) - continue; -} - -unsigned long get_tbclk (void) -{ - return CONFIG_SYS_HZ; -} |