diff options
Diffstat (limited to 'cpu')
38 files changed, 873 insertions, 469 deletions
diff --git a/cpu/74xx_7xx/config.mk b/cpu/74xx_7xx/config.mk index d589210..df1f6ac 100644 --- a/cpu/74xx_7xx/config.mk +++ b/cpu/74xx_7xx/config.mk @@ -21,6 +21,6 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_74xx_7xx -ffixed-r2 -mstring diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S index 23381a3..88fdf88 100644 --- a/cpu/74xx_7xx/start.S +++ b/cpu/74xx_7xx/start.S @@ -63,7 +63,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -132,28 +132,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) /* No FPU on MPC8xx. This exception is not supposed to happen. */ @@ -612,6 +599,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -629,7 +617,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -704,7 +692,7 @@ in_ram: bl board_init_ecc #endif /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -778,6 +766,8 @@ in_ram: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -785,8 +775,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -837,23 +825,6 @@ trap_init: mtlr r4 /* restore link register */ blr - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - sync - isync - - blr - #ifdef CONFIG_SYS_INIT_RAM_LOCK lock_ram_in_cache: /* Allocate Initial RAM in data cache. diff --git a/cpu/arm920t/ep93xx/Makefile b/cpu/arm920t/ep93xx/Makefile new file mode 100644 index 0000000..30e12af --- /dev/null +++ b/cpu/arm920t/ep93xx/Makefile @@ -0,0 +1,56 @@ +# +# Cirrus Logic EP93xx CPU-specific Makefile +# +# Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> +# +# Copyright (C) 2004, 2005 +# Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> +# +# Copyright (C) 2006 +# Dominic Rath <Dominic.Rath@gmx.de> +# +# Based on an original Makefile, which is +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 675 Mass Ave, Cambridge, MA 02139, USA. +# +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = cpu.o led.o speed.o timer.o +SOBJS = lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### + diff --git a/cpu/arm920t/ep93xx/cpu.c b/cpu/arm920t/ep93xx/cpu.c new file mode 100644 index 0000000..1abb9c6 --- /dev/null +++ b/cpu/arm920t/ep93xx/cpu.c @@ -0,0 +1,51 @@ +/* + * Cirrus Logic EP93xx CPU-specific support. + * + * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> + * + * Copyright (C) 2004, 2005 + * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> + * + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/ep93xx.h> +#include <asm/io.h> + +/* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */ +extern void reset_cpu(ulong addr) +{ + struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; + uint32_t value; + + /* Unlock DeviceCfg and set SWRST */ + writel(0xAA, &syscon->sysswlock); + value = readl(&syscon->devicecfg); + value |= SYSCON_DEVICECFG_SWRST; + writel(value, &syscon->devicecfg); + + /* Unlock DeviceCfg and clear SWRST */ + writel(0xAA, &syscon->sysswlock); + value = readl(&syscon->devicecfg); + value &= ~SYSCON_DEVICECFG_SWRST; + writel(value, &syscon->devicecfg); + + /* Dying... */ + while (1) + ; /* noop */ +} diff --git a/cpu/arm920t/ep93xx/led.c b/cpu/arm920t/ep93xx/led.c new file mode 100644 index 0000000..7e2c897 --- /dev/null +++ b/cpu/arm920t/ep93xx/led.c @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2010, 2009 Matthias Kaehlcke <matthias@kaehlcke.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/io.h> +#include <asm/arch/ep93xx.h> +#include <config.h> +#include <status_led.h> + +static uint8_t saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF}; +static uint32_t gpio_pin[2] = {1 << STATUS_LED_GREEN, + 1 << STATUS_LED_RED}; + +inline void switch_LED_on(uint8_t led) +{ + register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE; + + writel(readl(&gpio->pedr) | gpio_pin[led], &gpio->pedr); + saved_state[led] = STATUS_LED_ON; +} + +inline void switch_LED_off(uint8_t led) +{ + register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE; + + writel(readl(&gpio->pedr) & ~gpio_pin[led], &gpio->pedr); + saved_state[led] = STATUS_LED_OFF; +} + +void red_LED_on(void) +{ + switch_LED_on(STATUS_LED_RED); +} + +void red_LED_off(void) +{ + switch_LED_off(STATUS_LED_RED); +} + +void green_LED_on(void) +{ + switch_LED_on(STATUS_LED_GREEN); +} + +void green_LED_off(void) +{ + switch_LED_off(STATUS_LED_GREEN); +} + +void __led_init(led_id_t mask, int state) +{ + __led_set(mask, state); +} + +void __led_toggle(led_id_t mask) +{ + if (STATUS_LED_RED == mask) { + if (STATUS_LED_ON == saved_state[STATUS_LED_RED]) + red_LED_off(); + else + red_LED_on(); + } else if (STATUS_LED_GREEN == mask) { + if (STATUS_LED_ON == saved_state[STATUS_LED_GREEN]) + green_LED_off(); + else + green_LED_on(); + } +} + +void __led_set(led_id_t mask, int state) +{ + if (STATUS_LED_RED == mask) { + if (STATUS_LED_ON == state) + red_LED_on(); + else + red_LED_off(); + } else if (STATUS_LED_GREEN == mask) { + if (STATUS_LED_ON == state) + green_LED_on(); + else + green_LED_off(); + } +} diff --git a/cpu/arm920t/ep93xx/lowlevel_init.S b/cpu/arm920t/ep93xx/lowlevel_init.S new file mode 100644 index 0000000..a20ec89 --- /dev/null +++ b/cpu/arm920t/ep93xx/lowlevel_init.S @@ -0,0 +1,65 @@ +/* + * Low-level initialization for EP93xx + * + * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> + * + * Copyright (C) 2006 Dominic Rath <Dominic.Rath@gmx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <version.h> +#include <asm/arch/ep93xx.h> + +.globl lowlevel_init +lowlevel_init: + /* backup return address */ + ldr r1, =SYSCON_SCRATCH0 + str lr, [r1] + + /* Turn on both LEDs */ + bl red_LED_on + bl green_LED_on + + /* Configure flash wait states before we switch to the PLL */ + bl flash_cfg + + /* Set up PLL */ + bl pll_cfg + + /* Turn off the Green LED and leave the Red LED on */ + bl green_LED_off + + /* Setup SDRAM */ + bl sdram_cfg + + /* Turn on Green LED, Turn off the Red LED */ + bl green_LED_on + bl red_LED_off + + /* FIXME: we use async mode for now */ + mrc p15, 0, r0, c1, c0, 0 + orr r0, r0, #0xc0000000 + mcr p15, 0, r0, c1, c0, 0 + + /* restore return address */ + ldr r1, =SYSCON_SCRATCH0 + ldr lr, [r1] + + mov pc, lr diff --git a/cpu/arm920t/ep93xx/speed.c b/cpu/arm920t/ep93xx/speed.c new file mode 100644 index 0000000..c83a3bb --- /dev/null +++ b/cpu/arm920t/ep93xx/speed.c @@ -0,0 +1,110 @@ +/* + * Cirrus Logic EP93xx PLL support. + * + * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net> + * + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/arch/ep93xx.h> +#include <asm/io.h> +#include <div64.h> + +/* + * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. + * + * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of + * the specified bus in HZ. + */ + +/* + * return the PLL output frequency + * + * PLL rate = CONFIG_SYS_CLK_FREQ * (X1FBD + 1) * (X2FBD + 1) + * / (X2IPD + 1) / 2^PS + */ +static ulong get_PLLCLK(uint32_t *pllreg) +{ + uint8_t i; + const uint32_t clkset = readl(pllreg); + uint64_t rate = CONFIG_SYS_CLK_FREQ; + rate *= ((clkset >> SYSCON_CLKSET_PLL_X1FBD1_SHIFT) & 0x1f) + 1; + rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1; + do_div(rate, (clkset & 0x1f) + 1); /* X2IPD */ + for (i = 0; i < ((clkset >> SYSCON_CLKSET_PLL_PS_SHIFT) & 3); i++) + rate >>= 1; + + return (ulong)rate; +} + +/* return FCLK frequency */ +ulong get_FCLK() +{ + const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; + struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; + + const uint32_t clkset1 = readl(&syscon->clkset1); + const uint8_t fclk_div = + fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; + const ulong fclk_rate = get_PLLCLK(&syscon->clkset1) / fclk_div; + + return fclk_rate; +} + +/* return HCLK frequency */ +ulong get_HCLK(void) +{ + const uint8_t hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; + struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; + + const uint32_t clkset1 = readl(&syscon->clkset1); + const uint8_t hclk_div = + hclk_divisors[(clkset1 >> SYSCON_CLKSET1_HCLK_DIV_SHIFT) & 7]; + const ulong hclk_rate = get_PLLCLK(&syscon->clkset1) / hclk_div; + + return hclk_rate; +} + +/* return PCLK frequency */ +ulong get_PCLK(void) +{ + const uint8_t pclk_divisors[] = { 1, 2, 4, 8 }; + struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; + + const uint32_t clkset1 = readl(&syscon->clkset1); + const uint8_t pclk_div = + pclk_divisors[(clkset1 >> SYSCON_CLKSET1_PCLK_DIV_SHIFT) & 3]; + const ulong pclk_rate = get_HCLK() / pclk_div; + + return pclk_rate; +} + +/* return UCLK frequency */ +ulong get_UCLK(void) +{ + struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; + ulong uclk_rate; + + const uint32_t value = readl(&syscon->pwrcnt); + if (value & SYSCON_PWRCNT_UART_BAUD) + uclk_rate = CONFIG_SYS_CLK_FREQ; + else + uclk_rate = CONFIG_SYS_CLK_FREQ / 2; + + return uclk_rate; +} diff --git a/cpu/arm920t/ep93xx/timer.c b/cpu/arm920t/ep93xx/timer.c new file mode 100644 index 0000000..6d969d9 --- /dev/null +++ b/cpu/arm920t/ep93xx/timer.c @@ -0,0 +1,168 @@ +/* + * Cirrus Logic EP93xx timer support. + * + * Copyright (C) 2009, 2010 + * Matthias Kaehlcke <matthias@kaehlcke.net> + * + * Copyright (C) 2004, 2005 + * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> + * + * Based on the original intr.c Cirrus Logic EP93xx Rev D. interrupt support, + * author unknown. + * + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <linux/types.h> +#include <asm/arch/ep93xx.h> +#include <asm/io.h> + +#define TIMER_CLKSEL (1 << 3) +#define TIMER_MODE (1 << 6) +#define TIMER_ENABLE (1 << 7) + +#define TIMER_FREQ 508469 +#define TIMER_LOAD_VAL (TIMER_FREQ / CONFIG_SYS_HZ) + +static ulong timestamp; +static ulong lastdec; + +static inline unsigned long clk_to_systicks(unsigned long clk_ticks) +{ + unsigned long sys_ticks = (clk_ticks * CONFIG_SYS_HZ) / TIMER_FREQ; + + return sys_ticks; +} + +static inline unsigned long usecs_to_ticks(unsigned long usecs) +{ + unsigned long ticks; + + if (usecs >= 1000) { + ticks = usecs / 1000; + ticks *= (TIMER_LOAD_VAL * CONFIG_SYS_HZ); + ticks /= 1000; + } else { + ticks = usecs * TIMER_LOAD_VAL * CONFIG_SYS_HZ; + ticks /= (1000 * 1000); + } + + return ticks; +} + +static inline unsigned long read_timer(void) +{ + struct timer_regs *timer = (struct timer_regs *)TIMER_BASE; + + return readl(&timer->timer3.value); +} + +/* + * timer without interrupts + */ +unsigned long long get_ticks(void) +{ + const unsigned long now = read_timer(); + + if (lastdec >= now) { + /* normal mode */ + timestamp += lastdec - now; + } else { + /* we have an overflow ... */ + timestamp += lastdec + TIMER_LOAD_VAL - now; + } + + lastdec = now; + + return timestamp; +} + +unsigned long get_timer_masked(void) +{ + return clk_to_systicks(get_ticks()); +} + +unsigned long get_timer(unsigned long base) +{ + return get_timer_masked() - base; +} + +void reset_timer_masked(void) +{ + lastdec = read_timer(); + timestamp = 0; +} + +void reset_timer(void) +{ + reset_timer_masked(); +} + +void set_timer(unsigned long t) +{ + timestamp = t; +} + +void __udelay(unsigned long usec) +{ + const unsigned long ticks = usecs_to_ticks(usec); + const unsigned long target = clk_to_systicks(ticks) + get_timer(0); + + while (get_timer_masked() < target) + /* noop */; +} + +void udelay_masked(unsigned long usec) +{ + const unsigned long ticks = usecs_to_ticks(usec); + const unsigned long target = clk_to_systicks(ticks) + get_timer(0); + + reset_timer_masked(); + + while (get_timer_masked() < target) + /* noop */; +} + +int timer_init(void) +{ + struct timer_regs *timer = (struct timer_regs *)TIMER_BASE; + + /* use timer 3 with 508KHz and free running */ + writel(TIMER_CLKSEL, &timer->timer3.control); + + /* auto load, manual update of Timer 3 */ + lastdec = TIMER_LOAD_VAL; + writel(TIMER_LOAD_VAL, &timer->timer3.load); + + /* Enable the timer and periodic mode */ + writel(TIMER_ENABLE | TIMER_MODE | TIMER_CLKSEL, + &timer->timer3.control); + + reset_timer_masked(); + + return 0; +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +unsigned long get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/cpu/arm920t/ep93xx/u-boot.lds b/cpu/arm920t/ep93xx/u-boot.lds new file mode 100644 index 0000000..737c9d8 --- /dev/null +++ b/cpu/arm920t/ep93xx/u-boot.lds @@ -0,0 +1,59 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + /* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */ + . = 0x1000; + LONG(0x53555243) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/cpu/mpc512x/config.mk b/cpu/mpc512x/config.mk index 6ab34b1..fb0a563 100644 --- a/cpu/mpc512x/config.mk +++ b/cpu/mpc512x/config.mk @@ -19,7 +19,7 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \ -ffixed-r2 -msoft-float -mcpu=603e diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index f96a4c8..09cbd20 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -66,9 +66,10 @@ int checkcpu (void) default: puts ("unknown "); } - printf ("at %s MHz, CSB at %s MHz\n", + printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n", strmhz(buf1, clock), - strmhz(buf2, gd->csb_clk) ); + strmhz(buf2, gd->csb_clk), + gd->reset_status & 0xffff); return 0; } diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S index 4edc8e9..d26b617 100644 --- a/cpu/mpc512x/start.S +++ b/cpu/mpc512x/start.S @@ -65,7 +65,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -127,30 +127,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) /* Floating Point Unit unavailable exception */ STD_EXCEPTION(0x800, FPUnavailable, UnknownException) @@ -501,6 +486,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -519,7 +505,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -599,7 +585,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -663,6 +649,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -670,8 +658,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -723,17 +709,3 @@ trap_init: mtlr r4 /* restore link register */ blr - - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - blr diff --git a/cpu/mpc5xx/config.mk b/cpu/mpc5xx/config.mk index 157ddc5..7854924 100644 --- a/cpu/mpc5xx/config.mk +++ b/cpu/mpc5xx/config.mk @@ -28,7 +28,7 @@ # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_5xx -ffixed-r2 -mpowerpc -msoft-float diff --git a/cpu/mpc5xx/start.S b/cpu/mpc5xx/start.S index 85ea7a8..0af879e 100644 --- a/cpu/mpc5xx/start.S +++ b/cpu/mpc5xx/start.S @@ -56,7 +56,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -217,28 +217,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) /* FPU on MPC5xx available. We will use it later. */ @@ -385,6 +372,7 @@ relocate_code: mr r9, r4 /* Save copy of global data pointer in SRAM */ mr r10, r5 /* Save copy of monitor destination Address in SRAM */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -401,7 +389,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* the the one used by the C code */ add r30, r30, r15 @@ -446,7 +434,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -510,6 +498,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -517,8 +507,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -563,24 +551,6 @@ trap_init: mtlr r4 /* restore link register */ blr - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - sync - isync - - blr - - #if defined(CONFIG_PATI) /* Program the PLL */ pll_prog_code_start: diff --git a/cpu/mpc5xxx/config.mk b/cpu/mpc5xxx/config.mk index b0ce2ee..5e82f67 100644 --- a/cpu/mpc5xxx/config.mk +++ b/cpu/mpc5xxx/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c index 2a28df4..edfb828 100644 --- a/cpu/mpc5xxx/cpu.c +++ b/cpu/mpc5xxx/cpu.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2003 + * (C) Copyright 2000-2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -192,3 +192,21 @@ int cpu_eth_init(bd_t *bis) return mpc5xxx_fec_initialize(bis); } #endif + +#if defined(CONFIG_WATCHDOG) +void watchdog_reset(void) +{ + int re_enable = disable_interrupts(); + reset_5xxx_watchdog(); + if (re_enable) enable_interrupts(); +} + +void reset_5xxx_watchdog(void) +{ + volatile struct mpc5xxx_gpt *gpt0 = + (struct mpc5xxx_gpt *) MPC5XXX_GPT; + + /* Trigger TIMER_0 by writing A5 to OCPW */ + clrsetbits_be32(&gpt0->emsr, 0xff000000, 0xa5000000); +} +#endif /* CONFIG_WATCHDOG */ diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index acff5f5..b151464 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2009 + * (C) Copyright 2000-2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -24,6 +24,7 @@ #include <common.h> #include <mpc5xxx.h> #include <asm/io.h> +#include <watchdog.h> DECLARE_GLOBAL_DATA_PTR; @@ -45,6 +46,8 @@ void cpu_init_f (void) (struct mpc5xxx_gpio *) MPC5XXX_GPIO; volatile struct mpc5xxx_xlb *xlb = (struct mpc5xxx_xlb *) MPC5XXX_XLBARB; + volatile struct mpc5xxx_gpt *gpt0 = + (struct mpc5xxx_gpt *) MPC5XXX_GPT; unsigned long addecr = (1 << 25); /* Boot_CS */ #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_MGT5100) addecr |= (1 << 22); /* SDRAM enable */ @@ -206,6 +209,15 @@ void cpu_init_f (void) /* Enable piplining */ clrbits_be32(&xlb->config, (1 << 31)); # endif + +#if defined(CONFIG_WATCHDOG) + /* Charge the watchdog timer - prescaler = 64k, count = 64k*/ + out_be32(&gpt0->cir, 0x0000ffff); + out_be32(&gpt0->emsr, 0x9004); /* wden|ce|timer_ms */ + + reset_5xxx_watchdog(); +#endif /* CONFIG_WATCHDOG */ + #endif /* CONFIG_MPC5200 */ } diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S index eb42939..d499da5 100644 --- a/cpu/mpc5xxx/start.S +++ b/cpu/mpc5xxx/start.S @@ -56,7 +56,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -215,30 +215,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) STD_EXCEPTION(0x800, FPUnavailable, UnknownException) @@ -582,6 +567,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -599,7 +585,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -672,7 +658,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -737,6 +723,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -744,8 +732,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -797,17 +783,3 @@ trap_init: mtlr r4 /* restore link register */ blr - - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - blr diff --git a/cpu/mpc8220/config.mk b/cpu/mpc8220/config.mk index 5819048..3ce40c0 100644 --- a/cpu/mpc8220/config.mk +++ b/cpu/mpc8220/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc8220/start.S b/cpu/mpc8220/start.S index af9472d..e28999d 100644 --- a/cpu/mpc8220/start.S +++ b/cpu/mpc8220/start.S @@ -55,7 +55,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -176,30 +176,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) STD_EXCEPTION(0x800, FPUnavailable, UnknownException) @@ -547,6 +532,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -564,7 +550,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -637,7 +623,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -702,6 +688,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -709,8 +697,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -762,17 +748,3 @@ trap_init: mtlr r4 /* restore link register */ blr - - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - blr diff --git a/cpu/mpc824x/config.mk b/cpu/mpc824x/config.mk index b607fee..940474b 100644 --- a/cpu/mpc824x/config.mk +++ b/cpu/mpc824x/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -mstring -mcpu=603e -msoft-float diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S index 750457b..f3f595a 100644 --- a/cpu/mpc824x/start.S +++ b/cpu/mpc824x/start.S @@ -63,7 +63,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -227,28 +227,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = EXC_OFF_PROGRAM ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) /* No FPU on MPC8xx. This exception is not supposed to happen. */ @@ -475,6 +462,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ #ifdef CONFIG_SYS_RAMBOOT lis r4, CONFIG_SYS_SDRAM_BASE@h /* Source Address */ @@ -497,7 +485,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* the the one used by the C code */ add r30, r30, r15 @@ -577,7 +565,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -642,6 +630,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -649,8 +639,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -695,20 +683,6 @@ trap_init: mtlr r4 /* restore link register */ blr - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - blr - /* Setup the BAT registers. */ setup_bats: diff --git a/cpu/mpc8260/config.mk b/cpu/mpc8260/config.mk index 2cb0270..39d81ee 100644 --- a/cpu/mpc8260/config.mk +++ b/cpu/mpc8260/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S index edb95e6..1fc70bc 100644 --- a/cpu/mpc8260/start.S +++ b/cpu/mpc8260/start.S @@ -56,7 +56,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -286,30 +286,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) STD_EXCEPTION(0x800, FPUnavailable, UnknownException) @@ -665,7 +650,9 @@ init_debug: /* RAM should now be operational */ #define VEC_WRD_CNT ((_end_of_vectors - _start + EXC_OFF_SYS_RESET) / 4) - + mflr r3 + GET_GOT + mtlr r3 lwz r3, GOT(_end_of_vectors) rlwinm r4, r3, 0, 18, 31 /* _end_of_vectors & 0x3FFF */ lis r5, VEC_WRD_CNT@h @@ -807,6 +794,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -824,7 +812,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -897,7 +885,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -973,6 +961,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -980,8 +970,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -1033,17 +1021,3 @@ trap_init: mtlr r4 /* restore link register */ blr - - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - blr diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk index d619426..e80919b 100644 --- a/cpu/mpc83xx/config.mk +++ b/cpu/mpc83xx/config.mk @@ -20,7 +20,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \ -ffixed-r2 -msoft-float diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index ee4b862..68bb620 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -65,7 +65,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -338,30 +338,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) STD_EXCEPTION(0x800, FPUnavailable, UnknownException) @@ -845,6 +830,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -863,7 +849,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -945,7 +931,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -1025,6 +1011,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -1032,8 +1020,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -1086,19 +1072,6 @@ trap_init: mtlr r4 /* restore link register */ blr - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - blr #endif /* !CONFIG_NAND_SPL */ #ifdef CONFIG_SYS_INIT_RAM_LOCK diff --git a/cpu/mpc85xx/config.mk b/cpu/mpc85xx/config.mk index 84651b8..408184a 100644 --- a/cpu/mpc85xx/config.mk +++ b/cpu/mpc85xx/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -ffixed-r2 -Wa,-me500 -msoft-float -mno-string diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index af0e78e..1d11ab4 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -331,6 +331,23 @@ static void ft_fixup_dpaa_clks(void *blob) #define ft_fixup_dpaa_clks(x) #endif +#ifdef CONFIG_QE +static void ft_fixup_qe_snum(void *blob) +{ + unsigned int svr; + + svr = mfspr(SPRN_SVR); + if (SVR_SOC_VER(svr) == SVR_8569_E) { + if(IS_SVR_REV(svr, 1, 0)) + do_fixup_by_compat_u32(blob, "fsl,qe", + "fsl,qe-num-snums", 46, 1); + else + do_fixup_by_compat_u32(blob, "fsl,qe", + "fsl,qe-num-snums", 76, 1); + } +} +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -367,6 +384,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) "bus-frequency", gd->lbc_clk, 1); #ifdef CONFIG_QE ft_qe_setup(blob); + ft_fixup_qe_snum(blob); #endif #ifdef CONFIG_SYS_NS16550 diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c index 6530cb1..826bf32 100644 --- a/cpu/mpc85xx/mp.c +++ b/cpu/mpc85xx/mp.c @@ -1,5 +1,5 @@ /* - * Copyright 2008-2009 Freescale Semiconductor, Inc. + * Copyright 2008-2010 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -68,6 +68,36 @@ int cpu_status(int nr) return 0; } +#ifdef CONFIG_FSL_CORENET +int cpu_disable(int nr) +{ + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + + setbits_be32(&gur->coredisrl, 1 << nr); + + return 0; +} +#else +int cpu_disable(int nr) +{ + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + + switch (nr) { + case 0: + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU0); + break; + case 1: + setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU1); + break; + default: + printf("Invalid cpu number for disable %d\n", nr); + return 1; + } + + return 0; +} +#endif + static u8 boot_entry_map[4] = { 0, BOOT_ENTRY_PIR, diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index 2103e2e..268edbc 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -80,8 +80,8 @@ void get_sys_info (sys_info_t * sysInfo) freqCC_PLL[2] = sysclk; freqCC_PLL[3] = sysclk; - sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0xf; - sysInfo->freqDDRBus *= ((in_be32(&gur->rcwsr[0]) >> 17) & 0xf); + sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; + sysInfo->freqDDRBus *= ((in_be32(&gur->rcwsr[0]) >> 17) & 0x1f); freqCC_PLL[0] *= (in_be32(&clk->pllc1gsr) >> 1) & 0x3f; freqCC_PLL[1] *= (in_be32(&clk->pllc2gsr) >> 1) & 0x3f; freqCC_PLL[2] *= (in_be32(&clk->pllc3gsr) >> 1) & 0x3f; @@ -103,21 +103,21 @@ void get_sys_info (sys_info_t * sysInfo) #ifdef CONFIG_SYS_DPAA_PME if (rcw_tmp & PME_CLK_SEL) - sysInfo->freqPME = sysInfo->freqSystemBus / 2; - else sysInfo->freqPME = freqCC_PLL[2] / 2; + else + sysInfo->freqPME = sysInfo->freqSystemBus / 2; #endif #ifdef CONFIG_SYS_DPAA_FMAN if (rcw_tmp & FM1_CLK_SEL) - sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2; - else sysInfo->freqFMan[0] = freqCC_PLL[2] / 2; + else + sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2; #if (CONFIG_SYS_NUM_FMAN) == 2 if (rcw_tmp & FM2_CLK_SEL) - sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2; - else sysInfo->freqFMan[1] = freqCC_PLL[2] / 2; + else + sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2; #endif #endif @@ -170,7 +170,12 @@ void get_sys_info (sys_info_t * sysInfo) } #endif if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { -#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \ +#if defined(CONFIG_FSL_CORENET) + /* If this is corenet based SoC, bit-representation + * for four times the clock divider values. + */ + lcrr_div *= 4; +#elif !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \ !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560) /* * Yes, the entire PQ38 family use the same diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 7e60e67..386fa81 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -51,7 +51,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -415,28 +415,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + _START_OFFSET - .long int_return - _start + _START_OFFSET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x0700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + _START_OFFSET - .long int_return - _start + _START_OFFSET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) /* No FPU on MPC85xx. This exception is not supposed to happen. */ @@ -884,6 +871,7 @@ relocate_code: mr r9,r4 /* Save copy of Init Data pointer */ mr r10,r5 /* Save copy of Destination Address */ + GET_GOT mr r3,r5 /* Destination Address */ lis r4,CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4,r4,CONFIG_SYS_MONITOR_BASE@l @@ -901,7 +889,7 @@ relocate_code: sub r15,r10,r4 /* First our own GOT */ - add r14,r14,r15 + add r12,r12,r15 /* the the one used by the C code */ add r30,r30,r15 @@ -971,7 +959,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -1037,6 +1025,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7,GOT(_start_of_vectors) lwz r8,GOT(_end_of_vectors) @@ -1044,8 +1034,6 @@ trap_init: cmplw 0,r7,r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0,0(r7) stw r0,0(r9) @@ -1089,20 +1077,6 @@ trap_init: mtlr r4 /* restore link register */ blr - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0,0(r7) /* hdlr ... */ - add r0,r0,r3 /* ... += dest_addr */ - stw r0,0(r7) - - lwz r0,4(r7) /* int_return ... */ - add r0,r0,r3 /* ... += dest_addr */ - stw r0,4(r7) - - blr - .globl unlock_ram_in_cache unlock_ram_in_cache: /* invalidate the INIT_RAM section */ diff --git a/cpu/mpc86xx/config.mk b/cpu/mpc86xx/config.mk index 13da2cf..ca2f837 100644 --- a/cpu/mpc86xx/config.mk +++ b/cpu/mpc86xx/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -ffixed-r2 -mstring PLATFORM_CPPFLAGS += -maltivec -mabi=altivec -msoft-float diff --git a/cpu/mpc86xx/mp.c b/cpu/mpc86xx/mp.c index 2940673..b4a0faa 100644 --- a/cpu/mpc86xx/mp.c +++ b/cpu/mpc86xx/mp.c @@ -1,3 +1,25 @@ +/* + * Copyright 2008-2010 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + #include <common.h> #include <asm/processor.h> #include <asm/mmu.h> @@ -24,6 +46,26 @@ int cpu_status(int nr) return 0; } +int cpu_disable(int nr) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; + volatile ccsr_gur_t *gur = &immap->im_gur; + + switch (nr) { + case 0: + setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU0); + break; + case 1: + setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU1); + break; + default: + printf("Invalid cpu number for disable %d\n", nr); + return 1; + } + + return 0; +} + int cpu_release(int nr, int argc, char *argv[]) { /* dummy function so common/cmd_mp.c will build diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index e65f1c0..ed1e4ca 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -52,7 +52,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -121,28 +121,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) STD_EXCEPTION(0x800, FPUnavailable, UnknownException) @@ -643,6 +630,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -660,7 +648,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -721,7 +709,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -788,6 +776,8 @@ in_ram: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -795,8 +785,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -848,23 +836,6 @@ trap_init: mtlr r4 /* restore link register */ blr - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - sync - isync - - blr - .globl enable_ext_addr enable_ext_addr: mfspr r0, HID0 diff --git a/cpu/mpc8xx/config.mk b/cpu/mpc8xx/config.mk index 2b3d545..5540d65 100644 --- a/cpu/mpc8xx/config.mk +++ b/cpu/mpc8xx/config.mk @@ -21,6 +21,6 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_8xx -ffixed-r2 -mstring -mcpu=860 -msoft-float diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S index e84326e..7cf602f 100644 --- a/cpu/mpc8xx/start.S +++ b/cpu/mpc8xx/start.S @@ -63,7 +63,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ START_GOT GOT_ENTRY(_GOT2_TABLE_) @@ -231,28 +231,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + EXC_OFF_SYS_RESET - .long int_return - _start + EXC_OFF_SYS_RESET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) /* No FPU on MPC8xx. This exception is not supposed to happen. */ @@ -495,6 +482,7 @@ relocate_code: mr r9, r4 /* Save copy of Global Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -512,7 +500,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -577,7 +565,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -642,6 +630,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start) lwz r8, GOT(_end_of_vectors) @@ -649,8 +639,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -694,20 +682,3 @@ trap_init: mtlr r4 /* restore link register */ blr - - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - sync - isync - - blr diff --git a/cpu/ppc4xx/config.mk b/cpu/ppc4xx/config.mk index 979004b..c1de1e9 100644 --- a/cpu/ppc4xx/config.mk +++ b/cpu/ppc4xx/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_4xx -ffixed-r2 -mstring -msoft-float cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/') diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 46f65aa..927c88c 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -228,7 +228,7 @@ /* * Set up GOT: Global Offset Table * - * Use r14 to access the GOT + * Use r12 to access the GOT */ #if !defined(CONFIG_NAND_SPL) START_GOT @@ -574,28 +574,15 @@ Alignment: mfspr r5,DSISR stw r5,_DSISR(r21) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_Alignment: - .long AlignmentException - _start + _START_OFFSET - .long int_return - _start + _START_OFFSET + EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE) /* Program check exception */ . = 0x700 ProgramCheck: EXCEPTION_PROLOG(SRR0, SRR1) addi r3,r1,STACK_FRAME_OVERHEAD - li r20,MSR_KERNEL - rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ - lwz r6,GOT(transfer_to_handler) - mtlr r6 - blrl -.L_ProgramCheck: - .long ProgramCheckException - _start + _START_OFFSET - .long int_return - _start + _START_OFFSET + EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException, + MSR_KERNEL, COPY_EE) #ifdef CONFIG_440 STD_EXCEPTION(0x800, FPUnavailable, UnknownException) @@ -1502,6 +1489,7 @@ relocate_code: mr r9, r4 /* Save copy of Init Data pointer */ mr r10, r5 /* Save copy of Destination Address */ + GET_GOT mr r3, r5 /* Destination Address */ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l @@ -1519,7 +1507,7 @@ relocate_code: sub r15, r10, r4 /* First our own GOT */ - add r14, r14, r15 + add r12, r12, r15 /* then the one used by the C code */ add r30, r30, r15 @@ -1584,7 +1572,7 @@ relocate_code: in_ram: /* - * Relocation Function, r14 point to got2+0x8000 + * Relocation Function, r12 point to got2+0x8000 * * Adjust got2 pointers, no need to check for 0, this code * already puts a few entries in the table. @@ -1658,6 +1646,8 @@ clear_bss: */ .globl trap_init trap_init: + mflr r4 /* save link register */ + GET_GOT lwz r7, GOT(_start_of_vectors) lwz r8, GOT(_end_of_vectors) @@ -1665,8 +1655,6 @@ trap_init: cmplw 0, r7, r8 bgelr /* return if r7>=r8 - just in case */ - - mflr r4 /* save link register */ 1: lwz r0, 0(r7) stw r0, 0(r9) @@ -1742,20 +1730,6 @@ __440_msr_continue: mtlr r4 /* restore link register */ blr - /* - * Function: relocate entries for one exception vector - */ -trap_reloc: - lwz r0, 0(r7) /* hdlr ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 0(r7) - - lwz r0, 4(r7) /* int_return ... */ - add r0, r0, r3 /* ... += dest_addr */ - stw r0, 4(r7) - - blr - #if defined(CONFIG_440) /*----------------------------------------------------------------------------+ | dcbz_area. |