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-rw-r--r--cpu/mcf5227x/start.S100
-rw-r--r--cpu/mcf523x/start.S75
-rw-r--r--cpu/mcf52x2/start.S176
-rw-r--r--cpu/mcf532x/start.S72
-rw-r--r--cpu/mcf5445x/start.S123
-rw-r--r--cpu/mcf547x_8x/start.S83
6 files changed, 32 insertions, 597 deletions
diff --git a/cpu/mcf5227x/start.S b/cpu/mcf5227x/start.S
index 0c9c89c..30428f1 100644
--- a/cpu/mcf5227x/start.S
+++ b/cpu/mcf5227x/start.S
@@ -24,16 +24,12 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
#endif
-/* last three long word reserved for cache status */
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
-#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
-
#define _START _start
#define _FAULT _fault
@@ -378,21 +374,19 @@ _start:
movec %d0, %RAMBAR1
#endif
+ /* invalidate and disable cache */
+ move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
+ movec %d0, %CACR /* Invalidate cache */
+ move.l #0, %d0
+ movec %d0, %ACR0
+ movec %d0, %ACR1
+
/* initialize general use internal ram */
move.l #0, %d0
move.l #(ICACHE_STATUS), %a1 /* icache */
move.l #(DCACHE_STATUS), %a2 /* icache */
- move.l #(CACR_STATUS), %a3 /* CACR */
move.l %d0, (%a1)
move.l %d0, (%a2)
- move.l %d0, (%a3)
-
- /* invalidate and disable cache */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0, %d0
- movec %d0, %ACR0
- movec %d0, %ACR1
/* set stackpointer to end of internal ram to get some stackspace for
the first c-code */
@@ -510,84 +504,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
- .globl icache_enable
-icache_enable:
- move.l #0x01200000, %d0 /* Invalid cache */
- movec %d0, %CACR
-
- move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
- movec %d0, %ACR0
-
- move.l #0x81600610, %d0 /* Enable cache */
- movec %d0, %CACR
-
- move.l #(ICACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_disable
-icache_disable:
- move.l #0x01F00000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Invalidate icache */
- clr.l %d0
- movec %d0, %ACR0
- movec %d0, %ACR1
-
- move.l #(ICACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_status
-icache_status:
- move.l #(ICACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
- .globl icache_invalid
-icache_invalid:
- move.l #0x80600610, %d0 /* Invalidate icache */
- movec %d0, %CACR /* Enable and invalidate cache */
- rts
-
- .globl dcache_enable
-dcache_enable:
- move.l #0x01200000, %d0 /* Invalid cache */
- movec %d0, %CACR
-
- move.l #0x81300610, %d0
- movec %d0, %CACR
-
- move.l #(DCACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_disable
-dcache_disable:
- move.l #0x81600610, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Invalidate icache */
-
- move.l #(DCACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_invalid
-dcache_invalid:
- move.l #0x81100610, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable and invalidate cache */
- rts
-
- .globl dcache_status
-dcache_status:
- move.l #(DCACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
-/*------------------------------------------------------------------------------*/
.globl version_string
version_string:
diff --git a/cpu/mcf523x/start.S b/cpu/mcf523x/start.S
index d44da37..20b50e7 100644
--- a/cpu/mcf523x/start.S
+++ b/cpu/mcf523x/start.S
@@ -24,6 +24,7 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
@@ -135,7 +136,7 @@ _start:
movec %d0, %RAMBAR1
/* invalidate and disable cache */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
nop
move.l #0, %d0
@@ -144,8 +145,8 @@ _start:
/* initialize general use internal ram */
move.l #0, %d0
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
+ move.l #(ICACHE_STATUS), %a1 /* icache */
+ move.l #(DCACHE_STATUS), %a2 /* icache */
move.l %d0, (%a1)
move.l %d0, (%a2)
@@ -265,74 +266,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
- .globl icache_enable
-icache_enable:
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- nop
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
- move.l #(CONFIG_SYS_FLASH_BASE + 0xc000), %d0 /* Setup cache mask */
- movec %d0, %ACR1 /* Enable cache */
-
- move.l #0x80400100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_disable
-icache_disable:
- move.l #0x00000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0
- movec %d0, %ACR1
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_status
-icache_status:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- move.l (%a1), %d0
- rts
-
- .globl icache_invalid
-icache_invalid:
- move.l #0x80600100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
- rts
-
- .globl dcache_enable
-dcache_enable:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- /* No dcache, just a dummy function */
- .globl dcache_disable
-dcache_disable:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_status
-dcache_status:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- move.l (%a1), %d0
- rts
-
-/*------------------------------------------------------------------------------*/
.globl version_string
version_string:
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 0dd4de5..9ef206a 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -24,12 +24,12 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
#endif
-
#define _START _start
#define _FAULT _fault
@@ -201,6 +201,13 @@ _after_flashbar_copy:
movec %d0, %RAMBAR1
#endif
+ /* initialize general use internal ram */
+ move.l #0, %d0
+ move.l #(ICACHE_STATUS), %a1 /* icache */
+ move.l #(DCACHE_STATUS), %a2 /* icache */
+ move.l %d0, (%a1)
+ move.l %d0, (%a2)
+
/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
clr.l %sp@-
@@ -283,23 +290,6 @@ clear_bss:
cmp.l %a2, %a1
bne 7b
-#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
- /* patch the 3 accesspoints to 3 ichache_state */
- /* quick and dirty */
-
- move.l %a0,%d1
- add.l #(icache_state - CONFIG_SYS_MONITOR_BASE),%d1
- move.l %a0,%a1
- add.l #(icache_state_access_1+2 - CONFIG_SYS_MONITOR_BASE),%a1
- move.l %d1,(%a1)
- move.l %a0,%a1
- add.l #(icache_state_access_2+2 - CONFIG_SYS_MONITOR_BASE),%a1
- move.l %d1,(%a1)
- move.l %a0,%a1
- add.l #(icache_state_access_3+2 - CONFIG_SYS_MONITOR_BASE),%a1
- move.l %d1,(%a1)
-#endif
-
/* calculate relative jump to board_init_r in ram */
move.l %a0, %a1
add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
@@ -336,156 +326,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
-#ifdef CONFIG_M5208
- .globl icache_enable
-icache_enable:
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xC000), %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
-
- move.l #0x80000200, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-#endif
-
-#ifdef CONFIG_M5271
- .globl icache_enable
-icache_enable:
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
-
- move.l #0x80000200, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-#endif
-
-#ifdef CONFIG_M5272
- .globl icache_enable
-icache_enable:
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x0000c000, %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
- move.l #0xff00c000, %d0 /* Setup cache mask */
- movec %d0, %ACR1 /* Enable cache */
- move.l #0x80000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- moveq #1, %d0
- move.l %d0, icache_state
- rts
-#endif
-
-#if defined(CONFIG_M5275)
-/*
- * Instruction cache only
- */
- .globl icache_enable
-icache_enable:
- move.l #0x01400000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x0000c000, %d0 /* Setup SDRAM caching */
- movec %d0, %ACR0 /* Enable cache */
- move.l #0x00000000, %d0 /* No other caching */
- movec %d0, %ACR1 /* Enable cache */
- move.l #0x80400100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- moveq #1, %d0
- move.l %d0, icache_state
- rts
-#endif
-
-#ifdef CONFIG_M5282
- .globl icache_enable
-icache_enable:
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #0x0000c000, %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
- move.l #0xff00c000, %d0 /* Setup cache mask */
- movec %d0, %ACR1 /* Enable cache */
- move.l #0x80400100, %d0 /* Setup cache mask, data cache disabel*/
- movec %d0, %CACR /* Enable cache */
- moveq #1, %d0
-icache_state_access_1:
- move.l %d0, icache_state
- rts
-#endif
-
-#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
- .globl icache_enable
-icache_enable:
- /*
- * Note: The 5249 Documentation doesn't give a bit position for CINV!
- * From the 5272 and the 5307 documentation, I have deduced that it is
- * probably CACR[24]. Should someone say something to Motorola?
- * ~Jeremy
- */
- move.l #0x01000000, %d0 /* Invalidate whole cache */
- move.c %d0,%CACR
- move.l #0xff00c000, %d0 /* Set FLASH cachable: always match (SM=0b10) */
- move.c %d0, %ACR0
- move.l #0x0000c000, %d0 /* Set SDRAM cachable: always match (SM=0b10) */
- move.c %d0, %ACR1
- move.l #0x90000200, %d0 /* Set cache enable cmd */
- move.c %d0,%CACR
- moveq #1, %d0
- move.l %d0, icache_state
- rts
-#endif
-
- .globl icache_disable
-icache_disable:
- move.l #0x00000100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0 /* Enable cache */
- movec %d0, %ACR1 /* Enable cache */
- moveq #0, %d0
-icache_state_access_2:
- move.l %d0, icache_state
- rts
-
- .globl icache_status
-icache_status:
-icache_state_access_3:
- move.l #(icache_state), %a0
- move.l (%a0), %d0
- rts
-
- .data
-icache_state:
- .long 0 /* cache is diabled on inirialization */
-
- .globl dcache_enable
-dcache_enable:
- /* dummy function */
- rts
-
- .globl dcache_disable
-dcache_disable:
- /* dummy function */
- rts
-
- .globl dcache_status
-dcache_status:
- /* dummy function */
- rts
-
-/*------------------------------------------------------------------------------*/
.globl version_string
version_string:
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index 5abd944..a80b0a9 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -27,6 +27,7 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
@@ -142,7 +143,7 @@ _start:
movec %d0, %RAMBAR1
/* invalidate and disable cache */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ move.l #CF_CACR_CINVA, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
@@ -158,8 +159,8 @@ _start:
/* initialize general use internal ram */
move.l #0, %d0
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
+ move.l #(ICACHE_STATUS), %a1 /* icache */
+ move.l #(DCACHE_STATUS), %a2 /* icache */
move.l %d0, (%a1)
move.l %d0, (%a2)
@@ -279,71 +280,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
- .globl icache_enable
-icache_enable:
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0 - 1) << 16)), %d0
- movec %d0, %ACR0 /* Enable cache */
-
- move.l #0x80000200, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_disable
-icache_disable:
- move.l #0x01000000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0
- movec %d0, %ACR1
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_status
-icache_status:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- move.l (%a1), %d0
- rts
-
- .globl icache_invalid
-icache_invalid:
- move.l #0x81000200, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- rts
-
- .globl dcache_enable
-dcache_enable:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- /* No dcache, just a dummy function */
- .globl dcache_disable
-dcache_disable:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_status
-dcache_status:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- move.l (%a1), %d0
- rts
-
-/*------------------------------------------------------------------------------*/
-
.globl version_string
version_string:
.ascii U_BOOT_VERSION
diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S
index d2d4439..738e4a7 100644
--- a/cpu/mcf5445x/start.S
+++ b/cpu/mcf5445x/start.S
@@ -24,16 +24,12 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
#endif
-/* last three long word reserved for cache status */
-#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
-
#define _START _start
#define _FAULT _fault
@@ -160,15 +156,13 @@ asm_dram_init:
/* initialize general use internal ram */
move.l #0, %d0
- move.l #(CACR_STATUS), %a1 /* CACR */
- move.l #(ICACHE_STATUS), %a2 /* icache */
- move.l #(DCACHE_STATUS), %a3 /* dcache */
+ move.l #(ICACHE_STATUS), %a1 /* icache */
+ move.l #(DCACHE_STATUS), %a2 /* dcache */
move.l %d0, (%a1)
move.l %d0, (%a2)
- move.l %d0, (%a3)
/* invalidate and disable cache */
- move.l #0x01004100, %d0 /* Invalidate cache cmd */
+ move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
@@ -411,15 +405,13 @@ _start:
/* initialize general use internal ram */
move.l #0, %d0
- move.l #(CACR_STATUS), %a1 /* CACR */
- move.l #(ICACHE_STATUS), %a2 /* icache */
- move.l #(DCACHE_STATUS), %a3 /* dcache */
+ move.l #(ICACHE_STATUS), %a1 /* icache */
+ move.l #(DCACHE_STATUS), %a2 /* dcache */
move.l %d0, (%a1)
move.l %d0, (%a2)
- move.l %d0, (%a3)
/* invalidate and disable cache */
- move.l #0x01004100, %d0 /* Invalidate cache cmd */
+ move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
@@ -544,107 +536,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
- .globl icache_enable
-icache_enable:
- move.l #(CACR_STATUS), %a1 /* read CACR Status */
- move.l (%a1), %d1
-
- move.l #0x00040100, %d0 /* Invalidate icache */
- movec %d0, %CACR
-
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xC000), %d0 /* Setup icache */
- movec %d0, %ACR2
-
- move.l #0x04088020, %d0 /* Enable bcache and icache */
- movec %d0, %CACR
-
- move.l #(ICACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_disable
-icache_disable:
- move.l #(CACR_STATUS), %a1 /* read CACR Status */
- move.l (%a1), %d0
-
- move.l #0xFFF77BFF, %d0
- or.l #0x00040100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Invalidate icache */
- clr.l %d0
- movec %d0, %ACR2
- movec %d0, %ACR3
-
- move.l #(ICACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_status
-icache_status:
- move.l #(ICACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
- .globl icache_invalid
-icache_invalid:
- move.l #(CACR_STATUS), %a1 /* read CACR Status */
- move.l (%a1), %d0
-
- move.l #0x00040100, %d0 /* Invalidate icache */
- movec %d0, %CACR /* Enable and invalidate cache */
- rts
-
- .globl dcache_enable
-dcache_enable:
- move.l #(CACR_STATUS), %a1 /* read CACR Status */
- move.l (%a1), %d1
-
- move.l #0x01040100, %d0
- movec %d0, %CACR /* Invalidate dcache */
-
- move.l #0x80088020, %d0 /* Enable bcache and icache */
- movec %d0, %CACR
-
- move.l #(DCACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_disable
-dcache_disable:
- move.l #(CACR_STATUS), %a1 /* read CACR Status */
- move.l (%a1), %d0
-
- and.l #0x7FFFFFFF, %d0
- or.l #0x01000000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable dcache */
- clr.l %d0
- movec %d0, %ACR0
- movec %d0, %ACR1
-
- move.l #(DCACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_invalid
-dcache_invalid:
- move.l #(CACR_STATUS), %a1 /* read CACR Status */
- move.l (%a1), %d0
-
- move.l #0x81088020, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable and invalidate cache */
- rts
-
- .globl dcache_status
-dcache_status:
- move.l #(DCACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
-/*------------------------------------------------------------------------------*/
.globl version_string
version_string:
diff --git a/cpu/mcf547x_8x/start.S b/cpu/mcf547x_8x/start.S
index 94ef14b..8411862 100644
--- a/cpu/mcf547x_8x/start.S
+++ b/cpu/mcf547x_8x/start.S
@@ -24,16 +24,12 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
#endif
-/* last three long word reserved for cache status */
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
-#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
-
#define _START _start
#define _FAULT _fault
@@ -158,10 +154,8 @@ _start:
move.l #0, %d0
move.l #(ICACHE_STATUS), %a1 /* icache */
move.l #(DCACHE_STATUS), %a2 /* icache */
- move.l #(CACR_STATUS), %a3 /* CACR */
move.l %d0, (%a1)
move.l %d0, (%a2)
- move.l %d0, (%a3)
/* set stackpointer to end of internal ram to get some stackspace for the
first c-code */
@@ -279,81 +273,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
- .globl icache_enable
-icache_enable:
- move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
- movec %d0, %ACR2 /* Enable cache */
-
- move.l #0x020C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
- move.l #(ICACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_disable
-icache_disable:
- move.l #0x000C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR2
- movec %d0, %ACR3
-
- move.l #(ICACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_invalid
-icache_invalid:
- move.l #0x000C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- rts
-
- .globl icache_status
-icache_status:
- move.l #(ICACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
- .globl dcache_enable
-dcache_enable:
- bsr icache_disable
-
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0
- movec %d0, %ACR0 /* Enable cache */
-
- move.l #0xA30C8100, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
-
- move.l #(DCACHE_STATUS), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_disable
-dcache_disable:
- move.l #0xA30C8100, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0
- movec %d0, %ACR1
-
- move.l #(DCACHE_STATUS), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_status
-dcache_status:
- move.l #(DCACHE_STATUS), %a1
- move.l (%a1), %d0
- rts
-
-/*------------------------------------------------------------------------------*/
.globl version_string
version_string:
generated by cgit v1.1 at 2024-12-16 20:06:22 +0000