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Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc512x/speed.c21
-rw-r--r--cpu/ppc4xx/4xx_enet.c10
2 files changed, 25 insertions, 6 deletions
diff --git a/cpu/mpc512x/speed.c b/cpu/mpc512x/speed.c
index 99e3495..cfaffb5 100644
--- a/cpu/mpc512x/speed.c
+++ b/cpu/mpc512x/speed.c
@@ -67,12 +67,14 @@ int get_clocks (void)
u8 cpmf;
u8 sys_div;
u8 ips_div;
+ u8 pci_div;
u32 ref_clk = CFG_MPC512X_CLKIN;
u32 spll;
u32 sys_clk;
u32 core_clk;
u32 csb_clk;
u32 ips_clk;
+ u32 pci_clk;
if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
return -1;
@@ -95,8 +97,16 @@ int get_clocks (void)
/* in case we cannot get a sane IPS divisor, fail gracefully */
ips_clk = 0;
}
+ pci_div = (im->clk.scfr[0] & SCFR1_PCI_DIV_MASK) >> SCFR1_PCI_DIV_SHIFT;
+ if (pci_div != 0) {
+ pci_clk = csb_clk / pci_div;
+ } else {
+ /* in case we cannot get a sane IPS divisor, fail gracefully */
+ pci_clk = 333333;
+ }
gd->ips_clk = ips_clk;
+ gd->pci_clk = pci_clk;
gd->csb_clk = csb_clk;
gd->cpu_clk = core_clk;
gd->bus_clk = csb_clk;
@@ -115,11 +125,12 @@ ulong get_bus_freq (ulong dummy)
int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- printf ("Clock configuration:\n");
- printf (" CPU: %4d MHz\n", gd->cpu_clk / 1000000);
- printf (" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
- printf (" IPS Bus: %4d MHz\n", gd->ips_clk / 1000000);
- printf (" DDR: %4d MHz\n", 2 * gd->csb_clk / 1000000);
+ printf("Clock configuration:\n");
+ printf(" CPU: %4d MHz\n", gd->cpu_clk / 1000000);
+ printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
+ printf(" IPS Bus: %4d MHz\n", gd->ips_clk / 1000000);
+ printf(" PCI: %4d MHz\n", gd->pci_clk / 1000000);
+ printf(" DDR: %4d MHz\n", 2 * gd->csb_clk / 1000000);
return 0;
}
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 44659ff..5ef1005 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -487,6 +487,9 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
#endif
u32 bd_cached;
u32 bd_uncached = 0;
+#ifdef CONFIG_4xx_DCACHE
+ static u32 last_used_ea = 0;
+#endif
EMAC_4XX_HW_PST hw_p = dev->priv;
@@ -850,7 +853,12 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
#ifdef CONFIG_4xx_DCACHE
flush_dcache_range(bd_cached, bd_cached + MAL_ALLOC_SIZE);
- bd_uncached = bis->bi_memsize;
+ if (!last_used_ea)
+ bd_uncached = bis->bi_memsize;
+ else
+ bd_uncached = last_used_ea + MAL_ALLOC_SIZE;
+
+ last_used_ea = bd_uncached;
program_tlb(bd_cached, bd_uncached, MAL_ALLOC_SIZE,
TLB_WORD2_I_ENABLE);
#else