diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm1136/config.mk | 3 | ||||
| -rw-r--r-- | cpu/arm1136/start.S | 12 | ||||
| -rw-r--r-- | cpu/ixp/pci.c | 23 |
3 files changed, 17 insertions, 21 deletions
diff --git a/cpu/arm1136/config.mk b/cpu/arm1136/config.mk index 077514a..ca9dc25 100644 --- a/cpu/arm1136/config.mk +++ b/cpu/arm1136/config.mk @@ -22,4 +22,5 @@ # PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ -PLATFORM_CPPFLAGS += -mapcs-32 -march=armv6 +# Make ARMv5 to allow more compilers to work, even though its v6. +PLATFORM_CPPFLAGS += -mapcs-32 -march=armv5 diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index 8cacc16..27fcc89 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -113,6 +113,7 @@ reset: #ifdef CONFIG_OMAP2420H4 /* Copy vectors to mask ROM indirect addr */ adr r0, _start /* r0 <- current position of code */ + add r0, r0, #4 /* skip reset vector */ mov r2, #64 /* r2 <- size to copy */ add r2, r0, r2 /* r2 <- source end address */ mov r1, #SRAM_OFFSET0 /* build vect addr */ @@ -125,10 +126,8 @@ next: stmia r1!, {r3-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ bne next /* loop until equal */ -#ifdef CONFIG_PARTIAL_SRAM bl cpy_clk_code /* put dpll adjust code behind vectors */ #endif -#endif /* the mask ROM code should have PLL and others stable */ bl cpu_init_crit @@ -199,20 +198,13 @@ cpu_init_crit: bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) orr r0, r0, #0x00000002 @ set bit 2 (A) Align -#ifndef CONFIG_ICACHE_OFF orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache -#endif mcr p15, 0, r0, c1, c0, 0 /* * Jump to board specific initialization... The Mask ROM will have already initialized * basic memory. Go here to bump up clock rate and handle wake up conditions. */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* pass on info about skipping some init portions */ - moveq r0,#0x1 /* flag to skip prcm and sdrc setup */ - movne r0,#0x0 mov ip, lr /* persevere link reg across call */ bl platformsetup /* go setup pll,mux,memory */ mov lr, ip /* restore link */ @@ -405,7 +397,7 @@ arm1136_cache_flush: .globl reset_cpu reset_cpu: ldr r1, rstctl /* get addr for global reset reg */ - mov r3, #0x3 /* full reset pll+mpu */ + mov r3, #0x2 /* full reset pll+mpu */ str r3, [r1] /* force reset */ mov r0, r0 _loop_forever: diff --git a/cpu/ixp/pci.c b/cpu/ixp/pci.c index 703be4a..33c1cff 100644 --- a/cpu/ixp/pci.c +++ b/cpu/ixp/pci.c @@ -68,27 +68,30 @@ PciBar *memBars[IXP425_PCI_MAX_BAR]; PciBar *ioBars[IXP425_PCI_MAX_BAR]; PciDevice devices[IXP425_PCI_MAX_FUNC_ON_BUS]; -extern void out_8 (volatile unsigned *addr, char val) +void out_8 (volatile unsigned *addr, char val) { *addr = val; } -extern void out_le16 (volatile unsigned *addr, unsigned short val) + +void out_le16 (volatile unsigned *addr, unsigned short val) { *addr = cpu_to_le16 (val); } -extern void out_le32 (volatile unsigned *addr, unsigned int val) + +void out_le32 (volatile unsigned *addr, unsigned int val) { *addr = cpu_to_le32 (val); } -extern unsigned char in_8 (volatile unsigned *addr) +unsigned char in_8 (volatile unsigned *addr) { unsigned char val; val = *addr; return val; } -extern unsigned short in_le16 (volatile unsigned *addr) + +unsigned short in_le16 (volatile unsigned *addr) { unsigned short val; @@ -96,7 +99,8 @@ extern unsigned short in_le16 (volatile unsigned *addr) val = le16_to_cpu (val); return val; } -extern unsigned in_le32 (volatile unsigned *addr) + +unsigned in_le32 (volatile unsigned *addr) { unsigned int val; @@ -552,10 +556,9 @@ void sys_pci_device_bars_write (void) pci_write_config_dword (devices[i].device, PCI_CFG_BASE_ADDRESS_0, devices[i].bar[0].address); - addr = BIT (31 - - devices[i]. - device) | (0 << PCI_NP_AD_FUNCSL) | - (PCI_CFG_BASE_ADDRESS_0) & ~3; + addr = (BIT (31 - devices[i].device) | + (0 << PCI_NP_AD_FUNCSL) | + (PCI_CFG_BASE_ADDRESS_0) ) & ~3; pci_write_config_dword (devices[i].device, PCI_CFG_DEV_INT_LINE, devices[i].irq); |