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-rw-r--r--cpu/mpc85xx/cpu.c21
-rw-r--r--cpu/mpc85xx/mp.c6
-rw-r--r--cpu/mpc85xx/release.S25
-rw-r--r--cpu/mpc85xx/speed.c4
-rw-r--r--cpu/mpc86xx/cpu.c10
-rw-r--r--cpu/mpc86xx/cpu_init.c4
-rw-r--r--cpu/mpc8xxx/cpu.c93
7 files changed, 106 insertions, 57 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 4724f27..6be98dc 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -54,24 +54,23 @@ int checkcpu (void)
int i;
svr = get_svr();
- ver = SVR_SOC_VER(svr);
major = SVR_MAJ(svr);
#ifdef CONFIG_MPC8536
major &= 0x7; /* the msb of this nibble is a mfg code */
#endif
minor = SVR_MIN(svr);
-#if (CONFIG_NUM_CPUS > 1)
- volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
- printf("CPU%d: ", pic->whoami);
-#else
- puts("CPU: ");
-#endif
+ if (cpu_numcores() > 1) {
+ volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+ printf("CPU%d: ", pic->whoami);
+ } else {
+ puts("CPU: ");
+ }
- cpu = identify_cpu(ver);
- if (cpu) {
- puts(cpu->name);
+ cpu = gd->cpu;
+ if (cpu->name) {
+ puts(cpu->name);
if (IS_E_PROCESSOR(svr))
puts("E");
} else {
@@ -104,7 +103,7 @@ int checkcpu (void)
get_sys_info(&sysinfo);
puts("Clock Configuration:");
- for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+ for (i = 0; i < cpu_numcores(); i++) {
if (!(i & 3))
printf ("\n ");
printf("CPU%d:%-4s MHz, ",
diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index 76f02a4..2df55c7 100644
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008 Freescale Semiconductor.
+ * Copyright 2008-2009 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -157,7 +157,7 @@ static void pq3_mp_up(unsigned long bootpg)
out_be32(&gur->devdisr, devdisr);
/* release the hounds */
- up = ((1 << CONFIG_NUM_CPUS) - 1);
+ up = ((1 << cpu_numcores()) - 1);
bpcr = in_be32(&ecm->eebpcr);
bpcr |= (up << 24);
out_be32(&ecm->eebpcr, bpcr);
@@ -167,7 +167,7 @@ static void pq3_mp_up(unsigned long bootpg)
/* wait for everyone */
while (timeout) {
int i;
- for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+ for (i = 0; i < cpu_numcores(); i++) {
if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
cpu_up_mask |= (1 << i);
};
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index fbefc2c..2d4f219 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -1,3 +1,26 @@
+/*
+ * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Kumar Gala <kumar.gala@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
#include <config.h>
#include <mpc85xx.h>
#include <version.h>
@@ -203,7 +226,7 @@ __secondary_start_page:
.align L1_CACHE_SHIFT
.globl __spin_table
__spin_table:
- .space CONFIG_NUM_CPUS*ENTRY_SIZE
+ .space CONFIG_MAX_CPUS*ENTRY_SIZE
/* Fill in the empty space. The actual reset vector is
* the last word of the page */
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 286b6b2..3ef49b4 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004, 2007-2009 Freescale Semiconductor Inc.
+ * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc.
* (C) Copyright 2003 Motorola Inc.
* Xianghua Xiao, (X.Xiao@motorola.com)
*
@@ -51,7 +51,7 @@ void get_sys_info (sys_info_t * sysInfo)
/* Divide before multiply to avoid integer
* overflow for processor speeds above 2GHz */
half_freqSystemBus = sysInfo->freqSystemBus/2;
- for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+ for (i = 0; i < cpu_numcores(); i++) {
e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f;
sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus;
}
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 32d06d2..04409ce 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -30,6 +30,8 @@
#include <mpc86xx.h>
#include <asm/fsl_law.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Default board reset function
*/
@@ -61,12 +63,12 @@ checkcpu(void)
puts("CPU: ");
- cpu = identify_cpu(ver);
- if (cpu) {
+ cpu = gd->cpu;
+
+ if (cpu->name)
puts(cpu->name);
- } else {
+ else
puts("Unknown");
- }
printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
puts("Core: ");
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 341e815..5a78a9c 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004,2009 Freescale Semiconductor, Inc.
* Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
@@ -129,7 +129,7 @@ void cpu_init_f(void)
*/
int cpu_init_r(void)
{
-#if (CONFIG_NUM_CPUS > 1)
+#if defined(CONFIG_MP)
setup_mp();
#endif
return 0;
diff --git a/cpu/mpc8xxx/cpu.c b/cpu/mpc8xxx/cpu.c
index e34ef33..17aed62 100644
--- a/cpu/mpc8xxx/cpu.c
+++ b/cpu/mpc8xxx/cpu.c
@@ -35,41 +35,41 @@ DECLARE_GLOBAL_DATA_PTR;
struct cpu_type cpu_type_list [] = {
#if defined(CONFIG_MPC85xx)
- CPU_TYPE_ENTRY(8533, 8533),
- CPU_TYPE_ENTRY(8533, 8533_E),
- CPU_TYPE_ENTRY(8535, 8535),
- CPU_TYPE_ENTRY(8535, 8535_E),
- CPU_TYPE_ENTRY(8536, 8536),
- CPU_TYPE_ENTRY(8536, 8536_E),
- CPU_TYPE_ENTRY(8540, 8540),
- CPU_TYPE_ENTRY(8541, 8541),
- CPU_TYPE_ENTRY(8541, 8541_E),
- CPU_TYPE_ENTRY(8543, 8543),
- CPU_TYPE_ENTRY(8543, 8543_E),
- CPU_TYPE_ENTRY(8544, 8544),
- CPU_TYPE_ENTRY(8544, 8544_E),
- CPU_TYPE_ENTRY(8545, 8545),
- CPU_TYPE_ENTRY(8545, 8545_E),
- CPU_TYPE_ENTRY(8547, 8547_E),
- CPU_TYPE_ENTRY(8548, 8548),
- CPU_TYPE_ENTRY(8548, 8548_E),
- CPU_TYPE_ENTRY(8555, 8555),
- CPU_TYPE_ENTRY(8555, 8555_E),
- CPU_TYPE_ENTRY(8560, 8560),
- CPU_TYPE_ENTRY(8567, 8567),
- CPU_TYPE_ENTRY(8567, 8567_E),
- CPU_TYPE_ENTRY(8568, 8568),
- CPU_TYPE_ENTRY(8568, 8568_E),
- CPU_TYPE_ENTRY(8569, 8569),
- CPU_TYPE_ENTRY(8569, 8569_E),
- CPU_TYPE_ENTRY(8572, 8572),
- CPU_TYPE_ENTRY(8572, 8572_E),
- CPU_TYPE_ENTRY(P2020, P2020),
- CPU_TYPE_ENTRY(P2020, P2020_E),
+ CPU_TYPE_ENTRY(8533, 8533, 1),
+ CPU_TYPE_ENTRY(8533, 8533_E, 1),
+ CPU_TYPE_ENTRY(8535, 8535, 1),
+ CPU_TYPE_ENTRY(8535, 8535_E, 1),
+ CPU_TYPE_ENTRY(8536, 8536, 1),
+ CPU_TYPE_ENTRY(8536, 8536_E, 1),
+ CPU_TYPE_ENTRY(8540, 8540, 1),
+ CPU_TYPE_ENTRY(8541, 8541, 1),
+ CPU_TYPE_ENTRY(8541, 8541_E, 1),
+ CPU_TYPE_ENTRY(8543, 8543, 1),
+ CPU_TYPE_ENTRY(8543, 8543_E, 1),
+ CPU_TYPE_ENTRY(8544, 8544, 1),
+ CPU_TYPE_ENTRY(8544, 8544_E, 1),
+ CPU_TYPE_ENTRY(8545, 8545, 1),
+ CPU_TYPE_ENTRY(8545, 8545_E, 1),
+ CPU_TYPE_ENTRY(8547, 8547_E, 1),
+ CPU_TYPE_ENTRY(8548, 8548, 1),
+ CPU_TYPE_ENTRY(8548, 8548_E, 1),
+ CPU_TYPE_ENTRY(8555, 8555, 1),
+ CPU_TYPE_ENTRY(8555, 8555_E, 1),
+ CPU_TYPE_ENTRY(8560, 8560, 1),
+ CPU_TYPE_ENTRY(8567, 8567, 1),
+ CPU_TYPE_ENTRY(8567, 8567_E, 1),
+ CPU_TYPE_ENTRY(8568, 8568, 1),
+ CPU_TYPE_ENTRY(8568, 8568_E, 1),
+ CPU_TYPE_ENTRY(8569, 8569, 1),
+ CPU_TYPE_ENTRY(8569, 8569_E, 1),
+ CPU_TYPE_ENTRY(8572, 8572, 2),
+ CPU_TYPE_ENTRY(8572, 8572_E, 2),
+ CPU_TYPE_ENTRY(P2020, P2020, 2),
+ CPU_TYPE_ENTRY(P2020, P2020_E, 2),
#elif defined(CONFIG_MPC86xx)
- CPU_TYPE_ENTRY(8610, 8610),
- CPU_TYPE_ENTRY(8641, 8641),
- CPU_TYPE_ENTRY(8641D, 8641D),
+ CPU_TYPE_ENTRY(8610, 8610, 1),
+ CPU_TYPE_ENTRY(8641, 8641, 2),
+ CPU_TYPE_ENTRY(8641D, 8641D, 2),
#endif
};
@@ -84,6 +84,31 @@ struct cpu_type *identify_cpu(u32 ver)
return NULL;
}
+int cpu_numcores() {
+ struct cpu_type *cpu;
+ cpu = gd->cpu;
+ return cpu->num_cores;
+}
+
+int probecpu (void)
+{
+ uint svr;
+ uint ver;
+
+ svr = get_svr();
+ ver = SVR_SOC_VER(svr);
+
+ gd->cpu = identify_cpu(ver);
+
+#ifndef CONFIG_MP
+ if (cpu_numcores() > 1) {
+ puts("Unicore software on multiprocessor system!!\n"
+ "To enable mutlticore build define CONFIG_MP\n");
+ }
+#endif
+ return 0;
+}
+
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
generated by cgit v1.1 at 2024-11-28 17:49:35 +0000