diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc85xx/cpu_init.c | 8 | ||||
| -rw-r--r-- | cpu/mpc85xx/spd_sdram.c | 8 | ||||
| -rw-r--r-- | cpu/mpc85xx/start.S | 2 |
3 files changed, 18 insertions, 0 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index fdb9ecb..9a65142 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -31,6 +31,7 @@ #include <asm/processor.h> #include <ioports.h> #include <asm/io.h> +#include <asm/fsl_law.h> DECLARE_GLOBAL_DATA_PTR; @@ -140,6 +141,9 @@ void cpu_init_f (void) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); +#ifdef CONFIG_FSL_LAW + init_laws(); +#endif #ifdef CONFIG_CPM2 config_8560_ioports((ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR); @@ -222,11 +226,15 @@ void cpu_init_f (void) int cpu_init_r(void) { #ifdef CONFIG_CLEAR_LAW0 +#ifdef CONFIG_FSL_LAW + disable_law(0); +#else volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR); /* clear alternate boot location LAW (used for sdram, or ddr bank) */ ecm->lawar0 = 0; #endif +#endif #if defined(CONFIG_L2_CACHE) volatile ccsr_l2cache_t *l2cache = (void *)CFG_MPC85xx_L2_ADDR; diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c index adc9c4d..bb5dc1f 100644 --- a/cpu/mpc85xx/spd_sdram.c +++ b/cpu/mpc85xx/spd_sdram.c @@ -27,6 +27,7 @@ #include <i2c.h> #include <spd.h> #include <asm/mmu.h> +#include <asm/fsl_law.h> #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) @@ -1022,7 +1023,9 @@ spd_sdram(void) static unsigned int setup_laws_and_tlbs(unsigned int memsize) { +#ifndef CONFIG_FSL_LAW volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR); +#endif unsigned int tlb_size; unsigned int law_size; unsigned int ram_tlb_index; @@ -1098,12 +1101,17 @@ setup_laws_and_tlbs(unsigned int memsize) /* * Set up LAWBAR for all of DDR. */ + +#ifdef CONFIG_FSL_LAW + set_law(1, CFG_DDR_SDRAM_BASE, law_size, LAW_TRGT_IF_DDR); +#else ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); ecm->lawar1 = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size)); debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1); debug("DDR: LARAR1=0x%08x\n", ecm->lawar1); +#endif /* * Confirm that the requested amount of memory was mapped. diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index b489d2f..346369c 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -201,6 +201,7 @@ _start_e500: lis r7,CFG_CCSRBAR@h ori r7,r7,CFG_CCSRBAR@l +#ifndef CONFIG_FSL_LAW bl law_entry mr r6,r0 lwzu r5,0(r6) /* how many windows we actually use */ @@ -216,6 +217,7 @@ _start_e500: addi r2,r2,0x0020 addi r1,r1,0x0020 bdnz 0b +#endif /* Clear and set up some registers. */ li r0,0 |