diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm926ejs/at91/Makefile | 7 | ||||
| -rw-r--r-- | cpu/arm926ejs/at91/clock.c | 202 | ||||
| -rw-r--r-- | cpu/arm926ejs/at91/config.mk | 2 | ||||
| -rw-r--r-- | cpu/arm926ejs/at91/cpu.c | 14 | ||||
| -rw-r--r-- | cpu/arm926ejs/at91/lowlevel_init.S | 2 | ||||
| -rw-r--r-- | cpu/arm926ejs/at91/timer.c | 82 | ||||
| -rw-r--r-- | cpu/arm926ejs/at91/u-boot.lds.S (renamed from cpu/arm926ejs/at91/u-boot.lds) | 9 |
7 files changed, 276 insertions, 42 deletions
diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile index 34e7461..fbc82d1 100644 --- a/cpu/arm926ejs/at91/Makefile +++ b/cpu/arm926ejs/at91/Makefile @@ -55,17 +55,22 @@ COBJS-y += at91sam9rl_serial.o COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9rl_spi.o endif COBJS-$(CONFIG_AT91_LED) += led.o +COBJS-y += clock.o +COBJS-y += cpu.o COBJS-y += timer.o SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) -all: $(obj).depend $(LIB) +all: $(obj).depend $(LIB) $(obj)u-boot.lds $(LIB): $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -DCONFIG_BOARDDIR=$(BOARDDIR) -P $^ > $@ + ######################################################################### # defines $(obj).depend target diff --git a/cpu/arm926ejs/at91/clock.c b/cpu/arm926ejs/at91/clock.c new file mode 100644 index 0000000..31e53b3 --- /dev/null +++ b/cpu/arm926ejs/at91/clock.c @@ -0,0 +1,202 @@ +/* + * [origin: Linux kernel linux/arch/arm/mach-at91/clock.c] + * + * Copyright (C) 2005 David Brownell + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <config.h> +#include <asm/arch/hardware.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> +#include <asm/arch/io.h> + +static unsigned long cpu_clk_rate_hz; +static unsigned long main_clk_rate_hz; +static unsigned long mck_rate_hz; +static unsigned long plla_rate_hz; +static unsigned long pllb_rate_hz; +static u32 at91_pllb_usb_init; + +unsigned long get_cpu_clk_rate(void) +{ + return cpu_clk_rate_hz; +} + +unsigned long get_main_clk_rate(void) +{ + return main_clk_rate_hz; +} + +unsigned long get_mck_clk_rate(void) +{ + return mck_rate_hz; +} + +unsigned long get_plla_clk_rate(void) +{ + return plla_rate_hz; +} + +unsigned long get_pllb_clk_rate(void) +{ + return pllb_rate_hz; +} + +u32 get_pllb_init(void) +{ + return at91_pllb_usb_init; +} + +static unsigned long at91_css_to_rate(unsigned long css) +{ + switch (css) { + case AT91_PMC_CSS_SLOW: + return AT91_SLOW_CLOCK; + case AT91_PMC_CSS_MAIN: + return main_clk_rate_hz; + case AT91_PMC_CSS_PLLA: + return plla_rate_hz; + case AT91_PMC_CSS_PLLB: + return pllb_rate_hz; + } + + return 0; +} + +#ifdef CONFIG_USB_ATMEL +static unsigned at91_pll_calc(unsigned main_freq, unsigned out_freq) +{ + unsigned i, div = 0, mul = 0, diff = 1 << 30; + unsigned ret = (out_freq > 155000000) ? 0xbe00 : 0x3e00; + + /* PLL output max 240 MHz (or 180 MHz per errata) */ + if (out_freq > 240000000) + goto fail; + + for (i = 1; i < 256; i++) { + int diff1; + unsigned input, mul1; + + /* + * PLL input between 1MHz and 32MHz per spec, but lower + * frequences seem necessary in some cases so allow 100K. + * Warning: some newer products need 2MHz min. + */ + input = main_freq / i; +#if defined(CONFIG_AT91SAM9G20) + if (input < 2000000) + continue; +#endif + if (input < 100000) + continue; + if (input > 32000000) + continue; + + mul1 = out_freq / input; +#if defined(CONFIG_AT91SAM9G20) + if (mul > 63) + continue; +#endif + if (mul1 > 2048) + continue; + if (mul1 < 2) + goto fail; + + diff1 = out_freq - input * mul1; + if (diff1 < 0) + diff1 = -diff1; + if (diff > diff1) { + diff = diff1; + div = i; + mul = mul1; + if (diff == 0) + break; + } + } + if (i == 256 && diff > (out_freq >> 5)) + goto fail; + return ret | ((mul - 1) << 16) | div; +fail: + return 0; +} + +static u32 at91_pll_rate(u32 freq, u32 reg) +{ + unsigned mul, div; + + div = reg & 0xff; + mul = (reg >> 16) & 0x7ff; + if (div && mul) { + freq /= div; + freq *= mul + 1; + } else + freq = 0; + + return freq; +} +#endif + +int at91_clock_init(unsigned long main_clock) +{ + unsigned freq, mckr; +#ifndef AT91_MAIN_CLOCK + unsigned tmp; + /* + * When the bootloader initialized the main oscillator correctly, + * there's no problem using the cycle counter. But if it didn't, + * or when using oscillator bypass mode, we must be told the speed + * of the main clock. + */ + if (!main_clock) { + do { + tmp = at91_sys_read(AT91_CKGR_MCFR); + } while (!(tmp & AT91_PMC_MAINRDY)); + main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16); + } +#endif + main_clk_rate_hz = main_clock; + + /* report if PLLA is more than mildly overclocked */ + plla_rate_hz = at91_pll_rate(main_clock, at91_sys_read(AT91_CKGR_PLLAR)); + +#ifdef CONFIG_USB_ATMEL + /* + * USB clock init: choose 48 MHz PLLB value, + * disable 48MHz clock during usb peripheral suspend. + * + * REVISIT: assumes MCK doesn't derive from PLLB! + */ + at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | + AT91_PMC_USB96M; + pllb_rate_hz = at91_pll_rate(main_clock, at91_pllb_usb_init); +#endif + + /* + * MCK and CPU derive from one of those primary clocks. + * For now, assume this parentage won't change. + */ + mckr = at91_sys_read(AT91_PMC_MCKR); + freq = mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_CSS); + freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2)); /* prescale */ +#if defined(CONFIG_AT91RM9200) + mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ +#elif defined(CONFIG_AT91SAM9G20) + mck_rate_hz = (mckr & AT91_PMC_MDIV) ? + freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq; /* mdiv ; (x >> 7) = ((x >> 8) * 2) */ + if (mckr & AT91_PMC_PDIV) + freq /= 2; /* processor clock division */ +#else + mck_rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ +#endif + cpu_clk_rate_hz = freq; + + return 0; +} + diff --git a/cpu/arm926ejs/at91/config.mk b/cpu/arm926ejs/at91/config.mk index 06177e6..147bd4c 100644 --- a/cpu/arm926ejs/at91/config.mk +++ b/cpu/arm926ejs/at91/config.mk @@ -1,2 +1,2 @@ PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) -LDSCRIPT := $(SRCTREE)/cpu/arm926ejs/at91/u-boot.lds +LDSCRIPT := $(OBJTREE)/cpu/arm926ejs/at91/u-boot.lds diff --git a/cpu/arm926ejs/at91/cpu.c b/cpu/arm926ejs/at91/cpu.c new file mode 100644 index 0000000..a9705cf --- /dev/null +++ b/cpu/arm926ejs/at91/cpu.c @@ -0,0 +1,14 @@ +#include <config.h> +#include <asm/arch/hardware.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/clk.h> +#include <asm/arch/io.h> + +int arch_cpu_init(void) +{ +#ifdef AT91_MAIN_CLOCK + return at91_clock_init(AT91_MAIN_CLOCK); +#else + return at91_clock_init(0); +#endif +} diff --git a/cpu/arm926ejs/at91/lowlevel_init.S b/cpu/arm926ejs/at91/lowlevel_init.S index ec6ad5d..54b3f3d 100644 --- a/cpu/arm926ejs/at91/lowlevel_init.S +++ b/cpu/arm926ejs/at91/lowlevel_init.S @@ -30,6 +30,8 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT .globl lowlevel_init +.weak lowlevel_init +.set lowlevel_init,function lowlevel_init: /* diff --git a/cpu/arm926ejs/at91/timer.c b/cpu/arm926ejs/at91/timer.c index fec545b..c84cb5e 100644 --- a/cpu/arm926ejs/at91/timer.c +++ b/cpu/arm926ejs/at91/timer.c @@ -27,7 +27,9 @@ #include <asm/arch/at91_pit.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> #include <asm/arch/io.h> +#include <div64.h> /* * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by @@ -36,11 +38,26 @@ #define TIMER_LOAD_VAL 0xfffff #define READ_RESET_TIMER at91_sys_read(AT91_PIT_PIVR) #define READ_TIMER at91_sys_read(AT91_PIT_PIIR) -#define TIMER_FREQ (AT91C_MASTER_CLOCK << 4) -#define TICKS_TO_USEC(ticks) ((ticks) / 6) -ulong get_timer_masked(void); -ulong resettime; +static ulong timestamp; +static ulong lastinc; +static ulong timer_freq; + +static inline unsigned long long tick_to_time(unsigned long long tick) +{ + tick *= CONFIG_SYS_HZ; + do_div(tick, timer_freq); + + return tick; +} + +static inline unsigned long long usec_to_tick(unsigned long long usec) +{ + usec *= timer_freq; + do_div(usec, 1000000); + + return usec; +} /* nothing really to do with interrupts, just starts up a counter. */ int timer_init(void) @@ -56,41 +73,49 @@ int timer_init(void) reset_timer_masked(); + timer_freq = get_mck_clk_rate() >> 4; + return 0; } /* * timer without interrupts */ - -static inline ulong get_timer_raw(void) +unsigned long long get_ticks(void) { ulong now = READ_TIMER; - if (now >= resettime) - return now - resettime; - else - return 0xFFFFFFFFUL - (resettime - now) ; + if (now >= lastinc) /* normal mode (non roll) */ + /* move stamp forward with absolut diff ticks */ + timestamp += (now - lastinc); + else /* we have rollover of incrementer */ + timestamp += (0xFFFFFFFF - lastinc) + now; + lastinc = now; + return timestamp; } void reset_timer_masked(void) { - resettime = READ_TIMER; + /* reset time */ + lastinc = READ_TIMER; /* capture current incrementer value time */ + timestamp = 0; /* start "advancing" time stamp from 0 */ } ulong get_timer_masked(void) { - return TICKS_TO_USEC(get_timer_raw()); - + return tick_to_time(get_ticks()); } -void udelay_masked(unsigned long usec) +void udelay(unsigned long usec) { - ulong tmp; + unsigned long long tmp; + ulong tmo; - tmp = get_timer(0); - while (get_timer(tmp) < usec) /* our timer works in usecs */ - ; /* NOP */ + tmo = usec_to_tick(usec); + tmp = get_ticks() + tmo; /* get current timestamp */ + + while (get_ticks() < tmp) /* loop till event */ + /*NOP*/; } void reset_timer(void) @@ -100,26 +125,7 @@ void reset_timer(void) ulong get_timer(ulong base) { - ulong now = get_timer_masked(); - - if (now >= base) - return now - base; - else - return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ; -} - -void udelay(unsigned long usec) -{ - udelay_masked(usec); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); + return get_timer_masked () - base; } /* diff --git a/cpu/arm926ejs/at91/u-boot.lds b/cpu/arm926ejs/at91/u-boot.lds.S index ebb1f93..4e82bca 100644 --- a/cpu/arm926ejs/at91/u-boot.lds +++ b/cpu/arm926ejs/at91/u-boot.lds.S @@ -21,6 +21,8 @@ * MA 02111-1307 USA */ +#include <config.h> + OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") /*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ OUTPUT_ARCH(arm) @@ -32,8 +34,11 @@ SECTIONS . = ALIGN(4); .text : { - cpu/arm926ejs/start.o (.text) - *(.text) + cpu/arm926ejs/start.o (.text) +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + board/CONFIG_BOARDDIR/lowlevel_init.o (.text) +#endif + *(.text) } . = ALIGN(4); |