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-rw-r--r--cpu/at32ap/at32ap700x/sm.h2
-rw-r--r--cpu/at32ap/cpu.c3
-rw-r--r--cpu/mips/au1x00_serial.c2
-rw-r--r--cpu/pxa/mmc.c5
4 files changed, 5 insertions, 7 deletions
diff --git a/cpu/at32ap/at32ap700x/sm.h b/cpu/at32ap/at32ap700x/sm.h
index 6492c8e..b6e4409 100644
--- a/cpu/at32ap/at32ap700x/sm.h
+++ b/cpu/at32ap/at32ap700x/sm.h
@@ -21,7 +21,7 @@
#define SM_PM_IMR 0x0048
#define SM_PM_ISR 0x004c
#define SM_PM_ICR 0x0050
-#define SM_PM_GCCTRL 0x0060
+#define SM_PM_GCCTRL(x) (0x0060 + 4 * x)
#define SM_RTC_CTRL 0x0080
#define SM_RTC_VAL 0x0084
#define SM_RTC_TOP 0x0088
diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
index 0ba8361..1a13702 100644
--- a/cpu/at32ap/cpu.c
+++ b/cpu/at32ap/cpu.c
@@ -65,6 +65,9 @@ int cpu_init(void)
sysreg_write(EVBA, (unsigned long)&_evba);
asm volatile("csrf %0" : : "i"(SYSREG_EM_OFFSET));
+ if(gclk_init)
+ gclk_init();
+
return 0;
}
diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c
index 6309794..e8baab5 100644
--- a/cpu/mips/au1x00_serial.c
+++ b/cpu/mips/au1x00_serial.c
@@ -76,7 +76,7 @@ void serial_setbrg (void)
sd = (*sys_powerctrl & 0x03) + 2;
/* calulate 2x baudrate and round */
- divisorx2 = ((CFG_HZ/(sd * 16 * CONFIG_BAUDRATE)));
+ divisorx2 = ((CFG_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE)));
if (divisorx2 & 0x01)
divisorx2 = divisorx2 + 1;
diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c
index 2c86a01..121dcbe 100644
--- a/cpu/pxa/mmc.c
+++ b/cpu/pxa/mmc.c
@@ -559,11 +559,6 @@ mmc_init(int verbose)
set_GPIO_mode(GPIO8_MMCCS0_MD);
#endif
CKEN |= CKEN12_MMC; /* enable MMC unit clock */
-#if defined(CONFIG_ADSVIX)
- /* turn on the power */
- GPCR(114) = GPIO_bit(114);
- udelay(1000);
-#endif
MMC_CLKRT = MMC_CLKRT_0_3125MHZ;
MMC_RESTO = MMC_RES_TO_MAX;