diff options
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/ppc4xx/405gp_pci.c | 30 | ||||
-rw-r--r-- | cpu/ppc4xx/config.mk | 2 | ||||
-rw-r--r-- | cpu/ppc4xx/tlb.c | 8 | ||||
-rwxr-xr-x[-rw-r--r--] | cpu/ppc4xx/traps.c | 87 |
4 files changed, 117 insertions, 10 deletions
diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c index 8bf03e1..2837929 100644 --- a/cpu/ppc4xx/405gp_pci.c +++ b/cpu/ppc4xx/405gp_pci.c @@ -77,11 +77,21 @@ #include <asm/processor.h> #include <pci.h> +#ifdef CONFIG_PCI + DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_405GP) || defined(CONFIG_405EP) +/* + * Board-specific pci initialization + * Platform code can reimplement pci_pre_init() if needed + */ +int __pci_pre_init(struct pci_controller *hose) +{ + return 1; +} +int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init"))); -#ifdef CONFIG_PCI +#if defined(CONFIG_405GP) || defined(CONFIG_405EP) #if defined(CONFIG_PMC405) ushort pmc405_pci_subsys_deviceid(void); @@ -191,6 +201,13 @@ void pci_405gp_init(struct pci_controller *hose) if (hose->pci_fb) pciauto_region_init(hose->pci_fb); + /* Let board change/modify hose & do initial checks */ + if (pci_pre_init (hose) == 0) { + printf("PCI: Board-specific initialization failed.\n"); + printf("PCI: Configuration aborted.\n"); + return; + } + pci_register_hose(hose); /*--------------------------------------------------------------------------+ @@ -416,14 +433,12 @@ void pci_init_board(void) #endif -#endif /* CONFIG_PCI */ - #endif /* CONFIG_405GP */ /*-----------------------------------------------------------------------------+ * CONFIG_440 *-----------------------------------------------------------------------------*/ -#if defined(CONFIG_440) && defined(CONFIG_PCI) +#if defined(CONFIG_440) static struct pci_controller ppc440_hose = {0}; @@ -496,14 +511,12 @@ void pci_440_init (struct pci_controller *hose) pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA); -#if defined(CFG_PCI_PRE_INIT) /* Let board change/modify hose & do initial checks */ if (pci_pre_init (hose) == 0) { printf("PCI: Board-specific initialization failed.\n"); printf("PCI: Configuration aborted.\n"); return; } -#endif pci_register_hose( hose ); @@ -575,4 +588,5 @@ void pci_init_board(void) #endif } -#endif /* CONFIG_440 & CONFIG_PCI */ +#endif /* CONFIG_440 */ +#endif /* CONFIG_PCI */ diff --git a/cpu/ppc4xx/config.mk b/cpu/ppc4xx/config.mk index e7fc3f63..4fd5108 100644 --- a/cpu/ppc4xx/config.mk +++ b/cpu/ppc4xx/config.mk @@ -24,7 +24,7 @@ PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing PLATFORM_CPPFLAGS += -DCONFIG_4xx -ffixed-r2 -ffixed-r29 -mstring -msoft-float -cfg=$(shell grep configs $(TOPDIR)/include/config.h | sed 's/.*<\(configs.*\)>/\1/') +cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/') is440=$(shell grep CONFIG_440 $(TOPDIR)/include/$(cfg)) ifneq (,$(findstring CONFIG_440,$(is440))) diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c index 6c916ef..049a785 100644 --- a/cpu/ppc4xx/tlb.c +++ b/cpu/ppc4xx/tlb.c @@ -101,6 +101,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_256MB, tlb_i)) == 0) { mem_size -= TLB_256MB_SIZE; phys_addr += TLB_256MB_SIZE; + virt_addr += TLB_256MB_SIZE; } } else if (((phys_addr & TLB_16MB_ALIGN_MASK) == phys_addr) && (mem_size >= TLB_16MB_SIZE)) { @@ -109,6 +110,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_16MB, tlb_i)) == 0) { mem_size -= TLB_16MB_SIZE; phys_addr += TLB_16MB_SIZE; + virt_addr += TLB_16MB_SIZE; } } else if (((phys_addr & TLB_1MB_ALIGN_MASK) == phys_addr) && (mem_size >= TLB_1MB_SIZE)) { @@ -117,6 +119,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_1MB, tlb_i)) == 0) { mem_size -= TLB_1MB_SIZE; phys_addr += TLB_1MB_SIZE; + virt_addr += TLB_1MB_SIZE; } } else if (((phys_addr & TLB_256KB_ALIGN_MASK) == phys_addr) && (mem_size >= TLB_256KB_SIZE)) { @@ -125,6 +128,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_256KB, tlb_i)) == 0) { mem_size -= TLB_256KB_SIZE; phys_addr += TLB_256KB_SIZE; + virt_addr += TLB_256KB_SIZE; } } else if (((phys_addr & TLB_64KB_ALIGN_MASK) == phys_addr) && (mem_size >= TLB_64KB_SIZE)) { @@ -133,6 +137,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_64KB, tlb_i)) == 0) { mem_size -= TLB_64KB_SIZE; phys_addr += TLB_64KB_SIZE; + virt_addr += TLB_64KB_SIZE; } } else if (((phys_addr & TLB_16KB_ALIGN_MASK) == phys_addr) && (mem_size >= TLB_16KB_SIZE)) { @@ -141,6 +146,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_16KB, tlb_i)) == 0) { mem_size -= TLB_16KB_SIZE; phys_addr += TLB_16KB_SIZE; + virt_addr += TLB_16KB_SIZE; } } else if (((phys_addr & TLB_4KB_ALIGN_MASK) == phys_addr) && (mem_size >= TLB_4KB_SIZE)) { @@ -149,6 +155,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_4KB, tlb_i)) == 0) { mem_size -= TLB_4KB_SIZE; phys_addr += TLB_4KB_SIZE; + virt_addr += TLB_4KB_SIZE; } } else if (((phys_addr & TLB_1KB_ALIGN_MASK) == phys_addr) && (mem_size >= TLB_1KB_SIZE)) { @@ -157,6 +164,7 @@ static void program_tlb_addr(unsigned long phys_addr, TLB_WORD0_SIZE_1KB, tlb_i)) == 0) { mem_size -= TLB_1KB_SIZE; phys_addr += TLB_1KB_SIZE; + virt_addr += TLB_1KB_SIZE; } } else { printf("ERROR: no TLB size exists for the base address 0x%0X.\n", diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c index 7c44a29..eb9420e 100644..100755 --- a/cpu/ppc4xx/traps.c +++ b/cpu/ppc4xx/traps.c @@ -145,6 +145,9 @@ void MachineCheckException(struct pt_regs *regs) { unsigned long fixup, val; +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) + u32 value2; +#endif /* Probing PCI using config cycles cause this exception * when a device is not present. Catch it and return to @@ -203,7 +206,89 @@ MachineCheckException(struct pt_regs *regs) /* Clear MCSR */ mtspr(SPRN_MCSR, val); } -#endif +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) + mfsdram(DDR0_00, val) ; + printf("DDR0: DDR0_00 %p\n", val); + val = (val >> 16) & 0xff; + if (val & 0x80) + printf("DDR0: At least one interrupt active\n"); + if (val & 0x40) + printf("DDR0: DRAM initialization complete.\n"); + if (val & 0x20) + printf("DDR0: Multiple uncorrectable ECC events.\n"); + if (val & 0x10) + printf("DDR0: Single uncorrectable ECC event.\n"); + if (val & 0x08) + printf("DDR0: Multiple correctable ECC events.\n"); + if (val & 0x04) + printf("DDR0: Single correctable ECC event.\n"); + if (val & 0x02) + printf("Multiple accesses outside the defined" + " physical memory space detected\n"); + if (val & 0x01) + printf("DDR0: Single access outside the defined" + " physical memory space detected.\n"); + + mfsdram(DDR0_01, val); + val = (val >> 8) & 0x7; + switch (val ) { + case 0: + printf("DDR0: Write Out-of-Range command\n"); + break; + case 1: + printf("DDR0: Read Out-of-Range command\n"); + break; + case 2: + printf("DDR0: Masked write Out-of-Range command\n"); + break; + case 4: + printf("DDR0: Wrap write Out-of-Range command\n"); + break; + case 5: + printf("DDR0: Wrap read Out-of-Range command\n"); + break; + default: + mfsdram(DDR0_01, value2); + printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2); + } + mfsdram(DDR0_23, val); + if ( (val >> 16) & 0xff) + printf("DDR0: Syndrome for correctable ECC event 0x%x\n", + (val >> 16) & 0xff); + mfsdram(DDR0_23, val); + if ( (val >> 8) & 0xff) + printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n", + (val >> 8) & 0xff); + mfsdram(DDR0_33, val); + if (val) + printf("DDR0: Address of command that caused an " + "Out-of-Range interrupt %p\n", val); + mfsdram(DDR0_34, val); + if (val) + printf("DDR0: Address of uncorrectable ECC event %p\n", val); + mfsdram(DDR0_35, val); + if (val) + printf("DDR0: Address of uncorrectable ECC event %p\n", val); + mfsdram(DDR0_36, val); + if (val) + printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); + mfsdram(DDR0_37, val); + if (val) + printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); + mfsdram(DDR0_38, val); + if (val) + printf("DDR0: Address of correctable ECC event %p\n", val); + mfsdram(DDR0_39, val); + if (val) + printf("DDR0: Address of correctable ECC event %p\n", val); + mfsdram(DDR0_40, val); + if (val) + printf("DDR0: Data of correctable ECC event 0x%08x\n", val); + mfsdram(DDR0_41, val); + if (val) + printf("DDR0: Data of correctable ECC event 0x%08x\n", val); +#endif /* CONFIG_440EPX */ +#endif /* CONFIG_440 */ show_regs(regs); print_backtrace((unsigned long *)regs->gpr[1]); panic("machine check"); |