diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm_cortexa8/mx53/generic.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/cpu/arm_cortexa8/mx53/generic.c b/cpu/arm_cortexa8/mx53/generic.c index 6df3820..3d0772d 100644 --- a/cpu/arm_cortexa8/mx53/generic.c +++ b/cpu/arm_cortexa8/mx53/generic.c @@ -1017,3 +1017,54 @@ int arch_cpu_init(void) } #endif +void set_usboh3_clk(void) +{ + unsigned int reg; + + reg = readl(MXC_CCM_CSCMR1) & + ~MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK; + reg |= 1 << MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET; + writel(reg, MXC_CCM_CSCMR1); + + reg = readl(MXC_CCM_CSCDR1); + reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK; + reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK; + reg |= 4 << MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET; + reg |= 1 << MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET; + + writel(reg, MXC_CCM_CSCDR1); +} + +void set_usb_phy1_clk(void) +{ + unsigned int reg; + + reg = readl(MXC_CCM_CSCMR1); + reg &= ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL; + writel(reg, MXC_CCM_CSCMR1); +} + +void enable_usboh3_clk(unsigned char enable) +{ + unsigned int reg; + + reg = readl(MXC_CCM_CCGR2); + if (enable) + reg |= 1 << MXC_CCM_CCGR2_CG14_OFFSET; + else + reg &= ~(1 << MXC_CCM_CCGR2_CG14_OFFSET); + writel(reg, MXC_CCM_CCGR2); +} + +void enable_usb_phy1_clk(unsigned char enable) +{ + unsigned int reg; + + reg = readl(MXC_CCM_CCGR4); + if (enable) + reg |= 1 << MXC_CCM_CCGR4_CG5_OFFSET; + else + reg &= ~(1 << MXC_CCM_CCGR4_CG5_OFFSET); + writel(reg, MXC_CCM_CCGR4); +} + |