diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mcf52x2/start.S | 6 | ||||
| -rw-r--r-- | cpu/mcf532x/start.S | 4 | ||||
| -rw-r--r-- | cpu/mips/config.mk | 2 | ||||
| -rw-r--r-- | cpu/mips/start.S | 19 | ||||
| -rw-r--r-- | cpu/mpc824x/interrupts.c | 2 | ||||
| -rw-r--r-- | cpu/mpc8260/cpu.c | 38 | ||||
| -rw-r--r-- | cpu/mpc85xx/cpu.c | 7 | ||||
| -rw-r--r-- | cpu/mpc85xx/start.S | 24 |
8 files changed, 78 insertions, 24 deletions
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 686e2a5..260a09a 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -58,7 +58,7 @@ _vectors: .long 0x00000000 /* Flash offset is 0 until we setup CS0 */ #if defined(CONFIG_R5200) .long 0x400 -#elif defined(CONFIG_M5282) +#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) .long _start - TEXT_BASE #else .long _START @@ -177,7 +177,11 @@ _after_flashbar_copy: * therefore no VBR to set */ #if !defined(CONFIG_MONITOR_IS_IN_RAM) +#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) + move.l #CFG_INT_FLASH_BASE, %d0 +#else move.l #CFG_FLASH_BASE, %d0 +#endif movec %d0, %VBR #endif diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 5cc1c87..61be2ea 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -131,7 +131,7 @@ _start: movec %d0, %VBR move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR0 + movec %d0, %RAMBAR1 /* invalidate and disable cache */ move.l #0x01000000, %d0 /* Invalidate cache cmd */ @@ -268,7 +268,7 @@ _int_handler: icache_enable: move.l #0x01000000, %d0 /* Invalidate cache cmd */ movec %d0, %CACR /* Invalidate cache */ - move.l #(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0 + move.l #(CFG_SDRAM_BASE + 0x1c000), %d0 movec %d0, %ACR0 /* Enable cache */ move.l #0x80000200, %d0 /* Setup cache mask */ diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk index b29986e..487c4eb 100644 --- a/cpu/mips/config.mk +++ b/cpu/mips/config.mk @@ -35,6 +35,6 @@ else ENDIANNESS = -EB endif -MIPSFLAGS += $(ENDIANNESS) -mabicalls +MIPSFLAGS += $(ENDIANNESS) PLATFORM_CPPFLAGS += $(MIPSFLAGS) diff --git a/cpu/mips/start.S b/cpu/mips/start.S index e91e213..074d01d 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -234,11 +234,11 @@ reset: li t0, CONF_CM_UNCACHED mtc0 t0, CP0_CONFIG - /* Initialize GOT pointer. + /* Initialize $gp. */ bal 1f nop - .word _GLOBAL_OFFSET_TABLE_ + .word _gp 1: move gp, ra lw t1, 0(ra) @@ -306,9 +306,9 @@ relocate_code: move t1, a2 /* - * Fix GOT pointer: + * Fix $gp: * - * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address + * New $gp = (Old $gp - CFG_MONITOR_BASE) + Destination Address */ move t6, gp sub gp, CFG_MONITOR_BASE @@ -341,15 +341,22 @@ relocate_code: j t0 nop + .gpword _GLOBAL_OFFSET_TABLE_ /* _GLOBAL_OFFSET_TABLE_ - _gp */ .word uboot_end_data .word uboot_end .word num_got_entries in_ram: - /* Now we want to update GOT. + /* + * Now we want to update GOT. + * + * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object + * generated by GNU ld. Skip these reserved entries from relocation. */ lw t3, -4(t0) /* t3 <-- num_got_entries */ - addi t4, gp, 8 /* Skipping first two entries. */ + lw t4, -16(t0) /* t4 <-- (_GLOBAL_OFFSET_TABLE_ - _gp) */ + add t4, t4, gp /* t4 now holds _GLOBAL_OFFSET_TABLE_ */ + addi t4, t4, 8 /* Skipping first two entries. */ li t2, 2 1: lw t1, 0(t4) diff --git a/cpu/mpc824x/interrupts.c b/cpu/mpc824x/interrupts.c index acb8947..4359ecc 100644 --- a/cpu/mpc824x/interrupts.c +++ b/cpu/mpc824x/interrupts.c @@ -86,7 +86,7 @@ void irq_free_handler (int vec) vga? */ -void timer_interrupt_cpu (struct pt_regs *regs, ulong timestamp) +void timer_interrupt_cpu (struct pt_regs *regs) { /* nothing to do here */ return; diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 94651dc..c2b753d 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -47,6 +47,11 @@ #include <asm/processor.h> #include <asm/cpm_8260.h> +#if defined(CONFIG_OF_LIBFDT) +#include <libfdt.h> +#include <libfdt_env.h> +#endif + DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_GET_CPU_STR_F) @@ -294,3 +299,36 @@ void watchdog_reset (void) #endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ +#if defined(CONFIG_OF_LIBFDT) +static void do_fixup(void *fdt, const char *node, const char *prop, + const void *val, int len, int create) +{ +#if defined(DEBUG) + int i; + debug("Updating property '%s/%s' = ", node, prop); + for (i = 0; i < len; i++) + debug(" %.2x", *(u8*)(val+i)); + debug("\n"); +#endif + int rc = fdt_find_and_setprop(fdt, node, prop, val, len, create); + if (rc) + printf("Unable to update property %s:%s, err=%s\n", + node, prop, fdt_strerror(rc)); +} + +static void do_fixup_u32(void *fdt, const char *node, const char *prop, + u32 val, int create) +{ + val = cpu_to_fdt32(val); + do_fixup(fdt, node, prop, &val, sizeof(val), create); +} + +void ft_cpu_setup (void *blob, bd_t *bd) +{ + char * cpu_path = "/cpus/" OF_CPU; + + do_fixup_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); + do_fixup_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); + do_fixup_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); +} +#endif /* CONFIG_OF_LIBFDT */ diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 08e0468..bbc5444 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -163,7 +163,12 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) * Initiate hard reset in debug control register DBCR0 * Make sure MSR[DE] = 1 */ - unsigned long val; + unsigned long val, msr; + + msr = mfmsr (); + msr |= MSR_DE; + mtmsr (msr); + val = mfspr(DBCR0); val |= 0x70000000; mtspr(DBCR0,val); diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 2c98c2a..b769ef8 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -218,6 +218,8 @@ _start_e500: bdnz 0b /* Clear and set up some registers. */ + li r0,0 + mtmsr r0 li r0,0x0000 lis r1,0xffff mtspr DEC,r0 /* prevent dec exceptions */ @@ -266,18 +268,17 @@ _start_e500: */ lis r3,CFG_INIT_RAM_ADDR@h ori r3,r3,CFG_INIT_RAM_ADDR@l - li r2,512 /* 512*32=16K */ + li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r2 li r0,0 1: dcbz r0,r3 dcbtls 0,r0,r3 - addi r3,r3,32 + addi r3,r3,CFG_CACHELINE_SIZE bdnz 1b /* Jump out the last 4K page and continue to 'normal' start */ #ifdef CFG_RAMBOOT - bl 3f b _start_cont #else /* Calculate absolute address in FLASH and jump there */ @@ -286,15 +287,9 @@ _start_e500: ori r3,r3,CFG_MONITOR_BASE@l addi r3,r3,_start_cont - _start + _START_OFFSET mtlr r3 + blr #endif -3: li r0,0 - mtspr SRR1,r0 /* Keep things disabled for now */ - mflr r1 - mtspr SRR0,r1 - rfi - isync - .text .globl _start _start: @@ -701,6 +696,7 @@ in8: .globl out8 out8: stb r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -710,6 +706,7 @@ out8: .globl out16 out16: sth r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -719,6 +716,7 @@ out16: .globl out16r out16r: sthbrx r4,r0,r3 + sync blr /*------------------------------------------------------------------------------- */ @@ -728,6 +726,7 @@ out16r: .globl out32 out32: stw r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -737,6 +736,7 @@ out32: .globl out32r out32r: stwbrx r4,r0,r3 + sync blr /*------------------------------------------------------------------------------- */ @@ -1061,11 +1061,11 @@ unlock_ram_in_cache: /* invalidate the INIT_RAM section */ lis r3,(CFG_INIT_RAM_ADDR & ~31)@h ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l - li r4,512 + li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r4 1: icbi r0,r3 dcbi r0,r3 - addi r3,r3,32 + addi r3,r3,CFG_CACHELINE_SIZE bdnz 1b sync /* Wait for all icbi to complete on bus */ isync |