diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 27 | ||||
| -rw-r--r-- | cpu/mpc86xx/start.S | 5 |
2 files changed, 0 insertions, 32 deletions
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index bfea4b3..e501caf 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -1123,7 +1123,6 @@ spd_sdram(void) int memsize_ddr1 = 0; unsigned int law_size_ddr1; volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; #ifdef CONFIG_DDR_INTERLEAVE volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; #endif @@ -1181,13 +1180,6 @@ spd_sdram(void) */ #ifdef CONFIG_FSL_LAW set_law(1, CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV); -#else - mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - mcm->lawar1 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR_INTERLEAVED - | (LAWAR_SIZE & law_size_interleaved)); - debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); - debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); #endif debug("Interleaved memory size is 0x%08lx\n", memsize_total); @@ -1245,13 +1237,6 @@ spd_sdram(void) */ #ifdef CONFIG_FSL_LAW set_law(1, CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1); -#else - mcm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - mcm->lawar1 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR1 - | (LAWAR_SIZE & law_size_ddr1)); - debug("DDR: LAWBAR1=0x%08x\n", mcm->lawbar1); - debug("DDR: LAWAR1=0x%08x\n", mcm->lawar1); #endif } @@ -1281,18 +1266,6 @@ spd_sdram(void) set_law(8, (ddr1_enabled ? (memsize_ddr1 * 1024 * 1024) : CFG_DDR_SDRAM_BASE), law_size_ddr2, LAW_TRGT_IF_DDR_2); -#else - if (ddr1_enabled) - mcm->lawbar8 = (((memsize_ddr1 * 1024 * 1024) >> 12) - & 0xfffff); - else - mcm->lawbar8 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - - mcm->lawar8 = (LAWAR_EN - | LAWAR_TRGT_IF_DDR2 - | (LAWAR_SIZE & law_size_ddr2)); - debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8); - debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8); #endif } diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 8df27f7..f163521 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -283,11 +283,6 @@ in_flash: bl setup_ccsrbar #endif -#ifndef CONFIG_FSL_LAW - bl law_entry - sync -#endif - /* run low-level CPU init code (from Flash) */ bl cpu_init_f sync |