diff options
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/arm_cortexa8/omap3/Makefile | 1 | ||||
-rw-r--r-- | cpu/arm_cortexa8/omap3/reset.S | 36 | ||||
-rw-r--r-- | cpu/arm_cortexa8/start.S | 14 |
3 files changed, 37 insertions, 14 deletions
diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile index 1fbd0dc..eef165c 100644 --- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a SOBJS := lowlevel_init.o +SOBJS += reset.o COBJS += board.o COBJS += cache.o diff --git a/cpu/arm_cortexa8/omap3/reset.S b/cpu/arm_cortexa8/omap3/reset.S new file mode 100644 index 0000000..a53c408 --- /dev/null +++ b/cpu/arm_cortexa8/omap3/reset.S @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2009 Samsung Electronics. + * Minkyu Kang <mk7.kang@samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.global reset_cpu +reset_cpu: + ldr r1, rstctl @ get addr for global reset + @ reg + mov r3, #0x2 @ full reset pll + mpu + str r3, [r1] @ force reset + mov r0, r0 +_loop_forever: + b _loop_forever +rstctl: + .word PRM_RSTCTRL diff --git a/cpu/arm_cortexa8/start.S b/cpu/arm_cortexa8/start.S index 66b4820..6bd6552 100644 --- a/cpu/arm_cortexa8/start.S +++ b/cpu/arm_cortexa8/start.S @@ -500,17 +500,3 @@ finished_inval: @ but we compile with armv5 ldmfd r13!, {r0 - r5, r7, r9 - r12, pc} - - - .align 5 -.global reset_cpu -reset_cpu: - ldr r1, rstctl @ get addr for global reset - @ reg - mov r3, #0x2 @ full reset pll + mpu - str r3, [r1] @ force reset - mov r0, r0 -_loop_forever: - b _loop_forever -rstctl: - .word PRM_RSTCTRL |