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-rw-r--r--cpu/pxa/i2c.c98
-rw-r--r--cpu/pxa/interrupts.c1
-rw-r--r--cpu/pxa/mmc.c26
-rw-r--r--cpu/pxa/pxafb.c88
-rw-r--r--cpu/pxa/start.S9
5 files changed, 110 insertions, 112 deletions
diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c
index 406f825..cc2c49c 100644
--- a/cpu/pxa/i2c.c
+++ b/cpu/pxa/i2c.c
@@ -36,16 +36,16 @@
#ifdef CONFIG_HARD_I2C
-/*
- * - CFG_I2C_SPEED
- * - I2C_PXA_SLAVE_ADDR
+/*
+ * - CFG_I2C_SPEED
+ * - I2C_PXA_SLAVE_ADDR
*/
#include <asm/arch/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <i2c.h>
-//#define DEBUG_I2C 1 /* activate local debugging output */
+/*#define DEBUG_I2C 1 /###* activate local debugging output */
#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */
#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
#define I2C_ISR_INIT 0x7FF
@@ -63,7 +63,7 @@
#define I2C_COND_STOP 2
/* Shall the current transfer be ack/nacked or being waited for it? */
-#define I2C_ACKNAK_WAITACK 1
+#define I2C_ACKNAK_WAITACK 1
#define I2C_ACKNAK_SENDACK 2
#define I2C_ACKNAK_SENDNAK 4
@@ -74,37 +74,37 @@
/* All transfers are described by this data structure */
struct i2c_msg {
u8 condition;
- u8 acknack;
- u8 direction;
+ u8 acknack;
+ u8 direction;
u8 data;
};
/**
- * i2c_pxa_reset: - reset the host controller
+ * i2c_pxa_reset: - reset the host controller
*
*/
static void i2c_reset( void )
{
ICR &= ~ICR_IUE; /* disable unit */
- ICR |= ICR_UR; /* reset the unit */
- udelay(100);
- ICR &= ~ICR_IUE; /* disable unit */
- CKEN |= CKEN14_I2C; /* set the global I2C clock on */
- ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */
- ICR = I2C_ICR_INIT; /* set control register values */
- ISR = I2C_ISR_INIT; /* set clear interrupt bits */
- ICR |= ICR_IUE; /* enable unit */
- udelay(100);
+ ICR |= ICR_UR; /* reset the unit */
+ udelay(100);
+ ICR &= ~ICR_IUE; /* disable unit */
+ CKEN |= CKEN14_I2C; /* set the global I2C clock on */
+ ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */
+ ICR = I2C_ICR_INIT; /* set control register values */
+ ISR = I2C_ISR_INIT; /* set clear interrupt bits */
+ ICR |= ICR_IUE; /* enable unit */
+ udelay(100);
}
/**
- * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
+ * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
* are set and cleared
*
- * @return: 0 in case of success, 1 means timeout (no match within 10 ms).
+ * @return: 0 in case of success, 1 means timeout (no match within 10 ms).
*/
static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask )
@@ -116,15 +116,15 @@ static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_ma
if( timeout-- < 0 ) return 0;
}
- return 1;
+ return 1;
}
/**
* i2c_transfer: - Transfer one byte over the i2c bus
*
- * This function can tranfer a byte over the i2c bus in both directions.
- * It is used by the public API functions.
+ * This function can tranfer a byte over the i2c bus in both directions.
+ * It is used by the public API functions.
*
* @return: 0: transfer successful
* -1: message is empty
@@ -133,12 +133,12 @@ static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_ma
* -4: receive timeout
* -5: illegal parameters
* -6: bus is busy and couldn't be aquired
- */
+ */
int i2c_transfer(struct i2c_msg *msg)
{
int ret;
- if (!msg)
+ if (!msg)
goto transfer_error_msg_empty;
switch(msg->direction) {
@@ -154,14 +154,14 @@ int i2c_transfer(struct i2c_msg *msg)
ICR &= ~ICR_STOP;
IDBR = msg->data;
if (msg->condition == I2C_COND_START) ICR |= ICR_START;
- if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP;
+ if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP;
if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR |= ICR_ACKNAK;
if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
ICR &= ~ICR_ALDIE;
- ICR |= ICR_TB;
+ ICR |= ICR_TB;
/* transmit register empty? */
- if (!i2c_isr_set_cleared(ISR_ITE,0))
+ if (!i2c_isr_set_cleared(ISR_ITE,0))
goto transfer_error_transmit_timeout;
/* clear 'transmit empty' state */
@@ -169,7 +169,7 @@ int i2c_transfer(struct i2c_msg *msg)
/* wait for ACK from slave */
if (msg->acknack == I2C_ACKNAK_WAITACK)
- if (!i2c_isr_set_cleared(0,ISR_ACKNAK))
+ if (!i2c_isr_set_cleared(0,ISR_ACKNAK))
goto transfer_error_ack_missing;
break;
@@ -190,8 +190,8 @@ int i2c_transfer(struct i2c_msg *msg)
ICR |= ICR_TB;
/* receive register full? */
- if (!i2c_isr_set_cleared(ISR_IRF,0))
- goto transfer_error_receive_timeout;
+ if (!i2c_isr_set_cleared(ISR_IRF,0))
+ goto transfer_error_receive_timeout;
msg->data = IDBR;
@@ -206,9 +206,9 @@ int i2c_transfer(struct i2c_msg *msg)
}
- return 0;
+ return 0;
-transfer_error_msg_empty:
+transfer_error_msg_empty:
PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
ret = -1; goto i2c_transfer_finish;
@@ -245,7 +245,7 @@ i2c_transfer_finish:
void i2c_init(int speed, int slaveaddr)
{
-#ifdef CFG_I2C_INIT_BOARD
+#ifdef CFG_I2C_INIT_BOARD
/* call board specific i2c bus reset routine before accessing the */
/* environment, which might be in a chip on that bus. For details */
/* about this problem see doc/I2C_Edge_Conditions. */
@@ -257,7 +257,7 @@ void i2c_init(int speed, int slaveaddr)
/**
* i2c_probe: - Test if a chip answers for a given i2c address
*
- * @chip: address of the chip which is searched for
+ * @chip: address of the chip which is searched for
* @return: 0 if a chip was found, -1 otherwhise
*/
@@ -287,7 +287,7 @@ int i2c_probe(uchar chip)
* i2c_read: - Read multiple bytes from an i2c device
*
* The higher level routines take into account that this function is only
- * called with len < page length of the device (see configuration file)
+ * called with len < page length of the device (see configuration file)
*
* @chip: address of the chip which is to be read
* @addr: i2c data address within the chip
@@ -315,12 +315,12 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
msg.data = (chip << 1);
msg.data &= 0xFE;
if ((ret=i2c_transfer(&msg))) return -1;
-
+
/*
- * send memory address bytes;
- * alen defines how much bytes we have to send.
+ * send memory address bytes;
+ * alen defines how much bytes we have to send.
*/
- //addr &= ((1 << CFG_EEPROM_PAGE_WRITE_BITS)-1);
+ /*addr &= ((1 << CFG_EEPROM_PAGE_WRITE_BITS)-1); */
addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
@@ -334,7 +334,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
msg.data = addr_bytes[alen];
if ((ret=i2c_transfer(&msg))) return -1;
}
-
+
/* start read sequence */
PRINTD(("i2c_read: start read sequence\n"));
@@ -348,7 +348,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
/* read bytes; send NACK at last byte */
while (len--) {
- if (len==0) {
+ if (len==0) {
msg.condition = I2C_COND_STOP;
msg.acknack = I2C_ACKNAK_SENDNAK;
} else {
@@ -376,12 +376,12 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
* i2c_write: - Write multiple bytes to an i2c device
*
* The higher level routines take into account that this function is only
- * called with len < page length of the device (see configuration file)
+ * called with len < page length of the device (see configuration file)
*
* @chip: address of the chip which is to be written
* @addr: i2c data address within the chip
* @alen: length of the i2c data address (1..2 bytes)
- * @buffer: where to find the data to be written
+ * @buffer: where to find the data to be written
* @len: how much byte do we want to read
* @return: 0 in case of success
*/
@@ -403,10 +403,10 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
msg.data = (chip << 1);
msg.data &= 0xFE;
if (i2c_transfer(&msg)) return -1;
-
+
/*
- * send memory address bytes;
- * alen defines how much bytes we have to send.
+ * send memory address bytes;
+ * alen defines how much bytes we have to send.
*/
addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
@@ -421,13 +421,13 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
msg.data = addr_bytes[alen];
if (i2c_transfer(&msg)) return -1;
}
-
+
/* write bytes; send NACK at last byte */
while (len--) {
PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
- if (len==0)
+ if (len==0)
msg.condition = I2C_COND_STOP;
else
msg.condition = I2C_COND_NORMAL;
@@ -435,7 +435,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
msg.acknack = I2C_ACKNAK_WAITACK;
msg.direction = I2C_WRITE;
msg.data = *(buffer++);
-
+
if (i2c_transfer(&msg)) return -1;
}
diff --git a/cpu/pxa/interrupts.c b/cpu/pxa/interrupts.c
index af7d634..cf529f4 100644
--- a/cpu/pxa/interrupts.c
+++ b/cpu/pxa/interrupts.c
@@ -59,7 +59,6 @@ int disable_interrupts (void)
#endif
-
void bad_mode (void)
{
panic ("Resetting CPU ...\n");
diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c
index 783e90c..9e6e1e3 100644
--- a/cpu/pxa/mmc.c
+++ b/cpu/pxa/mmc.c
@@ -32,7 +32,7 @@
extern int
fat_register_read(int(*block_read)(int device, ulong blknr, ulong blkcnt, uchar *buffer));
-/*
+/*
* FIXME needs to read cid and csd info to determine block size
* and other parameters
*/
@@ -41,7 +41,7 @@ static mmc_csd_t mmc_csd;
static int mmc_ready = 0;
-static uchar *
+static uchar *
/****************************************************/
mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat)
/****************************************************/
@@ -54,7 +54,7 @@ mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat)
MMC_STRPCL = MMC_STRPCL_STOP_CLK;
MMC_I_MASK = ~MMC_I_MASK_CLK_IS_OFF;
while (!(MMC_I_REG & MMC_I_REG_CLK_IS_OFF));
- MMC_CMD = cmd;
+ MMC_CMD = cmd;
MMC_ARGH = argh;
MMC_ARGL = argl;
MMC_CMDAT = cmdat;
@@ -73,11 +73,11 @@ mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat)
{
case MMC_CMDAT_R1:
case MMC_CMDAT_R3:
- words = 3;
+ words = 3;
break;
case MMC_CMDAT_R2:
- words = 8;
+ words = 8;
break;
default:
@@ -130,10 +130,10 @@ mmc_block_read(uchar *dst, ulong src, ulong len)
MMC_RDTO = 0xffff;
MMC_NOB = 1;
MMC_BLKLEN = len;
- resp = mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl,
+ resp = mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl,
MMC_CMDAT_R1|MMC_CMDAT_READ|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN);
-
+
MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ;
while (len)
{
@@ -188,9 +188,9 @@ mmc_block_write(ulong dst, uchar *src, int len)
MMC_STRPCL = MMC_STRPCL_STOP_CLK;
MMC_NOB = 1;
MMC_BLKLEN = len;
- resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl,
+ resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl,
MMC_CMDAT_R1|MMC_CMDAT_WRITE|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN);
-
+
MMC_I_MASK = ~MMC_I_MASK_TXFIFO_WR_REQ;
while (len)
{
@@ -379,7 +379,7 @@ mmc_write(uchar *src, ulong dst, int size)
return 0;
}
-int
+int
/****************************************************/
mmc_bread(int dev_num, ulong blknr, ulong blkcnt, uchar *dst)
/****************************************************/
@@ -408,7 +408,7 @@ mmc_init(int verbose)
mmc_csd.c_size = 0;
MMC_CLKRT = MMC_CLKRT_0_3125MHZ;
- MMC_RESTO = MMC_RES_TO_MAX;
+ MMC_RESTO = MMC_RES_TO_MAX;
MMC_SPI = MMC_SPI_DISABLE;
/* reset */
@@ -431,12 +431,12 @@ mmc_init(int verbose)
if (verbose)
{
printf("MMC found. Card desciption is:\n");
- printf("Manufacturer ID = %02x%02x%02x\n",
+ printf("Manufacturer ID = %02x%02x%02x\n",
cid->id[0], cid->id[1], cid->id[2]);
printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev);
cid->hwrev = cid->fwrev = 0; /* null terminate string */
printf("Product Name = %s\n",cid->name);
- printf("Serial Number = %02x%02x%02x\n",
+ printf("Serial Number = %02x%02x%02x\n",
cid->sn[0], cid->sn[1], cid->sn[2]);
printf("Month = %d\n",cid->month);
printf("Year = %d\n",1997 + cid->year);
diff --git a/cpu/pxa/pxafb.c b/cpu/pxa/pxafb.c
index f6a2575..ef60d4a 100644
--- a/cpu/pxa/pxafb.c
+++ b/cpu/pxa/pxafb.c
@@ -52,7 +52,7 @@
#undef CONFIG_LCD_LOGO
-#define LCD_TEST_PATTERN
+#define LCD_TEST_PATTERN
/* #define LCD_TEST_PATTERN */ /* color backgnd for frame/color adjust */
/* #define CFG_INVERT_COLORS */ /* Not needed - adjust vl_dp instead */
/************************************************************************/
@@ -163,31 +163,31 @@ typedef struct vidinfo {
/* you have to set lccr0 and lccr3 (including pcd) */
#define REG_LCCR0 0x003008f8
-#define REG_LCCR3 0x0300FF01
+#define REG_LCCR3 0x0300FF01
/* 640x480x16 @ 61 Hz */
static vidinfo_t panel_info = {
- vl_col: 640,
+ vl_col: 640,
vl_row: 480,
vl_width: 640,
vl_height: 480,
vl_clkp: CFG_HIGH,
- vl_oep: CFG_HIGH,
+ vl_oep: CFG_HIGH,
vl_hsp: CFG_HIGH,
- vl_vsp: CFG_HIGH,
- vl_dp: CFG_HIGH,
- vl_bpix: LCD_BPP,
- vl_lbw: 0,
+ vl_vsp: CFG_HIGH,
+ vl_dp: CFG_HIGH,
+ vl_bpix: LCD_BPP,
+ vl_lbw: 0,
vl_splt: 0,
- vl_clor: 0,
+ vl_clor: 0,
vl_lcdac: 0,
- vl_tft: 1,
- vl_hpw: 40,
- vl_blw: 56,
- vl_elw: 56,
- vl_vpw: 20,
- vl_bfw: 8,
- vl_efw: 8,
+ vl_tft: 1,
+ vl_hpw: 40,
+ vl_blw: 56,
+ vl_elw: 56,
+ vl_vpw: 20,
+ vl_bfw: 8,
+ vl_efw: 8,
};
#endif /* CONFIG_PXA_VIDEO */
@@ -198,30 +198,30 @@ static vidinfo_t panel_info = {
/* you have to set lccr0 and lccr3 (including pcd) */
#define REG_LCCR0 0x0030087C
-#define REG_LCCR3 0x0340FF08
+#define REG_LCCR3 0x0340FF08
static vidinfo_t panel_info = {
- vl_col: 640,
+ vl_col: 640,
vl_row: 480,
vl_width: 157,
vl_height: 118,
vl_clkp: CFG_HIGH,
- vl_oep: CFG_HIGH,
+ vl_oep: CFG_HIGH,
vl_hsp: CFG_HIGH,
- vl_vsp: CFG_HIGH,
- vl_dp: CFG_HIGH,
- vl_bpix: LCD_BPP,
- vl_lbw: 0,
+ vl_vsp: CFG_HIGH,
+ vl_dp: CFG_HIGH,
+ vl_bpix: LCD_BPP,
+ vl_lbw: 0,
vl_splt: 1,
- vl_clor: 1,
+ vl_clor: 1,
vl_lcdac: 0,
- vl_tft: 0,
- vl_hpw: 1,
- vl_blw: 3,
- vl_elw: 3,
- vl_vpw: 1,
- vl_bfw: 0,
- vl_efw: 0,
+ vl_tft: 0,
+ vl_hpw: 1,
+ vl_blw: 3,
+ vl_elw: 3,
+ vl_vpw: 1,
+ vl_bfw: 0,
+ vl_efw: 0,
};
#endif /* CONFIG_SHARP_LM8V31 */
@@ -721,7 +721,7 @@ ulong lcd_setmem (ulong addr)
static void lcd_ctrl_init (void *lcdbase)
{
- pxafb_init_mem(lcdbase, &panel_info);
+ pxafb_init_mem(lcdbase, &panel_info);
pxafb_init(&panel_info);
pxafb_setup_gpio(&panel_info);
pxafb_enable_controller(&panel_info);
@@ -745,7 +745,7 @@ lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
struct pxafb_info *fbi = &panel_info.pxa;
unsigned short *palette = (unsigned short *)fbi->palette;
u_int val;
-
+
if (regno < fbi->palette_size) {
val = ((red << 8) & 0xf800);
val |= ((green << 4) & 0x07e0);
@@ -1011,18 +1011,18 @@ static int pxafb_init(vidinfo_t *vid)
LCCR1_HorSnchWdth(vid->vl_hpw) +
LCCR1_BegLnDel(vid->vl_blw) +
LCCR1_EndLnDel(vid->vl_elw);
-
+
fbi->reg_lccr2 =
LCCR2_DisHght(vid->vl_row) +
LCCR2_VrtSnchWdth(vid->vl_vpw) +
LCCR2_BegFrmDel(vid->vl_bfw) +
LCCR2_EndFrmDel(vid->vl_efw);
- fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP);
- fbi->reg_lccr3 |=
- (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH)
+ fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP);
+ fbi->reg_lccr3 |=
+ (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH)
| (vid->vl_vsp ? LCCR3_VrtSnchL : LCCR3_VrtSnchH);
-
+
/* setup dma descriptors */
fbi->dmadesc_fblow = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
@@ -1030,9 +1030,9 @@ static int pxafb_init(vidinfo_t *vid)
fbi->dmadesc_palette = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);
#define BYTES_PER_PANEL ((fbi->reg_lccr0 & LCCR0_SDS) ? \
- (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \
- (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8))
-
+ (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \
+ (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8))
+
/* populate descriptors */
fbi->dmadesc_fblow->fdadr = (u_long)fbi->dmadesc_fblow;
fbi->dmadesc_fblow->fsadr = fbi->screen + BYTES_PER_PANEL;
@@ -1040,7 +1040,7 @@ static int pxafb_init(vidinfo_t *vid)
fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL;
fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */
-
+
fbi->dmadesc_fbhigh->fsadr = fbi->screen;
fbi->dmadesc_fbhigh->fidr = 0;
fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL;
@@ -1055,7 +1055,7 @@ static int pxafb_init(vidinfo_t *vid)
fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh;
fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette;
/* flips back and forth between pal and fbhigh */
- fbi->fdadr0 = (u_long)fbi->dmadesc_palette;
+ fbi->fdadr0 = (u_long)fbi->dmadesc_palette;
}
else
{
@@ -1079,7 +1079,7 @@ static int pxafb_init(vidinfo_t *vid)
debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd);
debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd);
debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd);
-
+
return 0;
}
diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index 95b30e4..c2b75da 100644
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -86,8 +86,8 @@ _armboot_end:
/*
* This is defined in the board specific linker script
*/
-.globl _bss_start
-_bss_start:
+.globl _bss_start
+_bss_start:
.word bss_start
.globl _bss_end
@@ -138,7 +138,7 @@ reset:
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
- ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
+ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
@@ -172,7 +172,7 @@ clear_bss:
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
- bne clbss_l
+ bne clbss_l
ldr pc, _start_armboot
@@ -471,4 +471,3 @@ reset_cpu:
reset_endless:
b reset_endless
-
generated by cgit v1.1 at 2024-11-20 13:28:46 +0000