1 files changed, 36 insertions, 97 deletions

diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c
index 8620e2b..8215dc6 100644
--- a/cpu/ppc4xx/interrupts.c
+++ b/cpu/ppc4xx/interrupts.c
@@ -34,27 +34,22 @@
 #include <ppc4xx.h>
 #include <ppc_asm.tmpl>
 #include <commproc.h>
-#include <asm/ppc4xx-intvec.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Define the number of UIC's
- */
-#if defined(CONFIG_440SPE) || \
-    defined(CONFIG_460EX) || defined(CONFIG_460GT)
-#define UIC_MAX		4
-#elif defined(CONFIG_440GX) || \
-    defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-    defined(CONFIG_405EX)
-#define UIC_MAX		3
-#elif defined(CONFIG_440GP) || defined(CONFIG_440SP) || \
-    defined(CONFIG_440EP) || defined(CONFIG_440GR)
-#define UIC_MAX		2
+#if (UIC_MAX > 3)
+#define UICB0_ALL	(UIC_MASK(VECNUM_UIC1CI) | UIC_MASK(VECNUM_UIC1NCI) | \
+			 UIC_MASK(VECNUM_UIC2CI) | UIC_MASK(VECNUM_UIC2NCI) | \
+			 UIC_MASK(VECNUM_UIC3CI) | UIC_MASK(VECNUM_UIC3NCI))
+#elif (UIC_MAX > 2)
+#define UICB0_ALL	(UIC_MASK(VECNUM_UIC1CI) | UIC_MASK(VECNUM_UIC1NCI) | \
+			 UIC_MASK(VECNUM_UIC2CI) | UIC_MASK(VECNUM_UIC2NCI))
+#elif (UIC_MAX > 1)
+#define UICB0_ALL	(UIC_MASK(VECNUM_UIC1CI) | UIC_MASK(VECNUM_UIC1NCI))
 #else
-#define UIC_MAX		1
+#define UICB0_ALL	0
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * CPM interrupt vector functions.
  */
@@ -69,10 +64,6 @@ static struct irq_action irq_vecs[UIC_MAX * 32];
 u32 get_dcr(u16);
 void set_dcr(u16, u32);
 
-#if (UIC_MAX > 1) && !defined(CONFIG_440GX)
-static void uic_cascade_interrupt(void *para);
-#endif
-
 #if defined(CONFIG_440)
 
 /* SPRN changed in 440 */
@@ -156,37 +147,19 @@ int interrupt_init_cpu (unsigned *decrementer_count)
 	 */
 	set_evpr(0x00000000);
 
-#if !defined(CONFIG_440GX)
 #if (UIC_MAX > 1)
 	/* Install the UIC1 handlers */
-	irq_install_handler(VECNUM_UIC1NC, uic_cascade_interrupt, 0);
-	irq_install_handler(VECNUM_UIC1C, uic_cascade_interrupt, 0);
+	irq_install_handler(VECNUM_UIC1NCI, (void *)(void *)external_interrupt, 0);
+	irq_install_handler(VECNUM_UIC1CI, (void *)(void *)external_interrupt, 0);
 #endif
 #if (UIC_MAX > 2)
-	irq_install_handler(VECNUM_UIC2NC, uic_cascade_interrupt, 0);
-	irq_install_handler(VECNUM_UIC2C, uic_cascade_interrupt, 0);
+	irq_install_handler(VECNUM_UIC2NCI, (void *)(void *)external_interrupt, 0);
+	irq_install_handler(VECNUM_UIC2CI, (void *)(void *)external_interrupt, 0);
 #endif
 #if (UIC_MAX > 3)
-	irq_install_handler(VECNUM_UIC3NC, uic_cascade_interrupt, 0);
-	irq_install_handler(VECNUM_UIC3C, uic_cascade_interrupt, 0);
+	irq_install_handler(VECNUM_UIC3NCI, (void *)(void *)external_interrupt, 0);
+	irq_install_handler(VECNUM_UIC3CI, (void *)(void *)external_interrupt, 0);
 #endif
-#else /* !defined(CONFIG_440GX) */
-	/* Take the GX out of compatibility mode
-	 * Travis Sawyer, 9 Mar 2004
-	 * NOTE: 440gx user manual inconsistency here
-	 *       Compatibility mode and Ethernet Clock select are not
-	 *       correct in the manual
-	 */
-	mfsdr(sdr_mfr, val);
-	val &= ~0x10000000;
-	mtsdr(sdr_mfr,val);
-
-	/* Enable UIC interrupts via UIC Base Enable Register */
-	mtdcr(uicb0sr, UICB0_ALL);
-	mtdcr(uicb0er, 0x54000000);
-	/* None are critical */
-	mtdcr(uicb0cr, 0);
-#endif /* !defined(CONFIG_440GX) */
 
 	return (0);
 }
@@ -217,8 +190,7 @@ static void uic_interrupt(u32 uic_base, int vec_base)
 				(*irq_vecs[vec].handler)(irq_vecs[vec].arg);
 			} else {
 				set_dcr(uic_base + UIC_ER,
-					get_dcr(uic_base + UIC_ER) &
-					~(0x80000000 >> (vec & 0x1f)));
+					get_dcr(uic_base + UIC_ER) & ~UIC_MASK(vec));
 				printf("Masking bogus interrupt vector %d"
 				       " (UIC_BASE=0x%x)\n", vec, uic_base);
 			}
@@ -227,7 +199,7 @@ static void uic_interrupt(u32 uic_base, int vec_base)
 			 * After servicing the interrupt, we have to remove the
 			 * status indicator
 			 */
-			set_dcr(uic_base + UIC_SR, (0x80000000 >> (vec & 0x1f)));
+			set_dcr(uic_base + UIC_SR, UIC_MASK(vec));
 		}
 
 		/*
@@ -238,27 +210,6 @@ static void uic_interrupt(u32 uic_base, int vec_base)
 	}
 }
 
-#if (UIC_MAX > 1) && !defined(CONFIG_440GX)
-static void uic_cascade_interrupt(void *para)
-{
-	external_interrupt(para);
-}
-#endif
-
-#if defined(CONFIG_440)
-#if defined(CONFIG_440GX)
-/* 440GX uses base uic register */
-#define UIC_BMSR	uicb0msr
-#define UIC_BSR		uicb0sr
-#else
-#define UIC_BMSR	uic0msr
-#define UIC_BSR		uic0sr
-#endif
-#else /* CONFIG_440 */
-#define UIC_BMSR	uicmsr
-#define UIC_BSR		uicsr
-#endif /* CONFIG_440 */
-
 /*
  * Handle external interrupts
  */
@@ -269,36 +220,30 @@ void external_interrupt(struct pt_regs *regs)
 	/*
 	 * Read masked interrupt status register to determine interrupt source
 	 */
-	uic_msr = mfdcr(UIC_BMSR);
+	uic_msr = mfdcr(uic0msr);
 
 #if (UIC_MAX > 1)
-	if ((UICB0_UIC1CI & uic_msr) || (UICB0_UIC1NCI & uic_msr))
+	if ((UIC_MASK(VECNUM_UIC1CI) & uic_msr) ||
+	    (UIC_MASK(VECNUM_UIC1NCI) & uic_msr))
 		uic_interrupt(UIC1_DCR_BASE, 32);
 #endif
 
 #if (UIC_MAX > 2)
-	if ((UICB0_UIC2CI & uic_msr) || (UICB0_UIC2NCI & uic_msr))
+	if ((UIC_MASK(VECNUM_UIC2CI) & uic_msr) ||
+	    (UIC_MASK(VECNUM_UIC2NCI) & uic_msr))
 		uic_interrupt(UIC2_DCR_BASE, 64);
 #endif
 
 #if (UIC_MAX > 3)
-	if ((UICB0_UIC3CI & uic_msr) || (UICB0_UIC3NCI & uic_msr))
+	if ((UIC_MASK(VECNUM_UIC3CI) & uic_msr) ||
+	    (UIC_MASK(VECNUM_UIC3NCI) & uic_msr))
 		uic_interrupt(UIC3_DCR_BASE, 96);
 #endif
 
-#if defined(CONFIG_440)
-#if !defined(CONFIG_440GX)
 	if (uic_msr & ~(UICB0_ALL))
 		uic_interrupt(UIC0_DCR_BASE, 0);
-#else
-	if ((UICB0_UIC0CI & uic_msr) || (UICB0_UIC0NCI & uic_msr))
-		uic_interrupt(UIC0_DCR_BASE, 0);
-#endif
-#else /* CONFIG_440 */
-	uic_interrupt(UIC0_DCR_BASE, 0);
-#endif /* CONFIG_440 */
 
-	mtdcr(UIC_BSR, uic_msr);
+	mtdcr(uic0sr, uic_msr);
 
 	return;
 }
@@ -308,8 +253,6 @@ void external_interrupt(struct pt_regs *regs)
  */
 void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)
 {
-	int i;
-
 	/*
 	 * Print warning when replacing with a different irq vector
 	 */
@@ -320,20 +263,19 @@ void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)
 	irq_vecs[vec].handler = handler;
 	irq_vecs[vec].arg = arg;
 
-	i = vec & 0x1f;
 	if ((vec >= 0) && (vec < 32))
-		mtdcr(uicer, mfdcr(uicer) | (0x80000000 >> i));
+		mtdcr(uicer, mfdcr(uicer) | UIC_MASK(vec));
 #if (UIC_MAX > 1)
 	else if ((vec >= 32) && (vec < 64))
-		mtdcr(uic1er, mfdcr(uic1er) | (0x80000000 >> i));
+		mtdcr(uic1er, mfdcr(uic1er) | UIC_MASK(vec));
 #endif
 #if (UIC_MAX > 2)
 	else if ((vec >= 64) && (vec < 96))
-		mtdcr(uic2er, mfdcr(uic2er) | (0x80000000 >> i));
+		mtdcr(uic2er, mfdcr(uic2er) | UIC_MASK(vec));
 #endif
 #if (UIC_MAX > 3)
 	else if (vec >= 96)
-		mtdcr(uic3er, mfdcr(uic3er) | (0x80000000 >> i));
+		mtdcr(uic3er, mfdcr(uic3er) | UIC_MASK(vec));
 #endif
 
 	debug("Install interrupt for vector %d ==> %p\n", vec, handler);
@@ -341,25 +283,22 @@ void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)
 
 void irq_free_handler (int vec)
 {
-	int i;
-
 	debug("Free interrupt for vector %d ==> %p\n",
 	      vec, irq_vecs[vec].handler);
 
-	i = vec & 0x1f;
 	if ((vec >= 0) && (vec < 32))
-		mtdcr(uicer, mfdcr(uicer) & ~(0x80000000 >> i));
+		mtdcr(uicer, mfdcr(uicer) & ~UIC_MASK(vec));
 #if (UIC_MAX > 1)
 	else if ((vec >= 32) && (vec < 64))
-		mtdcr(uic1er, mfdcr(uic1er) & ~(0x80000000 >> i));
+		mtdcr(uic1er, mfdcr(uic1er) & ~UIC_MASK(vec));
 #endif
 #if (UIC_MAX > 2)
 	else if ((vec >= 64) && (vec < 96))
-		mtdcr(uic2er, mfdcr(uic2er) & ~(0x80000000 >> i));
+		mtdcr(uic2er, mfdcr(uic2er) & ~UIC_MASK(vec));
 #endif
 #if (UIC_MAX > 3)
 	else if (vec >= 96)
-		mtdcr(uic3er, mfdcr(uic3er) & ~(0x80000000 >> i));
+		mtdcr(uic3er, mfdcr(uic3er) & ~UIC_MASK(vec));
 #endif
 
 	irq_vecs[vec].handler = NULL;