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-rw-r--r--cpu/mpc8xx/Makefile2
-rw-r--r--cpu/mpc8xx/cpu.c11
-rw-r--r--cpu/mpc8xx/fdt.c46
-rw-r--r--cpu/mpc8xx/speed.c25
4 files changed, 72 insertions, 12 deletions
diff --git a/cpu/mpc8xx/Makefile b/cpu/mpc8xx/Makefile
index 223b30c..dbdc2e0 100644
--- a/cpu/mpc8xx/Makefile
+++ b/cpu/mpc8xx/Makefile
@@ -29,7 +29,7 @@ LIB = $(obj)lib$(CPU).a
START = start.o kgdb.o
COBJS = bedbug_860.o commproc.o cpu.o cpu_init.o \
- fec.o i2c.o interrupts.o lcd.o scc.o \
+ fec.o fdt.o i2c.o interrupts.o lcd.o scc.o \
serial.o speed.o spi.o \
traps.o upatch.o video.o
SOBJS = plprcr_write.o
diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c
index c878352..a86598e 100644
--- a/cpu/mpc8xx/cpu.c
+++ b/cpu/mpc8xx/cpu.c
@@ -637,14 +637,3 @@ void reset_8xx_watchdog (volatile immap_t * immr)
#endif /* CONFIG_WATCHDOG */
-/* ------------------------------------------------------------------------- */
-#if defined(CONFIG_OF_LIBFDT)
-void ft_cpu_setup (void *blob, bd_t *bd)
-{
- char * cpu_path = "/cpus/" OF_CPU;
-
- do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
- do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
- do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
-}
-#endif /* CONFIG_OF_LIBFDT */
diff --git a/cpu/mpc8xx/fdt.c b/cpu/mpc8xx/fdt.c
new file mode 100644
index 0000000..567094a
--- /dev/null
+++ b/cpu/mpc8xx/fdt.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2008 (C) Bryan O'Donoghue
+ *
+ * Code copied & edited from Freescale mpc85xx stuff.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void ft_cpu_setup(void *blob, bd_t *bd)
+{
+ do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+ "timebase-frequency", get_tbclk(), 1);
+ do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+ "bus-frequency", bd->bi_busfreq, 1);
+ do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+ "clock-frequency", bd->bi_intfreq, 1);
+ do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
+ gd->brg_clk, 1);
+
+ /* Fixup ethernet MAC addresses */
+ fdt_fixup_ethernet(blob, bd);
+
+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+}
diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c
index 11b0893..070babc 100644
--- a/cpu/mpc8xx/speed.c
+++ b/cpu/mpc8xx/speed.c
@@ -174,6 +174,27 @@ unsigned long measure_gclk(void)
#endif
+void get_brgclk(uint sccr)
+{
+ uint divider = 0;
+
+ switch((sccr&SCCR_DFBRG11)>>11){
+ case 0:
+ divider = 1;
+ break;
+ case 1:
+ divider = 4;
+ break;
+ case 2:
+ divider = 16;
+ break;
+ case 3:
+ divider = 64;
+ break;
+ }
+ gd->brg_clk = gd->cpu_clk/divider;
+}
+
#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
/*
@@ -223,6 +244,8 @@ int get_clocks (void)
gd->bus_clk = gd->cpu_clk / 2;
}
+ get_brgclk(sccr);
+
return (0);
}
@@ -254,6 +277,8 @@ int get_clocks_866 (void)
gd->cpu_clk = measure_gclk ();
#endif
+ get_brgclk(immr->im_clkrst.car_sccr);
+
/* if cpu clock <= 66 MHz then set bus division factor to 1,
* otherwise set it to 2
*/