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-rw-r--r--cpu/mpc86xx/cpu_init.c3
-rw-r--r--cpu/mpc86xx/spd_sdram.c6
2 files changed, 3 insertions, 6 deletions
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 0efd855..78ba1ea 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -119,8 +119,5 @@ void cpu_init_f(void)
*/
int cpu_init_r(void)
{
-#ifdef CONFIG_FSL_LAW
- disable_law(0);
-#endif
return 0;
}
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index 5cc0c26..e26db7c 100644
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -1183,7 +1183,7 @@ spd_sdram(void)
* Set up LAWBAR for DDR 1 space.
*/
#ifdef CONFIG_FSL_LAW
- set_law(1, CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV);
+ set_next_law(CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV);
#endif
debug("Interleaved memory size is 0x%08lx\n", memsize_total);
@@ -1238,7 +1238,7 @@ spd_sdram(void)
* Set up LAWBAR for DDR 1 space.
*/
#ifdef CONFIG_FSL_LAW
- set_law(1, CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1);
+ set_next_law(CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1);
#endif
}
@@ -1265,7 +1265,7 @@ spd_sdram(void)
* Set up LAWBAR for DDR 2 space.
*/
#ifdef CONFIG_FSL_LAW
- set_law(8,
+ set_next_law(
(ddr1_enabled ? (memsize_ddr1 * 1024 * 1024) : CFG_DDR_SDRAM_BASE),
law_size_ddr2, LAW_TRGT_IF_DDR_2);
#endif