summaryrefslogtreecommitdiff
path: root/cpu/mpc85xx
diff options
context:
space:
mode:
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r--cpu/mpc85xx/release.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index 7c3e8a1..54c936c 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -157,6 +157,7 @@ __secondary_start_page:
mfspr r0,SPRN_PIR
stw r0,ENTRY_PIR(r10)
+ mtspr IVPR,r12
/*
* Coming here, we know the cpu has one TLB mapping in TLB1[0]
* which maps 0xfffff000-0xffffffff one-to-one. We set up a