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-rw-r--r--cpu/mpc5xxx/fec.c73
-rw-r--r--cpu/mpc5xxx/start.S18
2 files changed, 45 insertions, 46 deletions
diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c
index 74b786d..e48fa88 100644
--- a/cpu/mpc5xxx/fec.c
+++ b/cpu/mpc5xxx/fec.c
@@ -36,6 +36,33 @@ typedef struct {
} NBUF;
/********************************************************************/
+#if (DEBUG & 0x2)
+static void mpc5xxx_fec_phydump (void)
+{
+ uint16 phyStatus, i;
+ uint8 phyAddr = CONFIG_PHY_ADDR;
+ uint8 reg_mask[] = {
+#if CONFIG_PHY_TYPE == 0x79c874 /* AMD Am79C874 */
+ /* regs to print: 0...7, 16...19, 21, 23, 24 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0,
+#else
+ /* regs to print: 0...8, 16...20 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+#endif
+ };
+
+ for (i = 0; i < 32; i++) {
+ if (reg_mask[i]) {
+ miiphy_read(phyAddr, i, &phyStatus);
+ printf("Mii reg %d: 0x%04x\n", i, phyStatus);
+ }
+ }
+}
+#endif
+
+/********************************************************************/
static int mpc5xxx_fec_rbd_init(mpc5xxx_fec_priv *fec)
{
int ix;
@@ -211,7 +238,7 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
DECLARE_GLOBAL_DATA_PTR;
mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA;
- const uint8 phyAddr = 0; /* Only one PHY */
+ const uint8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */
#if (DEBUG & 0x1)
printf ("mpc5xxx_fec_init... Begin\n");
@@ -472,21 +499,11 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
*/
fec->eth->ecntrl |= 0x00000006;
- if (fec->xcv_type != SEVENWIRE) {
#if (DEBUG & 0x2)
- uint16 phyStatus, i;
- uint8 phyAddr = 0;
-
- for (i = 0; i < 9; i++) {
- miiphy_read(phyAddr, i, &phyStatus);
- printf("Mii reg %d: 0x%04x\n", i, phyStatus);
- }
- for (i = 16; i < 21; i++) {
- miiphy_read(phyAddr, i, &phyStatus);
- printf("Mii reg %d: 0x%04x\n", i, phyStatus);
- }
+ if (fec->xcv_type != SEVENWIRE)
+ mpc5xxx_fec_phydump ();
#endif
- }
+
/*
* Enable SmartDMA receive task
*/
@@ -509,22 +526,10 @@ static void mpc5xxx_fec_halt(struct eth_device *dev)
int counter = 0xffff;
#if (DEBUG & 0x2)
- if (fec->xcv_type != SEVENWIRE) {
- uint16 phyStatus, i;
- uint8 phyAddr = 0;
-
- for (i = 0; i < 9; i++) {
- miiphy_read(phyAddr, i, &phyStatus);
- printf("Mii reg %d: 0x%04x\n", i, phyStatus);
- }
- for (i = 16; i < 21; i++) {
- miiphy_read(phyAddr, i, &phyStatus);
- printf ("Mii reg %d: 0x%04x\n", i, phyStatus);
- }
- }
+ if (fec->xcv_type != SEVENWIRE)
+ mpc5xxx_fec_phydump ();
#endif
-
/*
* mask FEC chip interrupts
*/
@@ -587,7 +592,7 @@ static void mpc5xxx_fec_halt(struct eth_device *dev)
static void tfifo_print(mpc5xxx_fec_priv *fec)
{
- uint16 phyAddr = 0;
+ uint16 phyAddr = CONFIG_PHY_ADDR;
uint16 phyStatus;
if ((fec->eth->tfifo_lrf_ptr != fec->eth->tfifo_lwf_ptr)
@@ -611,7 +616,7 @@ static void tfifo_print(mpc5xxx_fec_priv *fec)
static void rfifo_print(mpc5xxx_fec_priv *fec)
{
- uint16 phyAddr = 0;
+ uint16 phyAddr = CONFIG_PHY_ADDR;
uint16 phyStatus;
if ((fec->eth->rfifo_lrf_ptr != fec->eth->rfifo_lwf_ptr)
@@ -825,12 +830,12 @@ int mpc5xxx_fec_initialize(bd_t * bis)
fec->eth = (ethernet_regs *)MPC5XXX_FEC;
fec->tbdBase = (FEC_TBD *)FEC_BD_BASE;
fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD));
-#ifdef CONFIG_ICECUBE
-#ifndef CONFIG_FEC_10MBIT
+#if defined(CONFIG_ICECUBE) || defined(CONFIG_TOP5200)
+# ifndef CONFIG_FEC_10MBIT
fec->xcv_type = MII100;
-#else
+# else
fec->xcv_type = MII10;
-#endif
+# endif
#else
#error fec->xcv_type not initialized.
#endif
diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S
index e0873ed..a001e1c 100644
--- a/cpu/mpc5xxx/start.S
+++ b/cpu/mpc5xxx/start.S
@@ -118,18 +118,12 @@ boot_warm:
ori r3, r3, 0x02010000@l
stw r3, 0x54(r4)
-#if defined(CFG_LOWBOOT08)
- lis r3, 0xff800160@h
- ori r3, r3, 0xff800160@l
-#endif
-#if defined(CFG_LOWBOOT16)
- lis r3, 0xff000160@h
- ori r3, r3, 0xff000160@l
-#endif
+ lis r3, lowboot_reentry@h
+ ori r3, r3, lowboot_reentry@l
mtlr r3
- blr
-lowboot_reentry: /* FLASH_BASE + 0x160 */
-
+ blr /* jump to flash based address */
+
+lowboot_reentry:
lis r3, 0x0000FF00@h
ori r3, r3, 0x0000FF00@l
stw r3, 0x4c(r4)
@@ -143,7 +137,7 @@ lowboot_reentry: /* FLASH_BASE + 0x160 */
ori r3, r3, 0x02000001@l
stw r3, 0x54(r4)
#endif /* CFG_LOWBOOT */
-
+
#if defined(CFG_DEFAULT_MBAR) && !defined(CFG_RAMBOOT)
lis r3, CFG_MBAR@h
ori r3, r3, CFG_MBAR@l