diff options
Diffstat (limited to 'cpu/mpc512x')
-rw-r--r-- | cpu/mpc512x/cpu.c | 21 | ||||
-rw-r--r-- | cpu/mpc512x/fec.c | 2 | ||||
-rw-r--r-- | cpu/mpc512x/i2c.c | 12 | ||||
-rw-r--r-- | cpu/mpc512x/serial.c | 2 | ||||
-rw-r--r-- | cpu/mpc512x/speed.c | 4 |
5 files changed, 31 insertions, 10 deletions
diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index accae6e..6421a51 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -32,6 +32,10 @@ #include <mpc512x.h> #include <asm/processor.h> +#if defined(CONFIG_OF_LIBFDT) +#include <fdt_support.h> +#endif + DECLARE_GLOBAL_DATA_PTR; int checkcpu (void) @@ -125,3 +129,20 @@ void watchdog_reset (void) enable_interrupts (); } #endif + +#ifdef CONFIG_OF_LIBFDT +void ft_cpu_setup(void *blob, bd_t *bd) +{ + char * cpu_path = "/cpus/" OF_CPU; + char * eth_path = "/" OF_SOC "/ethernet@2800"; + + do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); + do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); + do_fixup_by_path_u32(blob, cpu_path, "ref-frequency", CFG_MPC512X_CLKIN, 1); + do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); + do_fixup_by_path_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipsfreq, 1); + do_fixup_by_path_u32(blob, "/" OF_SOC, "ref-frequency", CFG_MPC512X_CLKIN, 1); + do_fixup_by_path(blob, eth_path, "address", bd->bi_enetaddr, 6, 0); + do_fixup_by_path(blob, eth_path, "local-mac-address", bd->bi_enetaddr, 6, 0); +} +#endif diff --git a/cpu/mpc512x/fec.c b/cpu/mpc512x/fec.c index 675b7a2..c226a8a 100644 --- a/cpu/mpc512x/fec.c +++ b/cpu/mpc512x/fec.c @@ -299,7 +299,7 @@ int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis) * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock * and do not drop the Preamble. */ - fec->eth->mii_speed = (((gd->ipb_clk / 1000000) / 5) + 1) << 1; + fec->eth->mii_speed = (((gd->ips_clk / 1000000) / 5) + 1) << 1; /* * Reset PHY, then delay 300ns diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c index 00e28d6..56ba443 100644 --- a/cpu/mpc512x/i2c.c +++ b/cpu/mpc512x/i2c.c @@ -236,7 +236,7 @@ static int mpc_get_fdr (int speed) if (fdr == -1) { ulong best_speed = 0; ulong divider; - ulong ipb, scl; + ulong ips, scl; ulong bestmatch = 0xffffffffUL; int best_i = 0, best_j = 0, i, j; int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8}; @@ -251,18 +251,18 @@ static int mpc_get_fdr (int speed) {126, 128} }; - ipb = gd->ipb_clk; + ips = gd->ips_clk; for (i = 7; i >= 0; i--) { for (j = 7; j >= 0; j--) { scl = 2 * (scltap[j].scl2tap + (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2); - if (ipb <= speed*scl) { - if ((speed*scl - ipb) < bestmatch) { - bestmatch = speed*scl - ipb; + if (ips <= speed*scl) { + if ((speed*scl - ips) < bestmatch) { + bestmatch = speed*scl - ips; best_i = i; best_j = j; - best_speed = ipb/scl; + best_speed = ips/scl; } } } diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c index 200ff2c..8a21404 100644 --- a/cpu/mpc512x/serial.c +++ b/cpu/mpc512x/serial.c @@ -86,7 +86,7 @@ int serial_init(void) psc->mode = PSC_MODE_1_STOPBIT; /* calculate dividor for setting PSC CTUR and CTLR registers */ - baseclk = (gd->ipb_clk + 8) / 16; + baseclk = (gd->ips_clk + 8) / 16; div = (baseclk + (gd->baudrate / 2)) / gd->baudrate; psc->ctur = (div >> 8) & 0xff; diff --git a/cpu/mpc512x/speed.c b/cpu/mpc512x/speed.c index a609827..99e3495 100644 --- a/cpu/mpc512x/speed.c +++ b/cpu/mpc512x/speed.c @@ -96,7 +96,7 @@ int get_clocks (void) ips_clk = 0; } - gd->ipb_clk = ips_clk; + gd->ips_clk = ips_clk; gd->csb_clk = csb_clk; gd->cpu_clk = core_clk; gd->bus_clk = csb_clk; @@ -118,7 +118,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) printf ("Clock configuration:\n"); printf (" CPU: %4d MHz\n", gd->cpu_clk / 1000000); printf (" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000); - printf (" IPS Bus: %4d MHz\n", gd->ipb_clk / 1000000); + printf (" IPS Bus: %4d MHz\n", gd->ips_clk / 1000000); printf (" DDR: %4d MHz\n", 2 * gd->csb_clk / 1000000); return 0; } |