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-rw-r--r--cpu/mips/au1x00_eth.c4
-rw-r--r--cpu/mips/au1x00_serial.c2
-rw-r--r--cpu/mips/au1x00_usb_ohci.c9
-rw-r--r--cpu/mips/cache.S16
-rw-r--r--cpu/mips/cpu.c11
-rw-r--r--cpu/mips/incaip_clock.c4
-rw-r--r--cpu/mips/start.S44
7 files changed, 59 insertions, 31 deletions
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index d0cf8e0..6272a3a 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -23,7 +23,7 @@
*/
#include <config.h>
-#if defined(CFG_DISCOVER_PHY)
+#if defined(CONFIG_SYS_DISCOVER_PHY)
#error "PHY not supported yet"
/* We just assume that we are running 100FD for now */
/* We all use switches, right? ;-) */
@@ -283,7 +283,7 @@ int au1x00_enet_initialize(bd_t *bis){
if ((dev = (struct eth_device*)malloc(sizeof *dev)) == NULL) {
puts ("malloc failed\n");
- return 0;
+ return -1;
}
memset(dev, 0, sizeof *dev);
diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c
index e8baab5..c25ba5a 100644
--- a/cpu/mips/au1x00_serial.c
+++ b/cpu/mips/au1x00_serial.c
@@ -76,7 +76,7 @@ void serial_setbrg (void)
sd = (*sys_powerctrl & 0x03) + 2;
/* calulate 2x baudrate and round */
- divisorx2 = ((CFG_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE)));
+ divisorx2 = ((CONFIG_SYS_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE)));
if (divisorx2 & 0x01)
divisorx2 = divisorx2 + 1;
diff --git a/cpu/mips/au1x00_usb_ohci.c b/cpu/mips/au1x00_usb_ohci.c
index 1ca8aaf..17489da 100644
--- a/cpu/mips/au1x00_usb_ohci.c
+++ b/cpu/mips/au1x00_usb_ohci.c
@@ -654,7 +654,8 @@ static void td_fill (ohci_t *ohci, unsigned int info,
td->index = index;
td->data = (__u32)data;
#ifdef OHCI_FILL_TRACE
- if (1 || ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe))) {
+ if (1 || (usb_pipebulk(urb_priv->pipe) &&
+ usb_pipeout(urb_priv->pipe))) {
for (i = 0; i < len; i++)
printf("td->data[%d] %#2x\n",i, ((unsigned char *)(td->data+0x80000000))[i]);
}
@@ -758,7 +759,7 @@ static void dl_transfer_length(td_t * td)
tdCBP = m32_swap (td->hwCBP);
- if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
+ if (!(usb_pipecontrol(lurb_priv->pipe) &&
((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
if (tdBE != 0) {
if (td->hwCBP == 0)
@@ -1015,7 +1016,7 @@ pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
#else
wait_ms(1);
#endif
- if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
+ if (usb_pipeint(pipe)) {
info("Root-Hub submit IRQ: NOT implemented");
return 0;
}
@@ -1249,7 +1250,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
/* allow more time for a BULK device to react - some are slow */
#define BULK_TO 5000 /* timeout in milliseconds */
- if (usb_pipetype (pipe) == PIPE_BULK)
+ if (usb_pipebulk(pipe))
timeout = BULK_TO;
else
timeout = 100;
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index ee5d411..ff4f11c 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -208,9 +208,9 @@ LEAF(mips_init_dcache)
*/
NESTED(mips_cache_reset, 0, ra)
move RA, ra
- li t2, CFG_ICACHE_SIZE
- li t3, CFG_DCACHE_SIZE
- li t4, CFG_CACHELINE_SIZE
+ li t2, CONFIG_SYS_ICACHE_SIZE
+ li t3, CONFIG_SYS_DCACHE_SIZE
+ li t4, CONFIG_SYS_CACHELINE_SIZE
move t5, t4
li v0, MIPS_MAX_CACHE_SIZE
@@ -302,7 +302,7 @@ LEAF(dcache_enable)
jr ra
END(dcache_enable)
-#ifdef CFG_INIT_RAM_LOCK_MIPS
+#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS
/*******************************************************************************
*
* mips_cache_lock - lock RAM area pointed to by a0 in cache.
@@ -311,9 +311,9 @@ LEAF(dcache_enable)
*
*/
#if defined(CONFIG_PURPLE)
-# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE/2)
+# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE/2)
#else
-# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE)
+# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE)
#endif
.globl mips_cache_lock
.ent mips_cache_lock
@@ -321,11 +321,11 @@ mips_cache_lock:
li a1, CKSEG0 - CACHE_LOCK_SIZE
addu a0, a1
li a2, CACHE_LOCK_SIZE
- li a3, CFG_CACHELINE_SIZE
+ li a3, CONFIG_SYS_CACHELINE_SIZE
move a1, a2
icacheop(a0,a1,a2,a3,0x1d)
jr ra
.end mips_cache_lock
-#endif /* CFG_INIT_RAM_LOCK_MIPS */
+#endif /* CONFIG_SYS_INIT_RAM_LOCK_MIPS */
diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c
index 0f58d25..b7180b0 100644
--- a/cpu/mips/cpu.c
+++ b/cpu/mips/cpu.c
@@ -23,6 +23,7 @@
#include <common.h>
#include <command.h>
+#include <netdev.h>
#include <asm/mipsregs.h>
#include <asm/cacheops.h>
#include <asm/reboot.h>
@@ -51,7 +52,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
void flush_cache(ulong start_addr, ulong size)
{
- unsigned long lsize = CFG_CACHELINE_SIZE;
+ unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
unsigned long addr = start_addr & ~(lsize - 1);
unsigned long aend = (start_addr + size - 1) & ~(lsize - 1);
@@ -73,3 +74,11 @@ void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
write_c0_index(index);
tlb_write_indexed();
}
+
+int cpu_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_SOC_AU1X00
+ au1x00_enet_initialize(bis);
+#endif
+ return 0;
+}
diff --git a/cpu/mips/incaip_clock.c b/cpu/mips/incaip_clock.c
index d0515ca..fc2c621 100644
--- a/cpu/mips/incaip_clock.c
+++ b/cpu/mips/incaip_clock.c
@@ -33,8 +33,8 @@
*
* RETURNS:
* 150.000.000 for 150 MHz
-* 133.333.333 for 133 Mhz (= 400MHz/3)
-* 100.000.000 for 100 Mhz (= 400MHz/4)
+* 133.333.333 for 133 MHz (= 400MHz/3)
+* 100.000.000 for 100 MHz (= 400MHz/4)
* NOTE:
* This functions should be used by the hardware driver to get the correct
* frequency of the CPU. Don't use the macros, which are set to init the CPU
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index 09e4aab..57db589 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -243,9 +243,11 @@ reset:
mtc0 zero, CP0_COUNT
mtc0 zero, CP0_COMPARE
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT)
/* CONFIG0 register */
li t0, CONF_CM_UNCACHED
mtc0 t0, CP0_CONFIG
+#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
/* Initialize $gp.
*/
@@ -255,6 +257,7 @@ reset:
1:
lw gp, 0(ra)
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT)
/* Initialize any external memory.
*/
la t9, lowlevel_init
@@ -271,17 +274,18 @@ reset:
*/
li t0, CONF_CM_CACHABLE_NONCOHERENT
mtc0 t0, CP0_CONFIG
+#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
/* Set up temporary stack.
*/
-#ifdef CFG_INIT_RAM_LOCK_MIPS
- li a0, CFG_INIT_SP_OFFSET
+#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS
+ li a0, CONFIG_SYS_INIT_SP_OFFSET
la t9, mips_cache_lock
jalr t9
nop
#endif
- li t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET
+ li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
la sp, 0(t0)
la t9, board_init_f
@@ -303,26 +307,35 @@ reset:
relocate_code:
move sp, a0 /* Set new stack pointer */
- li t0, CFG_MONITOR_BASE
+ li t0, CONFIG_SYS_MONITOR_BASE
la t3, in_ram
lw t2, -12(t3) /* t2 <-- uboot_end_data */
move t1, a2
+ move s2, a2 /* s2 <-- destination address */
/*
* Fix $gp:
*
- * New $gp = (Old $gp - CFG_MONITOR_BASE) + Destination Address
+ * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
*/
move t6, gp
- sub gp, CFG_MONITOR_BASE
+ sub gp, CONFIG_SYS_MONITOR_BASE
add gp, a2 /* gp now adjusted */
- sub t6, gp, t6 /* t6 <-- relocation offset */
+ sub s1, gp, t6 /* s1 <-- relocation offset */
/*
* t0 = source address
* t1 = target address
* t2 = source end address
*/
+
+ /*
+ * Save destination address and size for later usage in flush_cache()
+ */
+ move s0, a1 /* save gd in s0 */
+ move a0, t1 /* a0 <-- destination addr */
+ sub a1, t2, t0 /* a1 <-- size */
+
/* On the purple board we copy the code earlier in a special way
* in order to solve flash problems
*/
@@ -338,9 +351,14 @@ relocate_code:
/* If caches were enabled, we would have to flush them here.
*/
+ /* a0 & a1 are already set up for flush_cache(start, size) */
+ la t9, flush_cache
+ jalr t9
+ nop
+
/* Jump to where we've relocated ourselves.
*/
- addi t0, a2, in_ram - _start
+ addi t0, s2, in_ram - _start
jr t0
nop
@@ -367,7 +385,7 @@ in_ram:
1:
lw t1, 0(t4)
beqz t1, 2f
- add t1, t6
+ add t1, s1
sw t1, 0(t4)
2:
addi t2, 1
@@ -378,8 +396,8 @@ in_ram:
*/
lw t1, -12(t0) /* t1 <-- uboot_end_data */
lw t2, -8(t0) /* t2 <-- uboot_end */
- add t1, t6 /* adjust pointers */
- add t2, t6
+ add t1, s1 /* adjust pointers */
+ add t2, s1
sub t1, 4
1:
@@ -387,10 +405,10 @@ in_ram:
bltl t1, t2, 1b
sw zero, 0(t1) /* delay slot */
- move a0, a1
+ move a0, s0 /* a0 <-- gd */
la t9, board_init_r
jr t9
- move a1, a2 /* delay slot */
+ move a1, s2 /* delay slot */
.end relocate_code
generated by cgit v1.1 at 2024-09-29 11:15:24 +0000