diff options
Diffstat (limited to 'cpu/mips')
| -rw-r--r-- | cpu/mips/au1x00_eth.c | 2 | ||||
| -rw-r--r-- | cpu/mips/au1x00_serial.c | 2 | ||||
| -rw-r--r-- | cpu/mips/cache.S | 16 | ||||
| -rw-r--r-- | cpu/mips/cpu.c | 2 | ||||
| -rw-r--r-- | cpu/mips/start.S | 12 |
5 files changed, 17 insertions, 17 deletions
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c index d0cf8e0..8ddc06a 100644 --- a/cpu/mips/au1x00_eth.c +++ b/cpu/mips/au1x00_eth.c @@ -23,7 +23,7 @@ */ #include <config.h> -#if defined(CFG_DISCOVER_PHY) +#if defined(CONFIG_SYS_DISCOVER_PHY) #error "PHY not supported yet" /* We just assume that we are running 100FD for now */ /* We all use switches, right? ;-) */ diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c index e8baab5..c25ba5a 100644 --- a/cpu/mips/au1x00_serial.c +++ b/cpu/mips/au1x00_serial.c @@ -76,7 +76,7 @@ void serial_setbrg (void) sd = (*sys_powerctrl & 0x03) + 2; /* calulate 2x baudrate and round */ - divisorx2 = ((CFG_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE))); + divisorx2 = ((CONFIG_SYS_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE))); if (divisorx2 & 0x01) divisorx2 = divisorx2 + 1; diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S index ee5d411..ff4f11c 100644 --- a/cpu/mips/cache.S +++ b/cpu/mips/cache.S @@ -208,9 +208,9 @@ LEAF(mips_init_dcache) */ NESTED(mips_cache_reset, 0, ra) move RA, ra - li t2, CFG_ICACHE_SIZE - li t3, CFG_DCACHE_SIZE - li t4, CFG_CACHELINE_SIZE + li t2, CONFIG_SYS_ICACHE_SIZE + li t3, CONFIG_SYS_DCACHE_SIZE + li t4, CONFIG_SYS_CACHELINE_SIZE move t5, t4 li v0, MIPS_MAX_CACHE_SIZE @@ -302,7 +302,7 @@ LEAF(dcache_enable) jr ra END(dcache_enable) -#ifdef CFG_INIT_RAM_LOCK_MIPS +#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS /******************************************************************************* * * mips_cache_lock - lock RAM area pointed to by a0 in cache. @@ -311,9 +311,9 @@ LEAF(dcache_enable) * */ #if defined(CONFIG_PURPLE) -# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE/2) +# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE/2) #else -# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE) +# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE) #endif .globl mips_cache_lock .ent mips_cache_lock @@ -321,11 +321,11 @@ mips_cache_lock: li a1, CKSEG0 - CACHE_LOCK_SIZE addu a0, a1 li a2, CACHE_LOCK_SIZE - li a3, CFG_CACHELINE_SIZE + li a3, CONFIG_SYS_CACHELINE_SIZE move a1, a2 icacheop(a0,a1,a2,a3,0x1d) jr ra .end mips_cache_lock -#endif /* CFG_INIT_RAM_LOCK_MIPS */ +#endif /* CONFIG_SYS_INIT_RAM_LOCK_MIPS */ diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c index 0f58d25..38d8697 100644 --- a/cpu/mips/cpu.c +++ b/cpu/mips/cpu.c @@ -51,7 +51,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) void flush_cache(ulong start_addr, ulong size) { - unsigned long lsize = CFG_CACHELINE_SIZE; + unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE; unsigned long addr = start_addr & ~(lsize - 1); unsigned long aend = (start_addr + size - 1) & ~(lsize - 1); diff --git a/cpu/mips/start.S b/cpu/mips/start.S index 09e4aab..6a22302 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -274,14 +274,14 @@ reset: /* Set up temporary stack. */ -#ifdef CFG_INIT_RAM_LOCK_MIPS - li a0, CFG_INIT_SP_OFFSET +#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS + li a0, CONFIG_SYS_INIT_SP_OFFSET la t9, mips_cache_lock jalr t9 nop #endif - li t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET + li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET la sp, 0(t0) la t9, board_init_f @@ -303,7 +303,7 @@ reset: relocate_code: move sp, a0 /* Set new stack pointer */ - li t0, CFG_MONITOR_BASE + li t0, CONFIG_SYS_MONITOR_BASE la t3, in_ram lw t2, -12(t3) /* t2 <-- uboot_end_data */ move t1, a2 @@ -311,10 +311,10 @@ relocate_code: /* * Fix $gp: * - * New $gp = (Old $gp - CFG_MONITOR_BASE) + Destination Address + * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address */ move t6, gp - sub gp, CFG_MONITOR_BASE + sub gp, CONFIG_SYS_MONITOR_BASE add gp, a2 /* gp now adjusted */ sub t6, gp, t6 /* t6 <-- relocation offset */ |