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-rw-r--r--cpu/mcf532x/config.mk12
-rw-r--r--cpu/mcf532x/cpu_init.c39
-rw-r--r--cpu/mcf532x/speed.c2
-rw-r--r--cpu/mcf532x/start.S72
4 files changed, 43 insertions, 82 deletions
diff --git a/cpu/mcf532x/config.mk b/cpu/mcf532x/config.mk
index 0cb90ac..b783444 100644
--- a/cpu/mcf532x/config.mk
+++ b/cpu/mcf532x/config.mk
@@ -24,8 +24,20 @@
#
PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+
+cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
+is5301x:=$(shell grep CONFIG_MCF5301x $(TOPDIR)/include/$(cfg))
+is532x:=$(shell grep CONFIG_MCF532x $(TOPDIR)/include/$(cfg))
+
ifneq ($(findstring 4.1,$(shell $(CC) --version)),4.1)
+
+ifneq (,$(findstring CONFIG_MCF5301x,$(is5301x)))
+PLATFORM_CPPFLAGS += -mcpu=53015 -fPIC
+endif
+ifneq (,$(findstring CONFIG_MCF532x,$(is532x)))
PLATFORM_CPPFLAGS += -mcpu=5329 -fPIC
+endif
+
else
PLATFORM_CPPFLAGS += -m5307 -fPIC
endif
diff --git a/cpu/mcf532x/cpu_init.c b/cpu/mcf532x/cpu_init.c
index 4f1695c..6f551b6 100644
--- a/cpu/mcf532x/cpu_init.c
+++ b/cpu/mcf532x/cpu_init.c
@@ -133,24 +133,26 @@ int cpu_init_r(void)
return (0);
}
-void uart_port_conf(void)
+void uart_port_conf(int port)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
/* Setup Ports: */
- switch (CONFIG_SYS_UART_PORT) {
+ switch (port) {
case 0:
- gpio->par_uart = (GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD);
+ gpio->par_uart &= ~(GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD);
+ gpio->par_uart |= (GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD);
break;
case 1:
#ifdef CONFIG_SYS_UART1_ALT1_GPIO
gpio->par_simp1h &=
- ~(GPIO_PAR_SIMP1H_DATA1_MASK | GPIO_PAR_SIMP1H_VEN1_MASK);
+ ~(GPIO_PAR_SIMP1H_DATA1_UNMASK |
+ GPIO_PAR_SIMP1H_VEN1_UNMASK);
gpio->par_simp1h |=
(GPIO_PAR_SIMP1H_DATA1_U1TXD | GPIO_PAR_SIMP1H_VEN1_U1RXD);
#elif defined(CONFIG_SYS_UART1_ALT2_GPIO)
gpio->par_ssih &=
- ~(GPIO_PAR_SSIH_RXD_MASK | GPIO_PAR_SSIH_TXD_MASK);
+ ~(GPIO_PAR_SSIH_RXD_UNMASK | GPIO_PAR_SSIH_TXD_UNMASK);
gpio->par_ssih |=
(GPIO_PAR_SSIH_RXD_U1RXD | GPIO_PAR_SSIH_TXD_U1TXD);
#endif
@@ -160,12 +162,12 @@ void uart_port_conf(void)
gpio->par_uart |= (GPIO_PAR_UART_U2TXD | GPIO_PAR_UART_U2RXD);
#elif defined(CONFIG_SYS_UART2_ALT1_GPIO)
gpio->par_dspih &=
- ~(GPIO_PAR_DSPIH_SIN_MASK | GPIO_PAR_DSPIH_SOUT_MASK);
+ ~(GPIO_PAR_DSPIH_SIN_UNMASK | GPIO_PAR_DSPIH_SOUT_UNMASK);
gpio->par_dspih |=
(GPIO_PAR_DSPIH_SIN_U2RXD | GPIO_PAR_DSPIH_SOUT_U2TXD);
#elif defined(CONFIG_SYS_UART2_ALT2_GPIO)
gpio->par_feci2c &=
- ~(GPIO_PAR_FECI2C_SDA_MASK | GPIO_PAR_FECI2C_SCL_MASK);
+ ~(GPIO_PAR_FECI2C_SDA_UNMASK | GPIO_PAR_FECI2C_SCL_UNMASK);
gpio->par_feci2c |=
(GPIO_PAR_FECI2C_SDA_U2TXD | GPIO_PAR_FECI2C_SCL_U2RXD);
#endif
@@ -195,11 +197,11 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
gpio->par_fec &=
~(GPIO_PAR_FEC0_7W_FEC | GPIO_PAR_FEC0_RMII_FEC);
- gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII0_MASK;
+ gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII0_UNMASK;
} else {
gpio->par_fec &=
~(GPIO_PAR_FEC1_7W_FEC | GPIO_PAR_FEC1_RMII_FEC);
- gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII1_MASK;
+ gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII1_UNMASK;
}
}
return 0;
@@ -297,22 +299,33 @@ int cpu_init_r(void)
return (0);
}
-void uart_port_conf(void)
+void uart_port_conf(int port)
{
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
/* Setup Ports: */
- switch (CONFIG_SYS_UART_PORT) {
+ switch (port) {
case 0:
- gpio->par_uart = (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
+ gpio->par_uart &= ~(GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
+ gpio->par_uart |= (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
break;
case 1:
- gpio->par_uart =
+ gpio->par_uart &=
+ ~(GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
+ gpio->par_uart |=
(GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
break;
case 2:
+#ifdef CONFIG_SYS_UART2_ALT1_GPIO
gpio->par_timer &= 0x0F;
gpio->par_timer |= (GPIO_PAR_TIN3_URXD2 | GPIO_PAR_TIN2_UTXD2);
+#elif defined(CONFIG_SYS_UART2_ALT2_GPIO)
+ gpio->par_feci2c &= 0xFF00;
+ gpio->par_feci2c |= (GPIO_PAR_FECI2C_SCL_UTXD2 | GPIO_PAR_FECI2C_SDA_URXD2);
+#elif defined(CONFIG_SYS_UART2_ALT3_GPIO)
+ gpio->par_ssi &= 0xF0FF;
+ gpio->par_ssi |= (GPIO_PAR_SSI_RXD(2) | GPIO_PAR_SSI_TXD(2));
+#endif
break;
}
}
diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c
index 67f08c7..5a29e25 100644
--- a/cpu/mcf532x/speed.c
+++ b/cpu/mcf532x/speed.c
@@ -229,7 +229,7 @@ int clock_pll(int fsys, int flags)
PLL_PDR_OUTDIV3((BUSDIV / 2) - 1) |
PLL_PDR_OUTDIV4(USBDIV - 1);
- pll->pcr &= PLL_PCR_FBDIV_MASK;
+ pll->pcr &= PLL_PCR_FBDIV_UNMASK;
pll->pcr |= PLL_PCR_FBDIV(mfd - 1);
#endif
#ifdef CONFIG_MCF532x
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index 5b134aa..a80b0a9 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -27,6 +27,7 @@
#include <config.h>
#include <timestamp.h>
#include "version.h"
+#include <asm/cache.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""
@@ -142,7 +143,7 @@ _start:
movec %d0, %RAMBAR1
/* invalidate and disable cache */
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ move.l #CF_CACR_CINVA, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
@@ -158,8 +159,8 @@ _start:
/* initialize general use internal ram */
move.l #0, %d0
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
+ move.l #(ICACHE_STATUS), %a1 /* icache */
+ move.l #(DCACHE_STATUS), %a2 /* icache */
move.l %d0, (%a1)
move.l %d0, (%a2)
@@ -279,71 +280,6 @@ _int_handler:
RESTORE_ALL
/*------------------------------------------------------------------------------*/
-/* cache functions */
- .globl icache_enable
-icache_enable:
- move.l #0x01000000, %d0 /* Invalidate cache cmd */
- movec %d0, %CACR /* Invalidate cache */
- move.l #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0) << 11)), %d0
- movec %d0, %ACR0 /* Enable cache */
-
- move.l #0x80000200, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- nop
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_disable
-icache_disable:
- move.l #0x01000000, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Disable cache */
- clr.l %d0 /* Setup cache mask */
- movec %d0, %ACR0
- movec %d0, %ACR1
-
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl icache_status
-icache_status:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
- move.l (%a1), %d0
- rts
-
- .globl icache_invalid
-icache_invalid:
- move.l #0x81000200, %d0 /* Setup cache mask */
- movec %d0, %CACR /* Enable cache */
- rts
-
- .globl dcache_enable
-dcache_enable:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- moveq #1, %d0
- move.l %d0, (%a1)
- rts
-
- /* No dcache, just a dummy function */
- .globl dcache_disable
-dcache_disable:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- moveq #0, %d0
- move.l %d0, (%a1)
- rts
-
- .globl dcache_status
-dcache_status:
- move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
- move.l (%a1), %d0
- rts
-
-/*------------------------------------------------------------------------------*/
-
.globl version_string
version_string:
.ascii U_BOOT_VERSION
generated by cgit v1.1 at 2024-10-11 16:00:29 +0000