summaryrefslogtreecommitdiff
path: root/cpu/blackfin/initcode.c
diff options
context:
space:
mode:
Diffstat (limited to 'cpu/blackfin/initcode.c')
-rw-r--r--cpu/blackfin/initcode.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c
index ed43f85..5f80ad6 100644
--- a/cpu/blackfin/initcode.c
+++ b/cpu/blackfin/initcode.c
@@ -34,7 +34,7 @@ static inline void serial_init(void)
size_t i;
/* force RTS rather than relying on auto RTS */
- bfin_write_UART1_MCR(bfin_read_UART1_MCR() | FCPOL);
+ bfin_write16(&pUART->mcr, bfin_read16(&pUART->mcr) | FCPOL);
/* Wait for the line to clear up. We cannot rely on UART
* registers as none of them reflect the status of the RSR.
@@ -64,7 +64,7 @@ static inline void serial_init(void)
#endif
if (BFIN_DEBUG_EARLY_SERIAL) {
- int ucen = *pUART_GCTL & UCEN;
+ int ucen = bfin_read16(&pUART->gctl) & UCEN;
serial_early_init();
/* If the UART is off, that means we need to program
@@ -81,7 +81,7 @@ static inline void serial_deinit(void)
#ifdef __ADSPBF54x__
if (BFIN_UART_USE_RTS && CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) {
/* clear forced RTS rather than relying on auto RTS */
- bfin_write_UART1_MCR(bfin_read_UART1_MCR() & ~FCPOL);
+ bfin_write16(&pUART->mcr, bfin_read16(&pUART->mcr) & ~FCPOL);
}
#endif
}
@@ -95,9 +95,9 @@ static inline void serial_putc(char c)
if (c == '\n')
serial_putc('\r');
- *pUART_THR = c;
+ bfin_write16(&pUART->thr, c);
- while (!(*pUART_LSR & TEMT))
+ while (!(bfin_read16(&pUART->lsr) & TEMT))
continue;
}