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-rw-r--r--cpu/bf533/bf533_serial.h4
-rw-r--r--cpu/bf533/cache.S3
-rw-r--r--cpu/bf533/cpu.c26
-rw-r--r--cpu/bf533/init_sdram.S4
-rw-r--r--cpu/bf533/init_sdram_bootrom_initblock.S4
-rw-r--r--cpu/bf533/interrupt.S12
-rw-r--r--cpu/bf533/interrupts.c4
-rw-r--r--cpu/bf533/ints.c37
-rw-r--r--cpu/bf533/serial.c47
-rw-r--r--cpu/bf533/start.S20
-rw-r--r--cpu/bf533/traps.c25
11 files changed, 85 insertions, 101 deletions
diff --git a/cpu/bf533/bf533_serial.h b/cpu/bf533/bf533_serial.h
index 25b96a9..9970b72 100644
--- a/cpu/bf533/bf533_serial.h
+++ b/cpu/bf533/bf533_serial.h
@@ -49,8 +49,8 @@
#include <asm/blackfin.h>
#define SYNC_ALL __asm__ __volatile__ ("ssync;\n")
-#define ACCESS_LATCH *pUART_LCR |= UART_LCR_DLAB;
-#define ACCESS_PORT_IER *pUART_LCR &= (~UART_LCR_DLAB);
+#define ACCESS_LATCH *pUART_LCR |= DLAB;
+#define ACCESS_PORT_IER *pUART_LCR &= (~DLAB);
void serial_setbrg(void);
static void local_put_char(char ch);
diff --git a/cpu/bf533/cache.S b/cpu/bf533/cache.S
index 03aebe4..d9015c6 100644
--- a/cpu/bf533/cache.S
+++ b/cpu/bf533/cache.S
@@ -2,6 +2,7 @@
#include <asm/linkage.h>
#include <config.h>
#include <asm/blackfin.h>
+#include <asm/mach-common/bits/mpu.h>
.text
.align 2
@@ -11,7 +12,7 @@ ENTRY(_blackfin_icache_flush_range)
P0 = R2;
P1 = R1;
CSYNC;
-1:
+ 1:
IFLUSH[P0++];
CC = P0 < P1(iu);
IF CC JUMP 1b(bp);
diff --git a/cpu/bf533/cpu.c b/cpu/bf533/cpu.c
index 8118861..edb771e 100644
--- a/cpu/bf533/cpu.c
+++ b/cpu/bf533/cpu.c
@@ -40,7 +40,7 @@ extern unsigned int dcplb_table[page_descriptor_table_size][2];
int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- __asm__ __volatile__("cli r3;" "P0 = %0;" "JUMP (P0);"::"r"(L1_ISRAM)
+ __asm__ __volatile__("cli r3;" "P0 = %0;" "JUMP (P0);"::"r"(L1_INST_SRAM)
);
return 0;
@@ -100,22 +100,18 @@ void icache_enable(void)
}
- cli();
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)IMEM_CONTROL = IMC | ENICPLB;
- sync();
- sti();
+ SSYNC();
}
void icache_disable(void)
{
- cli();
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)IMEM_CONTROL &= ~(IMC | ENICPLB);
- sync();
- sti();
+ SSYNC();
}
int icache_status(void)
@@ -175,14 +171,12 @@ void dcache_enable(void)
}
}
- cli();
temp = *(unsigned int *)DMEM_CONTROL;
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)DMEM_CONTROL =
ACACHE_BCACHE | ENDCPLB | PORT_PREF0 | temp;
- sync();
- sti();
+ SSYNC();
}
void dcache_disable(void)
@@ -190,13 +184,11 @@ void dcache_disable(void)
unsigned int *I0, *I1;
int i;
- cli();
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)DMEM_CONTROL &=
~(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
- sync();
- sti();
+ SSYNC();
/* after disable dcache,
* clear it so we don't confuse the next application
diff --git a/cpu/bf533/init_sdram.S b/cpu/bf533/init_sdram.S
index e1a8e2f..67a99e4 100644
--- a/cpu/bf533/init_sdram.S
+++ b/cpu/bf533/init_sdram.S
@@ -4,6 +4,10 @@
#include <config.h>
#include <asm/blackfin.h>
#include <asm/mem_init.h>
+#include <asm/mach-common/bits/bootrom.h>
+#include <asm/mach-common/bits/ebiu.h>
+#include <asm/mach-common/bits/pll.h>
+#include <asm/mach-common/bits/uart.h>
.global init_sdram;
#if (CONFIG_CCLK_DIV == 1)
diff --git a/cpu/bf533/init_sdram_bootrom_initblock.S b/cpu/bf533/init_sdram_bootrom_initblock.S
index 99ed920..8694ca2 100644
--- a/cpu/bf533/init_sdram_bootrom_initblock.S
+++ b/cpu/bf533/init_sdram_bootrom_initblock.S
@@ -4,6 +4,10 @@
#include <config.h>
#include <asm/blackfin.h>
#include <asm/mem_init.h>
+#include <asm/mach-common/bits/bootrom.h>
+#include <asm/mach-common/bits/ebiu.h>
+#include <asm/mach-common/bits/pll.h>
+#include <asm/mach-common/bits/uart.h>
.global init_sdram;
#if (CONFIG_CCLK_DIV == 1)
diff --git a/cpu/bf533/interrupt.S b/cpu/bf533/interrupt.S
index c356d53..7556ec9 100644
--- a/cpu/bf533/interrupt.S
+++ b/cpu/bf533/interrupt.S
@@ -42,9 +42,7 @@
#define ASSEMBLY
#include <config.h>
#include <asm/blackfin.h>
-#include <asm/hw_irq.h>
#include <asm/entry.h>
-#include <asm/blackfin_defs.h>
.global _blackfin_irq_panic;
@@ -55,7 +53,7 @@
.global _evt_emulation
_evt_emulation:
SAVE_CONTEXT
- r0 = IRQ_EMU;
+ r0 = 0;
r1 = seqstat;
sp += -12;
call _blackfin_irq_panic;
@@ -66,7 +64,7 @@ _evt_emulation:
.global _evt_nmi
_evt_nmi:
SAVE_CONTEXT
- r0 = IRQ_NMI;
+ r0 = 2;
r1 = RETN;
sp += -12;
call _blackfin_irq_panic;
@@ -88,7 +86,7 @@ _trap:
.global _evt_rst
_evt_rst:
SAVE_CONTEXT
- r0 = IRQ_RST;
+ r0 = 1;
r1 = RETN;
sp += -12;
call _do_reset;
@@ -98,7 +96,7 @@ _evt_rst_exit:
rtn;
irq_panic:
- r0 = IRQ_EVX;
+ r0 = 3;
r1 = sp;
sp += -12;
call _blackfin_irq_panic;
@@ -115,7 +113,7 @@ _evt_ivhw_exit:
.global _evt_timer
_evt_timer:
SAVE_CONTEXT
- r0 = IRQ_CORETMR;
+ r0 = 6;
sp += -12;
/* Polling method used now. */
/* call timer_int; */
diff --git a/cpu/bf533/interrupts.c b/cpu/bf533/interrupts.c
index 14d06cf..3d1c3bc 100644
--- a/cpu/bf533/interrupts.c
+++ b/cpu/bf533/interrupts.c
@@ -35,8 +35,6 @@
*/
#include <common.h>
-#include <asm/machdep.h>
-#include <asm/irq.h>
#include <config.h>
#include <asm/blackfin.h>
#include "cpu.h"
@@ -72,12 +70,10 @@ ulong get_tbclk(void)
void enable_interrupts(void)
{
- restore_flags(int_flag);
}
int disable_interrupts(void)
{
- save_and_cli(int_flag);
return 1;
}
diff --git a/cpu/bf533/ints.c b/cpu/bf533/ints.c
index 5586689..05d9a1b 100644
--- a/cpu/bf533/ints.c
+++ b/cpu/bf533/ints.c
@@ -39,12 +39,9 @@
#include <common.h>
#include <linux/stddef.h>
#include <asm/system.h>
-#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/io.h>
#include <asm/errno.h>
-#include <asm/machdep.h>
-#include <asm/setup.h>
#include <asm/blackfin.h>
#include "cpu.h"
@@ -61,42 +58,40 @@ void blackfin_irq_panic(int reason, struct pt_regs *regs)
void blackfin_init_IRQ(void)
{
- *(unsigned volatile long *)(SIC_IMASK) = SIC_UNMASK_ALL;
- cli();
+ *(unsigned volatile long *)(SIC_IMASK) = 0;
#ifndef CONFIG_KGDB
- *(unsigned volatile long *)(EVT_EMULATION_ADDR) = 0x0;
+ *(unsigned volatile long *)(EVT1) = 0x0;
#endif
- *(unsigned volatile long *)(EVT_NMI_ADDR) =
+ *(unsigned volatile long *)(EVT2) =
(unsigned volatile long)evt_nmi;
- *(unsigned volatile long *)(EVT_EXCEPTION_ADDR) =
+ *(unsigned volatile long *)(EVT3) =
(unsigned volatile long)trap;
- *(unsigned volatile long *)(EVT_HARDWARE_ERROR_ADDR) =
+ *(unsigned volatile long *)(EVT5) =
(unsigned volatile long)evt_ivhw;
- *(unsigned volatile long *)(EVT_RESET_ADDR) =
+ *(unsigned volatile long *)(EVT0) =
(unsigned volatile long)evt_rst;
- *(unsigned volatile long *)(EVT_TIMER_ADDR) =
+ *(unsigned volatile long *)(EVT6) =
(unsigned volatile long)evt_timer;
- *(unsigned volatile long *)(EVT_IVG7_ADDR) =
+ *(unsigned volatile long *)(EVT7) =
(unsigned volatile long)evt_evt7;
- *(unsigned volatile long *)(EVT_IVG8_ADDR) =
+ *(unsigned volatile long *)(EVT8) =
(unsigned volatile long)evt_evt8;
- *(unsigned volatile long *)(EVT_IVG9_ADDR) =
+ *(unsigned volatile long *)(EVT9) =
(unsigned volatile long)evt_evt9;
- *(unsigned volatile long *)(EVT_IVG10_ADDR) =
+ *(unsigned volatile long *)(EVT10) =
(unsigned volatile long)evt_evt10;
- *(unsigned volatile long *)(EVT_IVG11_ADDR) =
+ *(unsigned volatile long *)(EVT11) =
(unsigned volatile long)evt_evt11;
- *(unsigned volatile long *)(EVT_IVG12_ADDR) =
+ *(unsigned volatile long *)(EVT12) =
(unsigned volatile long)evt_evt12;
- *(unsigned volatile long *)(EVT_IVG13_ADDR) =
+ *(unsigned volatile long *)(EVT13) =
(unsigned volatile long)evt_evt13;
- *(unsigned volatile long *)(EVT_IVG14_ADDR) =
+ *(unsigned volatile long *)(EVT14) =
(unsigned volatile long)evt_system_call;
- *(unsigned volatile long *)(EVT_IVG15_ADDR) =
+ *(unsigned volatile long *)(EVT15) =
(unsigned volatile long)evt_soft_int1;
*(volatile unsigned long *)ILAT = 0;
asm("csync;");
- sti();
*(volatile unsigned long *)IMASK = 0xffbf;
asm("csync;");
}
diff --git a/cpu/bf533/serial.c b/cpu/bf533/serial.c
index 8ac6e3f..05fcfcc 100644
--- a/cpu/bf533/serial.c
+++ b/cpu/bf533/serial.c
@@ -43,14 +43,12 @@
*/
#include <common.h>
-#include <asm/irq.h>
#include <asm/system.h>
-#include <asm/segment.h>
#include <asm/bitops.h>
#include <asm/delay.h>
-#include <asm/uaccess.h>
#include <asm/io.h>
#include "bf533_serial.h"
+#include <asm/mach-common/bits/uart.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -85,30 +83,30 @@ void serial_setbrg(void)
}
/* Enable UART */
- *pUART_GCTL |= UART_GCTL_UCEN;
- sync();
+ *pUART_GCTL |= UCEN;
+ SSYNC();
/* Set DLAB in LCR to Access DLL and DLH */
ACCESS_LATCH;
- sync();
+ SSYNC();
*pUART_DLL = hw_baud_table[i].dl_low;
- sync();
+ SSYNC();
*pUART_DLH = hw_baud_table[i].dl_high;
- sync();
+ SSYNC();
/* Clear DLAB in LCR to Access THR RBR IER */
ACCESS_PORT_IER;
- sync();
+ SSYNC();
/* Enable ERBFI and ELSI interrupts
* to poll SIC_ISR register*/
- *pUART_IER = UART_IER_ELSI | UART_IER_ERBFI | UART_IER_ETBEI;
- sync();
+ *pUART_IER = ELSI | ERBFI | ETBEI;
+ SSYNC();
/* Set LCR to Word Lengh 8-bit word select */
- *pUART_LCR = UART_LCR_WLS8;
- sync();
+ *pUART_LCR = WLS_8;
+ SSYNC();
return;
}
@@ -121,14 +119,14 @@ int serial_init(void)
void serial_putc(const char c)
{
- if ((*pUART_LSR) & UART_LSR_TEMT) {
+ if ((*pUART_LSR) & TEMT) {
if (c == '\n')
serial_putc('\r');
local_put_char(c);
}
- while (!((*pUART_LSR) & UART_LSR_TEMT))
+ while (!((*pUART_LSR) & TEMT))
SYNC_ALL;
return;
@@ -136,7 +134,7 @@ void serial_putc(const char c)
int serial_tstc(void)
{
- if (*pUART_LSR & UART_LSR_DR)
+ if (*pUART_LSR & DR)
return 1;
else
return 0;
@@ -149,14 +147,14 @@ int serial_getc(void)
int ret;
/* Poll for RX Interrupt */
- while (!((isr_val =
- *(volatile unsigned long *)SIC_ISR) & IRQ_UART_RX_BIT)) ;
+ while (!serial_tstc())
+ continue;
asm("csync;");
uart_lsr_val = *pUART_LSR; /* Clear status bit */
uart_rbr_val = *pUART_RBR; /* getc() */
- if (isr_val & IRQ_UART_ERROR_BIT) {
+ if (uart_lsr_val & (OE|PE|FE|BI)) {
ret = -1;
} else {
ret = uart_rbr_val & 0xff;
@@ -177,19 +175,12 @@ static void local_put_char(char ch)
int flags = 0;
unsigned long isr_val;
- save_and_cli(flags);
-
/* Poll for TX Interruput */
- while (!((isr_val = *pSIC_ISR) & IRQ_UART_TX_BIT)) ;
+ while (!(*pUART_LSR & THRE))
+ continue;
asm("csync;");
*pUART_THR = ch; /* putc() */
- if (isr_val & IRQ_UART_ERROR_BIT) {
- printf("?");
- }
-
- restore_flags(flags);
-
return;
}
diff --git a/cpu/bf533/start.S b/cpu/bf533/start.S
index 67a60cf..6b43b9d 100644
--- a/cpu/bf533/start.S
+++ b/cpu/bf533/start.S
@@ -41,6 +41,10 @@
#include <config.h>
#include <asm/blackfin.h>
+#include <asm/mach-common/bits/core.h>
+#include <asm/mach-common/bits/dma.h>
+#include <asm/mach-common/bits/pll.h>
+
.global _stext;
.global __bss_start;
.global start;
@@ -143,8 +147,8 @@ no_soft_reset:
nop;
/* Clear EVT registers */
- p0.h = (EVT_EMULATION_ADDR >> 16);
- p0.l = (EVT_EMULATION_ADDR & 0xFFFF);
+ p0.h = (EVT0 >> 16);
+ p0.l = (EVT0 & 0xFFFF);
p0 += 8;
p1 = 14;
r1 = 0;
@@ -200,8 +204,8 @@ loop1:
*/
/* To keep ourselves in the supervisor mode */
- p0.l = (EVT_IVG15_ADDR & 0xFFFF);
- p0.h = (EVT_IVG15_ADDR >> 16);
+ p0.l = (EVT15 & 0xFFFF);
+ p0.h = (EVT15 >> 16);
p1.l = _real_start;
p1.h = _real_start;
@@ -209,8 +213,8 @@ loop1:
p0.l = (IMASK & 0xFFFF);
p0.h = (IMASK >> 16);
- r0.l = LO(IVG15_POS);
- r0.h = HI(IVG15_POS);
+ r0.l = LO(EVT_IVG15);
+ r0.h = HI(EVT_IVG15);
[p0] = r0;
raise 15;
p0.l = WAIT_HERE;
@@ -236,8 +240,8 @@ copy:
R1.H = reset_end;
R1.L = reset_end;
R2 = R1 - R0; /* Count */
- R1.H = hi(L1_ISRAM); /* Destination Address (high) */
- R1.L = lo(L1_ISRAM); /* Destination Address (low) */
+ R1.H = hi(L1_INST_SRAM); /* Destination Address (high) */
+ R1.L = lo(L1_INST_SRAM); /* Destination Address (low) */
R3.L = DMAEN; /* Source DMAConfig Value (8-bit words) */
/* Destination DMAConfig Value (8-bit words) */
R4.L = (DI_EN | WNR | DMAEN);
diff --git a/cpu/bf533/traps.c b/cpu/bf533/traps.c
index 19b1fde..7e156d5 100644
--- a/cpu/bf533/traps.c
+++ b/cpu/bf533/traps.c
@@ -36,14 +36,13 @@
#include <common.h>
#include <linux/types.h>
#include <asm/errno.h>
-#include <asm/irq.h>
#include <asm/system.h>
#include <asm/traps.h>
-#include <asm/machdep.h>
#include "cpu.h"
-#include <asm/arch/anomaly.h>
#include <asm/cplb.h>
#include <asm/io.h>
+#include <asm/mach-common/bits/core.h>
+#include <asm/mach-common/bits/mpu.h>
void init_IRQ(void)
{
@@ -68,7 +67,7 @@ static unsigned int cplb_sizes[4] =
void trap_c(struct pt_regs *regs)
{
unsigned int addr;
- unsigned long trapnr = (regs->seqstat) & SEQSTAT_EXCAUSE;
+ unsigned long trapnr = (regs->seqstat) & EXCAUSE;
unsigned int i, j, size, *I0, *I1;
unsigned short data = 0;
@@ -76,7 +75,7 @@ void trap_c(struct pt_regs *regs)
/* 0x26 - Data CPLB Miss */
case VEC_CPLB_M:
-#ifdef ANOMALY_05000261
+#if ANOMALY_05000261
/*
* Work around an anomaly: if we see a new DCPLB fault,
* return without doing anything. Then,
@@ -118,16 +117,16 @@ void trap_c(struct pt_regs *regs)
/* Turn the cache off */
if (data) {
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)DMEM_CONTROL &=
~(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
- sync();
+ SSYNC();
} else {
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)IMEM_CONTROL &= ~(IMC | ENICPLB);
- sync();
+ SSYNC();
}
if (data) {
@@ -173,16 +172,16 @@ void trap_c(struct pt_regs *regs)
/* Turn the cache back on */
if (data) {
j = *(unsigned int *)DMEM_CONTROL;
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)DMEM_CONTROL =
ACACHE_BCACHE | ENDCPLB | PORT_PREF0 | j;
- sync();
+ SSYNC();
} else {
- sync();
+ SSYNC();
asm(" .align 8; ");
*(unsigned int *)IMEM_CONTROL = IMC | ENICPLB;
- sync();
+ SSYNC();
}
break;
generated by cgit v1.1 at 2024-12-18 15:23:35 +0000