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-rw-r--r--cpu/at91rm9200/at45.c114
-rw-r--r--cpu/at91rm9200/at91rm9200_ether.c90
-rw-r--r--cpu/at91rm9200/cpu.c4
-rw-r--r--cpu/at91rm9200/interrupts.c11
-rw-r--r--cpu/at91rm9200/start.S33
5 files changed, 120 insertions, 132 deletions
diff --git a/cpu/at91rm9200/at45.c b/cpu/at91rm9200/at45.c
index e0057e7..cf456fb 100644
--- a/cpu/at91rm9200/at45.c
+++ b/cpu/at91rm9200/at45.c
@@ -45,7 +45,7 @@ void AT91F_SpiInit(void) {
/* Reset the SPI */
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
- /* Configure SPI in Master Mode with No CS selected !!! */
+ /* Configure SPI in Master Mode with No CS selected !!! */
AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
/* Configure CS0 and CS3 */
@@ -83,38 +83,38 @@ void AT91F_SpiEnable(int cs) {
/*----------------------------------------------------------------------------*/
unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
{
- unsigned int timeout;
+ unsigned int timeout;
pDesc->state = BUSY;
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
- /* Initialize the Transmit and Receive Pointer */
- AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
- AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
+ /* Initialize the Transmit and Receive Pointer */
+ AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
+ AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
- /* Intialize the Transmit and Receive Counters */
- AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
- AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
+ /* Intialize the Transmit and Receive Counters */
+ AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
+ AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
if ( pDesc->tx_data_size != 0 ) {
- /* Initialize the Next Transmit and Next Receive Pointer */
- AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
+ /* Initialize the Next Transmit and Next Receive Pointer */
+ AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
/* Intialize the Next Transmit and Next Receive Counters */
AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
- AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
- }
+ AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
+ }
- /* arm simple, non interrupt dependent timer */
+ /* arm simple, non interrupt dependent timer */
reset_timer_masked();
timeout = 0;
AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT));
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
- pDesc->state = IDLE;
+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+ pDesc->state = IDLE;
if (timeout >= CFG_SPI_WRITE_TOUT){
printf("Error Timeout\n\r");
@@ -181,12 +181,12 @@ AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
pDesc->command[1] = 0;
pDesc->DataFlash_state = GET_STATUS;
- pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
- pDesc->tx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_size = 2 ;
- pDesc->tx_cmd_size = 2 ;
- status = AT91F_SpiWrite (pDesc);
+ pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
+ pDesc->tx_cmd_pt = pDesc->command ;
+ pDesc->rx_cmd_pt = pDesc->command ;
+ pDesc->rx_cmd_size = 2 ;
+ pDesc->tx_cmd_size = 2 ;
+ status = AT91F_SpiWrite (pDesc);
pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
@@ -215,7 +215,6 @@ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDe
}
-
/*------------------------------------------------------------------------------*/
/* Function Name : AT91F_DataFlashContinuousRead */
/* Object : Continuous stream Read */
@@ -226,7 +225,7 @@ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDe
/* Return value : State of the dataflash */
/*------------------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
- AT91PS_DataFlash pDataFlash,
+ AT91PS_DataFlash pDataFlash,
int src,
unsigned char *dataBuffer,
int sizeToRead )
@@ -245,7 +244,6 @@ AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
}
-
/*------------------------------------------------------------------------------*/
/* Function Name : AT91F_DataFlashPagePgmBuf */
/* Object : Main memory page program through buffer 1 or buffer 2 */
@@ -289,13 +287,12 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
return DATAFLASH_BAD_COMMAND;
/* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, 4, page*pDataFlash->pDevice->pages_size));
}
-
/*----------------------------------------------------------------------------- */
/* Function Name : AT91F_DataFlashWriteBuffer */
/* Object : Write data to the internal sram buffer 1 or 2 */
@@ -324,24 +321,24 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
return DATAFLASH_BUSY;
- /* Send first Write Command */
- pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
+ /* Send first Write Command */
+ pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
pDataFlash->pDataFlashDesc->command[1] = 0;
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
+ pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
+ pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = 4 ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = 4 ;
+ pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
+ pDataFlash->pDataFlashDesc->tx_cmd_size = 4 ;
+ pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
+ pDataFlash->pDataFlashDesc->rx_cmd_size = 4 ;
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
+ pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
+ pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
+ pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
+ pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
- return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
+ return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
}
@@ -404,7 +401,6 @@ AT91S_DataFlashStatus AT91F_PartialPageWrite (
}
-
/*------------------------------------------------------------------------------*/
/* Function Name : AT91F_DataFlashWrite_Overloaded */
/* Object : */
@@ -422,11 +418,11 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(
AT91F_SpiEnable(pDataFlash->pDevice->cs);
- if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
+ if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
return DATAFLASH_MEMORY_OVERFLOW;
- /* If destination does not fit a page start address */
- if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
+ /* If destination does not fit a page start address */
+ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
if (size < length)
@@ -438,12 +434,12 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(
AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, 1000);
/* Update size, source and destination pointers */
- size -= length;
- dest += length;
- src += length;
- }
+ size -= length;
+ dest += length;
+ src += length;
+ }
- while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
+ while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
/* program dataflash page */
if(!AT91F_DataFlashPagePgmBuf(pDataFlash, src, dest, pDataFlash->pDevice->pages_size ))
return DATAFLASH_ERROR;
@@ -451,20 +447,20 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(
AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, 1000);
/* Update size, source and destination pointers */
- size -= pDataFlash->pDevice->pages_size ;
- dest += pDataFlash->pDevice->pages_size ;
- src += pDataFlash->pDevice->pages_size ;
- }
+ size -= pDataFlash->pDevice->pages_size ;
+ dest += pDataFlash->pDevice->pages_size ;
+ src += pDataFlash->pDevice->pages_size ;
+ }
- /* If still some bytes to read */
- if ( size > 0 ) {
+ /* If still some bytes to read */
+ if ( size > 0 ) {
/* program dataflash page */
if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
return DATAFLASH_ERROR;
AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, 1000);
}
- return DATAFLASH_OK;
+ return DATAFLASH_OK;
}
@@ -501,7 +497,7 @@ int AT91F_DataFlashRead(
buffer += SizeToRead;
}
- return DATAFLASH_OK;
+ return DATAFLASH_OK;
}
@@ -514,8 +510,8 @@ int AT91F_DataFlashRead(
int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
{
AT91F_SpiEnable(cs);
- AT91F_DataFlashGetStatus(pDesc);
- return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
+ AT91F_DataFlashGetStatus(pDesc);
+ return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
}
#endif
diff --git a/cpu/at91rm9200/at91rm9200_ether.c b/cpu/at91rm9200/at91rm9200_ether.c
index 6e44150..47b57da 100644
--- a/cpu/at91rm9200/at91rm9200_ether.c
+++ b/cpu/at91rm9200/at91rm9200_ether.c
@@ -69,15 +69,15 @@ AT91PS_EMAC p_mac;
/** functions to interface the DAVICOM 10/100Mbps ethernet phy **********/
/*
- * Name:
+ * Name:
* dm9161_IsPhyConnected
- * Description:
+ * Description:
* Reads the 2 PHY ID registers
- * Arguments:
+ * Arguments:
* p_mac - pointer to AT91S_EMAC struct
- * Return value:
+ * Return value:
* TRUE - if id read successfully
- * FALSE- if error
+ * FALSE- if error
*/
static unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac)
{
@@ -96,14 +96,14 @@ static unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac)
}
/*
- * Name:
+ * Name:
* dm9161_GetLinkSpeed
- * Description:
- * Link parallel detection status of MAC is checked and set in the
+ * Description:
+ * Link parallel detection status of MAC is checked and set in the
* MAC configuration registers
- * Arguments:
- * p_mac - pointer to MAC
- * Return value:
+ * Arguments:
+ * p_mac - pointer to MAC
+ * Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
@@ -152,14 +152,14 @@ static UCHAR dm9161_GetLinkSpeed (AT91PS_EMAC p_mac)
/*
- * Name:
+ * Name:
* dm9161_InitPhy
- * Description:
- * MAC starts checking its link by using parallel detection and
+ * Description:
+ * MAC starts checking its link by using parallel detection and
* Autonegotiation and the same is set in the MAC configuration registers
- * Arguments:
+ * Arguments:
* p_mac - pointer to struct AT91S_EMAC
- * Return value:
+ * Return value:
* TRUE - if link status set succesfully
* FALSE - if link status not set
*/
@@ -188,14 +188,14 @@ static UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac)
/*
- * Name:
+ * Name:
* dm9161_AutoNegotiate
- * Description:
- * MAC Autonegotiates with the partner status of same is set in the
+ * Description:
+ * MAC Autonegotiates with the partner status of same is set in the
* MAC configuration registers
- * Arguments:
+ * Arguments:
* dev - pointer to struct net_device
- * Return value:
+ * Return value:
* TRUE - if link status set successfully
* FALSE - if link status not set
*/
@@ -259,17 +259,15 @@ static UCHAR dm9161_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
}
-
-
/*********** EMAC Phy layer Management functions *************************/
/*
- * Name:
+ * Name:
* at91rm9200_EmacEnableMDIO
- * Description:
+ * Description:
* Enables the MDIO bit in MAC control register
- * Arguments:
+ * Arguments:
* p_mac - pointer to struct AT91S_EMAC
- * Return value:
+ * Return value:
* none
*/
static void at91rm9200_EmacEnableMDIO (AT91PS_EMAC p_mac)
@@ -279,13 +277,13 @@ static void at91rm9200_EmacEnableMDIO (AT91PS_EMAC p_mac)
}
/*
- * Name:
+ * Name:
* at91rm9200_EmacDisableMDIO
- * Description:
+ * Description:
* Disables the MDIO bit in MAC control register
- * Arguments:
+ * Arguments:
* p_mac - pointer to struct AT91S_EMAC
- * Return value:
+ * Return value:
* none
*/
static void at91rm9200_EmacDisableMDIO (AT91PS_EMAC p_mac)
@@ -296,15 +294,15 @@ static void at91rm9200_EmacDisableMDIO (AT91PS_EMAC p_mac)
/*
- * Name:
+ * Name:
* at91rm9200_EmacReadPhy
- * Description:
+ * Description:
* Reads data from the PHY register
- * Arguments:
+ * Arguments:
* dev - pointer to struct net_device
* RegisterAddress - unsigned char
- * pInput - pointer to value read from register
- * Return value:
+ * pInput - pointer to value read from register
+ * Return value:
* TRUE - if data read successfully
*/
static UCHAR at91rm9200_EmacReadPhy (AT91PS_EMAC p_mac,
@@ -324,15 +322,15 @@ static UCHAR at91rm9200_EmacReadPhy (AT91PS_EMAC p_mac,
/*
- * Name:
+ * Name:
* at91rm9200_EmacWritePhy
- * Description:
+ * Description:
* Writes data to the PHY register
- * Arguments:
+ * Arguments:
* dev - pointer to struct net_device
* RegisterAddress - unsigned char
- * pOutput - pointer to value to be written in the register
- * Return value:
+ * pOutput - pointer to value to be written in the register
+ * Return value:
* TRUE - if data read successfully
*/
static UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac,
@@ -349,13 +347,13 @@ static UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac,
}
/*
- * Name:
+ * Name:
* at91rm92000_GetPhyInterface
- * Description:
- * Initialise the interface functions to the PHY
- * Arguments:
+ * Description:
+ * Initialise the interface functions to the PHY
+ * Arguments:
* None
- * Return value:
+ * Return value:
* None
*/
void at91rm92000_GetPhyInterface (void)
diff --git a/cpu/at91rm9200/cpu.c b/cpu/at91rm9200/cpu.c
index ad3cd13..262ca34 100644
--- a/cpu/at91rm9200/cpu.c
+++ b/cpu/at91rm9200/cpu.c
@@ -54,7 +54,7 @@ static void write_p15_c1(unsigned long value)
{
/*printf("write %08lx to p15/c1\n", value); */
__asm__ __volatile__(
- "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
+ "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
: "=r" (value)
:
: "memory");
@@ -86,7 +86,7 @@ int cpu_init(void)
*/
#ifdef CONFIG_USE_IRQ
IRQ_STACK_START = _armboot_end +
- CONFIG_STACKSIZE + CONFIG_STACKSIZE_IRQ - 4;
+ CONFIG_STACKSIZE + CONFIG_STACKSIZE_IRQ - 4;
FIQ_STACK_START = IRQ_STACK_START + CONFIG_STACKSIZE_FIQ;
_armboot_real_end = FIQ_STACK_START + 4;
#else
diff --git a/cpu/at91rm9200/interrupts.c b/cpu/at91rm9200/interrupts.c
index d9c7c55..407df9c 100644
--- a/cpu/at91rm9200/interrupts.c
+++ b/cpu/at91rm9200/interrupts.c
@@ -45,7 +45,6 @@ extern void reset_cpu(ulong addr);
AT91PS_TC tmr;
-
void enable_interrupts (void)
{
return;
@@ -209,11 +208,11 @@ ulong get_timer_masked(void)
ulong now = READ_TIMER;
if (now >= lastinc)
{
- /* normal mode */
- timestamp += now - lastinc;
+ /* normal mode */
+ timestamp += now - lastinc;
} else {
- /* we have an overflow ... */
- timestamp += now + TIMER_LOAD_VAL - lastinc;
+ /* we have an overflow ... */
+ timestamp += now + TIMER_LOAD_VAL - lastinc;
}
lastinc = now;
@@ -233,5 +232,3 @@ void udelay_masked(unsigned long usec)
while(get_timer_masked() < tmo);
/*NOP*/;
}
-
-
diff --git a/cpu/at91rm9200/start.S b/cpu/at91rm9200/start.S
index 9b3e7aa..e955d43 100644
--- a/cpu/at91rm9200/start.S
+++ b/cpu/at91rm9200/start.S
@@ -24,7 +24,6 @@
*/
-
#include "config.h"
#include "version.h"
@@ -124,12 +123,12 @@ FIQ_STACK_START:
reset:
/*
- * set the cpu to SVC32 mode
- */
- mrs r0,cpsr
- bic r0,r0,#0x1f
- orr r0,r0,#0x13
- msr cpsr,r0
+ * set the cpu to SVC32 mode
+ */
+ mrs r0,cpsr
+ bic r0,r0,#0x1f
+ orr r0,r0,#0x13
+ msr cpsr,r0
/*
* relocate exeception table
@@ -144,18 +143,18 @@ copyex:
bne copyex
/*
- * we do sys-critical inits only at reboot,
- * not when booting from ram!
- */
+ * we do sys-critical inits only at reboot,
+ * not when booting from ram!
+ */
#ifdef CONFIG_INIT_CRITICAL
- bl cpu_init_crit
+ bl cpu_init_crit
#endif
- /* set up the stack */
- ldr r0, _armboot_end
- add r0, r0, #CONFIG_STACKSIZE
- sub sp, r0, #12 /* leave 3 words for abort-stack */
- ldr pc,_start_armboot
+ /* set up the stack */
+ ldr r0, _armboot_end
+ add r0, r0, #CONFIG_STACKSIZE
+ sub sp, r0, #12 /* leave 3 words for abort-stack */
+ ldr pc,_start_armboot
_start_armboot: .word start_armboot
@@ -172,8 +171,6 @@ cpu_init_crit:
mov pc, lr
-
-
/*
*************************************************************************
*
generated by cgit v1.1 at 2024-11-15 10:40:44 +0000