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-rw-r--r--cpu/at32ap/at32ap7000/Makefile2
-rw-r--r--cpu/at32ap/at32ap7000/devices.c448
-rw-r--r--cpu/at32ap/at32ap7000/gpio.c137
-rw-r--r--cpu/at32ap/at32ap7000/hebi.c38
4 files changed, 138 insertions, 487 deletions
diff --git a/cpu/at32ap/at32ap7000/Makefile b/cpu/at32ap/at32ap7000/Makefile
index 2ed74d2..d276712 100644
--- a/cpu/at32ap/at32ap7000/Makefile
+++ b/cpu/at32ap/at32ap7000/Makefile
@@ -24,7 +24,7 @@ include $(TOPDIR)/config.mk
LIB := $(obj)lib$(SOC).a
-COBJS := hebi.o devices.o
+COBJS := gpio.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/at32ap/at32ap7000/devices.c b/cpu/at32ap/at32ap7000/devices.c
deleted file mode 100644
index 8b216e9..0000000
--- a/cpu/at32ap/at32ap7000/devices.c
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * Copyright (C) 2006 Atmel Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-
-#include <asm/arch/memory-map.h>
-#include <asm/arch/platform.h>
-
-#include "../sm.h"
-
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-
-const struct clock_domain chip_clock[] = {
- [CLOCK_CPU] = {
- .reg = SM_PM_CPU_MASK,
- .id = CLOCK_CPU,
- .bridge = NO_DEVICE,
- },
- [CLOCK_HSB] = {
- .reg = SM_PM_HSB_MASK,
- .id = CLOCK_HSB,
- .bridge = NO_DEVICE,
- },
- [CLOCK_PBA] = {
- .reg = SM_PM_PBA_MASK,
- .id = CLOCK_PBA,
- .bridge = DEVICE_PBA_BRIDGE,
- },
- [CLOCK_PBB] = {
- .reg = SM_PM_PBB_MASK,
- .id = CLOCK_PBB,
- .bridge = DEVICE_PBB_BRIDGE,
- },
-};
-
-static const struct resource hebi_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 0 },
- },
- }, {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 13 },
- },
- }, {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 14 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 27, DEVICE_PIOE, GPIO_FUNC_A, 0 },
- },
- },
-};
-static const struct resource pba_bridge_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 1 },
- }
- }, {
- .type = RESOURCE_CLOCK,
- .u = {
- /* HSB-HSB Bridge */
- .clock = { CLOCK_HSB, 4 },
- },
- },
-};
-static const struct resource pbb_bridge_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 2 },
- },
- },
-};
-static const struct resource hramc_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 3 },
- },
- },
-};
-static const struct resource pioa_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 10 },
- },
- },
-};
-static const struct resource piob_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 11 },
- },
- },
-};
-static const struct resource pioc_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 12 },
- },
- },
-};
-static const struct resource piod_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 13 },
- },
- },
-};
-static const struct resource pioe_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 14 },
- },
- },
-};
-static const struct resource sm_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 0 },
- },
- },
-};
-static const struct resource intc_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 1 },
- },
- },
-};
-static const struct resource hmatrix_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 2 },
- },
- },
-};
-#if defined(CFG_HPDC)
-static const struct resource hpdc_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 16 },
- },
- },
-};
-#endif
-#if defined(CFG_MACB0)
-static const struct resource macb0_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 8 },
- },
- }, {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 6 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 19, DEVICE_PIOC, GPIO_FUNC_A, 0 },
- },
- },
-};
-#endif
-#if defined(CFG_MACB1)
-static const struct resource macb1_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 9 },
- },
- }, {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 7 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 12, DEVICE_PIOC, GPIO_FUNC_B, 19 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 14, DEVICE_PIOD, GPIO_FUNC_B, 2 },
- },
- },
-};
-#endif
-#if defined(CFG_LCDC)
-static const struct resource lcdc_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 7 },
- },
- },
-};
-#endif
-#if defined(CFG_USART0)
-static const struct resource usart0_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 3 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 2, DEVICE_PIOA, GPIO_FUNC_B, 8 },
- },
- },
-};
-#endif
-#if defined(CFG_USART1)
-static const struct resource usart1_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 4 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 2, DEVICE_PIOA, GPIO_FUNC_A, 17 },
- },
- },
-};
-#endif
-#if defined(CFG_USART2)
-static const struct resource usart2_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 5 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 2, DEVICE_PIOB, GPIO_FUNC_B, 26 },
- },
- },
-};
-#endif
-#if defined(CFG_USART3)
-static const struct resource usart3_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBA, 6 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 2, DEVICE_PIOB, GPIO_FUNC_B, 17 },
- },
- },
-};
-#endif
-#if defined(CFG_MMCI)
-static const struct resource mmci_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_PBB, 9 },
- },
- }, {
- .type = RESOURCE_GPIO,
- .u = {
- .gpio = { 6, DEVICE_PIOA, GPIO_FUNC_A, 10 },
- },
- },
-};
-#endif
-#if defined(CFG_DMAC)
-static const struct resource dmac_resource[] = {
- {
- .type = RESOURCE_CLOCK,
- .u = {
- .clock = { CLOCK_HSB, 10 },
- },
- },
-};
-#endif
-
-const struct device chip_device[] = {
- [DEVICE_HEBI] = {
- .regs = (void *)HSMC_BASE,
- .nr_resources = ARRAY_SIZE(hebi_resource),
- .resource = hebi_resource,
- },
- [DEVICE_PBA_BRIDGE] = {
- .nr_resources = ARRAY_SIZE(pba_bridge_resource),
- .resource = pba_bridge_resource,
- },
- [DEVICE_PBB_BRIDGE] = {
- .nr_resources = ARRAY_SIZE(pbb_bridge_resource),
- .resource = pbb_bridge_resource,
- },
- [DEVICE_HRAMC] = {
- .nr_resources = ARRAY_SIZE(hramc_resource),
- .resource = hramc_resource,
- },
- [DEVICE_PIOA] = {
- .regs = (void *)PIOA_BASE,
- .nr_resources = ARRAY_SIZE(pioa_resource),
- .resource = pioa_resource,
- },
- [DEVICE_PIOB] = {
- .regs = (void *)PIOB_BASE,
- .nr_resources = ARRAY_SIZE(piob_resource),
- .resource = piob_resource,
- },
- [DEVICE_PIOC] = {
- .regs = (void *)PIOC_BASE,
- .nr_resources = ARRAY_SIZE(pioc_resource),
- .resource = pioc_resource,
- },
- [DEVICE_PIOD] = {
- .regs = (void *)PIOD_BASE,
- .nr_resources = ARRAY_SIZE(piod_resource),
- .resource = piod_resource,
- },
- [DEVICE_PIOE] = {
- .regs = (void *)PIOE_BASE,
- .nr_resources = ARRAY_SIZE(pioe_resource),
- .resource = pioe_resource,
- },
- [DEVICE_SM] = {
- .regs = (void *)SM_BASE,
- .nr_resources = ARRAY_SIZE(sm_resource),
- .resource = sm_resource,
- },
- [DEVICE_INTC] = {
- .regs = (void *)INTC_BASE,
- .nr_resources = ARRAY_SIZE(intc_resource),
- .resource = intc_resource,
- },
- [DEVICE_HMATRIX] = {
- .regs = (void *)HMATRIX_BASE,
- .nr_resources = ARRAY_SIZE(hmatrix_resource),
- .resource = hmatrix_resource,
- },
-#if defined(CFG_HPDC)
- [DEVICE_HPDC] = {
- .nr_resources = ARRAY_SIZE(hpdc_resource),
- .resource = hpdc_resource,
- },
-#endif
-#if defined(CFG_MACB0)
- [DEVICE_MACB0] = {
- .regs = (void *)MACB0_BASE,
- .nr_resources = ARRAY_SIZE(macb0_resource),
- .resource = macb0_resource,
- },
-#endif
-#if defined(CFG_MACB1)
- [DEVICE_MACB1] = {
- .regs = (void *)MACB1_BASE,
- .nr_resources = ARRAY_SIZE(macb1_resource),
- .resource = macb1_resource,
- },
-#endif
-#if defined(CFG_LCDC)
- [DEVICE_LCDC] = {
- .nr_resources = ARRAY_SIZE(lcdc_resource),
- .resource = lcdc_resource,
- },
-#endif
-#if defined(CFG_USART0)
- [DEVICE_USART0] = {
- .regs = (void *)USART0_BASE,
- .nr_resources = ARRAY_SIZE(usart0_resource),
- .resource = usart0_resource,
- },
-#endif
-#if defined(CFG_USART1)
- [DEVICE_USART1] = {
- .regs = (void *)USART1_BASE,
- .nr_resources = ARRAY_SIZE(usart1_resource),
- .resource = usart1_resource,
- },
-#endif
-#if defined(CFG_USART2)
- [DEVICE_USART2] = {
- .regs = (void *)USART2_BASE,
- .nr_resources = ARRAY_SIZE(usart2_resource),
- .resource = usart2_resource,
- },
-#endif
-#if defined(CFG_USART3)
- [DEVICE_USART3] = {
- .regs = (void *)USART3_BASE,
- .nr_resources = ARRAY_SIZE(usart3_resource),
- .resource = usart3_resource,
- },
-#endif
-#if defined(CFG_MMCI)
- [DEVICE_MMCI] = {
- .regs = (void *)MMCI_BASE,
- .nr_resources = ARRAY_SIZE(mmci_resource),
- .resource = mmci_resource,
- },
-#endif
-#if defined(CFG_DMAC)
- [DEVICE_DMAC] = {
- .regs = (void *)DMAC_BASE,
- .nr_resources = ARRAY_SIZE(dmac_resource),
- .resource = dmac_resource,
- },
-#endif
-};
diff --git a/cpu/at32ap/at32ap7000/gpio.c b/cpu/at32ap/at32ap7000/gpio.c
new file mode 100644
index 0000000..52f5372
--- /dev/null
+++ b/cpu/at32ap/at32ap7000/gpio.c
@@ -0,0 +1,137 @@
+/*
+ * Copyright (C) 2006 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+
+#include <asm/arch/gpio.h>
+
+/*
+ * Lots of small functions here. We depend on --gc-sections getting
+ * rid of the ones we don't need.
+ */
+void gpio_enable_ebi(void)
+{
+#ifdef CFG_HSDRAMC
+#ifndef CFG_SDRAM_16BIT
+ gpio_select_periph_A(GPIO_PIN_PE0, 0);
+ gpio_select_periph_A(GPIO_PIN_PE1, 0);
+ gpio_select_periph_A(GPIO_PIN_PE2, 0);
+ gpio_select_periph_A(GPIO_PIN_PE3, 0);
+ gpio_select_periph_A(GPIO_PIN_PE4, 0);
+ gpio_select_periph_A(GPIO_PIN_PE5, 0);
+ gpio_select_periph_A(GPIO_PIN_PE6, 0);
+ gpio_select_periph_A(GPIO_PIN_PE7, 0);
+ gpio_select_periph_A(GPIO_PIN_PE8, 0);
+ gpio_select_periph_A(GPIO_PIN_PE9, 0);
+ gpio_select_periph_A(GPIO_PIN_PE10, 0);
+ gpio_select_periph_A(GPIO_PIN_PE11, 0);
+ gpio_select_periph_A(GPIO_PIN_PE12, 0);
+ gpio_select_periph_A(GPIO_PIN_PE13, 0);
+ gpio_select_periph_A(GPIO_PIN_PE14, 0);
+ gpio_select_periph_A(GPIO_PIN_PE15, 0);
+#endif
+ gpio_select_periph_A(GPIO_PIN_PE26, 0);
+#endif
+}
+
+void gpio_enable_usart0(void)
+{
+ gpio_select_periph_B(GPIO_PIN_PA8, 0);
+ gpio_select_periph_B(GPIO_PIN_PA9, 0);
+}
+
+void gpio_enable_usart1(void)
+{
+ gpio_select_periph_A(GPIO_PIN_PA17, 0);
+ gpio_select_periph_A(GPIO_PIN_PA18, 0);
+}
+
+void gpio_enable_usart2(void)
+{
+ gpio_select_periph_B(GPIO_PIN_PB26, 0);
+ gpio_select_periph_B(GPIO_PIN_PB27, 0);
+}
+
+void gpio_enable_usart3(void)
+{
+ gpio_select_periph_B(GPIO_PIN_PB18, 0);
+ gpio_select_periph_B(GPIO_PIN_PB19, 0);
+}
+
+void gpio_enable_macb0(void)
+{
+ gpio_select_periph_A(GPIO_PIN_PC3, 0); /* TXD0 */
+ gpio_select_periph_A(GPIO_PIN_PC4, 0); /* TXD1 */
+ gpio_select_periph_A(GPIO_PIN_PC7, 0); /* TXEN */
+ gpio_select_periph_A(GPIO_PIN_PC8, 0); /* TXCK */
+ gpio_select_periph_A(GPIO_PIN_PC9, 0); /* RXD0 */
+ gpio_select_periph_A(GPIO_PIN_PC10, 0); /* RXD1 */
+ gpio_select_periph_A(GPIO_PIN_PC13, 0); /* RXER */
+ gpio_select_periph_A(GPIO_PIN_PC15, 0); /* RXDV */
+ gpio_select_periph_A(GPIO_PIN_PC16, 0); /* MDC */
+ gpio_select_periph_A(GPIO_PIN_PC17, 0); /* MDIO */
+#if !defined(CONFIG_RMII)
+ gpio_select_periph_A(GPIO_PIN_PC0, 0); /* COL */
+ gpio_select_periph_A(GPIO_PIN_PC1, 0); /* CRS */
+ gpio_select_periph_A(GPIO_PIN_PC2, 0); /* TXER */
+ gpio_select_periph_A(GPIO_PIN_PC5, 0); /* TXD2 */
+ gpio_select_periph_A(GPIO_PIN_PC6, 0); /* TXD3 */
+ gpio_select_periph_A(GPIO_PIN_PC11, 0); /* RXD2 */
+ gpio_select_periph_A(GPIO_PIN_PC12, 0); /* RXD3 */
+ gpio_select_periph_A(GPIO_PIN_PC14, 0); /* RXCK */
+ gpio_select_periph_A(GPIO_PIN_PC18, 0); /* SPD */
+#endif
+}
+
+void gpio_enable_macb1(void)
+{
+ gpio_select_periph_B(GPIO_PIN_PD13, 0); /* TXD0 */
+ gpio_select_periph_B(GPIO_PIN_PD14, 0); /* TXD1 */
+ gpio_select_periph_B(GPIO_PIN_PD11, 0); /* TXEN */
+ gpio_select_periph_B(GPIO_PIN_PD12, 0); /* TXCK */
+ gpio_select_periph_B(GPIO_PIN_PD10, 0); /* RXD0 */
+ gpio_select_periph_B(GPIO_PIN_PD6, 0); /* RXD1 */
+ gpio_select_periph_B(GPIO_PIN_PD5, 0); /* RXER */
+ gpio_select_periph_B(GPIO_PIN_PD4, 0); /* RXDV */
+ gpio_select_periph_B(GPIO_PIN_PD3, 0); /* MDC */
+ gpio_select_periph_B(GPIO_PIN_PD2, 0); /* MDIO */
+#if !defined(CONFIG_RMII)
+ gpio_select_periph_B(GPIO_PIN_PC19, 0); /* COL */
+ gpio_select_periph_B(GPIO_PIN_PC23, 0); /* CRS */
+ gpio_select_periph_B(GPIO_PIN_PC26, 0); /* TXER */
+ gpio_select_periph_B(GPIO_PIN_PC27, 0); /* TXD2 */
+ gpio_select_periph_B(GPIO_PIN_PC28, 0); /* TXD3 */
+ gpio_select_periph_B(GPIO_PIN_PC29, 0); /* RXD2 */
+ gpio_select_periph_B(GPIO_PIN_PC30, 0); /* RXD3 */
+ gpio_select_periph_B(GPIO_PIN_PC24, 0); /* RXCK */
+ gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD */
+#endif
+}
+
+void gpio_enable_mmci(void)
+{
+ gpio_select_periph_A(GPIO_PIN_PA10, 0); /* CLK */
+ gpio_select_periph_A(GPIO_PIN_PA11, 0); /* CMD */
+ gpio_select_periph_A(GPIO_PIN_PA12, 0); /* DATA0 */
+ gpio_select_periph_A(GPIO_PIN_PA13, 0); /* DATA1 */
+ gpio_select_periph_A(GPIO_PIN_PA14, 0); /* DATA2 */
+ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */
+}
diff --git a/cpu/at32ap/at32ap7000/hebi.c b/cpu/at32ap/at32ap7000/hebi.c
deleted file mode 100644
index 3b32adf..0000000
--- a/cpu/at32ap/at32ap7000/hebi.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2006 Atmel Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-
-#include <asm/io.h>
-
-#include <asm/arch/hmatrix2.h>
-#include <asm/arch/memory-map.h>
-#include <asm/arch/platform.h>
-
-void cpu_enable_sdram(void)
-{
- const struct device *hmatrix;
-
- hmatrix = get_device(DEVICE_HMATRIX);
-
- /* Set the SDRAM_ENABLE bit in the HEBI SFR */
- hmatrix2_writel(hmatrix, SFR4, 1 << 1);
-}
generated by cgit v1.1 at 2024-12-11 18:37:49 +0000