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-rw-r--r--cpu/arm926ejs/at91/.gitignore5
-rw-r--r--cpu/arm926ejs/at91/Makefile2
-rw-r--r--cpu/arm926ejs/at91/at91cap9_spi.c37
-rw-r--r--cpu/arm926ejs/at91/at91sam9260_spi.c36
-rw-r--r--cpu/arm926ejs/at91/at91sam9261_spi.c36
-rw-r--r--cpu/arm926ejs/at91/at91sam9263_spi.c36
-rw-r--r--cpu/arm926ejs/at91/at91sam9rl_spi.c18
-rw-r--r--cpu/arm926ejs/at91/spi.c157
-rw-r--r--cpu/arm926ejs/at91/usb.c80
9 files changed, 141 insertions, 266 deletions
diff --git a/cpu/arm926ejs/at91/.gitignore b/cpu/arm926ejs/at91/.gitignore
new file mode 100644
index 0000000..8a8c3b8
--- /dev/null
+++ b/cpu/arm926ejs/at91/.gitignore
@@ -0,0 +1,5 @@
+#
+# Generated files
+#
+
+/u-boot.lds
diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile
index f9e739c..34e7461 100644
--- a/cpu/arm926ejs/at91/Makefile
+++ b/cpu/arm926ejs/at91/Makefile
@@ -55,9 +55,7 @@ COBJS-y += at91sam9rl_serial.o
COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9rl_spi.o
endif
COBJS-$(CONFIG_AT91_LED) += led.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += spi.o
COBJS-y += timer.o
-COBJS-y += usb.o
SOBJS = lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
diff --git a/cpu/arm926ejs/at91/at91cap9_spi.c b/cpu/arm926ejs/at91/at91cap9_spi.c
index 356a804..cd8143b 100644
--- a/cpu/arm926ejs/at91/at91cap9_spi.c
+++ b/cpu/arm926ejs/at91/at91cap9_spi.c
@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PA5, 1);
+ at91_set_B_periph(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PA3, 1);
+ at91_set_B_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PD0, 1);
+ at91_set_B_periph(AT91_PIN_PD0, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_B_periph(AT91_PIN_PD1, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PA5, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PA3, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PD0, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PD1, 1);
}
}
@@ -61,15 +73,28 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PB15, 1);
+ at91_set_A_periph(AT91_PIN_PB15, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PB16, 1);
+ at91_set_A_periph(AT91_PIN_PB16, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PB17, 1);
+ at91_set_A_periph(AT91_PIN_PB17, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_A_periph(AT91_PIN_PB18, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PB15, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PB16, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PB17, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PB18, 1);
}
+
}
diff --git a/cpu/arm926ejs/at91/at91sam9260_spi.c b/cpu/arm926ejs/at91/at91sam9260_spi.c
index 0105072..d6fd80e 100644
--- a/cpu/arm926ejs/at91/at91sam9260_spi.c
+++ b/cpu/arm926ejs/at91/at91sam9260_spi.c
@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PA3, 1);
+ at91_set_A_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PC11, 1);
+ at91_set_B_periph(AT91_PIN_PC11, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PC16, 1);
+ at91_set_B_periph(AT91_PIN_PC16, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_B_periph(AT91_PIN_PC17, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PA3, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PC11, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PC16, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PC17, 1);
}
}
@@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PB3, 1);
+ at91_set_A_periph(AT91_PIN_PB3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PC5, 1);
+ at91_set_B_periph(AT91_PIN_PC5, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PC4, 1);
+ at91_set_B_periph(AT91_PIN_PC4, 1);
}
if (cs_mask & (1 << 3)) {
at91_set_gpio_output(AT91_PIN_PC3, 1);
}
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PB3, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PC5, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PC4, 1);
+ }
+ if (cs_mask & (1 << 7)) {
+ at91_set_gpio_output(AT91_PIN_PC3, 1);
+ }
}
diff --git a/cpu/arm926ejs/at91/at91sam9261_spi.c b/cpu/arm926ejs/at91/at91sam9261_spi.c
index f70320d..9383dc6 100644
--- a/cpu/arm926ejs/at91/at91sam9261_spi.c
+++ b/cpu/arm926ejs/at91/at91sam9261_spi.c
@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PA3, 1);
+ at91_set_A_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PA4, 1);
+ at91_set_A_periph(AT91_PIN_PA4, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PA5, 1);
+ at91_set_A_periph(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_A_periph(AT91_PIN_PA6, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PA3, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PA4, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PA5, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PA6, 1);
}
}
@@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PB28, 1);
+ at91_set_A_periph(AT91_PIN_PB28, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PA24, 1);
+ at91_set_B_periph(AT91_PIN_PA24, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PA25, 1);
+ at91_set_B_periph(AT91_PIN_PA25, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_A_periph(AT91_PIN_PA26, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PB28, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PA24, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PA25, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PA26, 1);
}
}
diff --git a/cpu/arm926ejs/at91/at91sam9263_spi.c b/cpu/arm926ejs/at91/at91sam9263_spi.c
index 1dda04c..e52dd61 100644
--- a/cpu/arm926ejs/at91/at91sam9263_spi.c
+++ b/cpu/arm926ejs/at91/at91sam9263_spi.c
@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PA5, 1);
+ at91_set_B_periph(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PA3, 1);
+ at91_set_B_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PA4, 1);
+ at91_set_B_periph(AT91_PIN_PA4, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_B_periph(AT91_PIN_PB11, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PA5, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PA3, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PA4, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PB11, 1);
}
}
@@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PB15, 1);
+ at91_set_A_periph(AT91_PIN_PB15, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PB16, 1);
+ at91_set_A_periph(AT91_PIN_PB16, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PB17, 1);
+ at91_set_A_periph(AT91_PIN_PB17, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_A_periph(AT91_PIN_PB18, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PB15, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PB16, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PB17, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PB18, 1);
}
}
diff --git a/cpu/arm926ejs/at91/at91sam9rl_spi.c b/cpu/arm926ejs/at91/at91sam9rl_spi.c
index aa9c183..389d6d8 100644
--- a/cpu/arm926ejs/at91/at91sam9rl_spi.c
+++ b/cpu/arm926ejs/at91/at91sam9rl_spi.c
@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PA28, 1);
+ at91_set_A_periph(AT91_PIN_PA28, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PB7, 1);
+ at91_set_B_periph(AT91_PIN_PB7, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PD8, 1);
+ at91_set_A_periph(AT91_PIN_PD8, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_B_periph(AT91_PIN_PD9, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PA28, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PB7, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PD8, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PD9, 1);
}
}
diff --git a/cpu/arm926ejs/at91/spi.c b/cpu/arm926ejs/at91/spi.c
deleted file mode 100644
index 3eb252c..0000000
--- a/cpu/arm926ejs/at91/spi.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_spi.h>
-
-#include <dataflash.h>
-
-#define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */
-#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 0: NPCS0%1101 */
-#define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */
-
-void AT91F_SpiInit(void)
-{
- /* Reset the SPI */
- writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR);
-
- /* Configure SPI in Master Mode with No CS selected !!! */
- writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
- AT91_BASE_SPI + AT91_SPI_MR);
-
- /* Configure CS0 */
- writel(AT91_SPI_NCPHA |
- (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
- (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
- ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8),
- AT91_BASE_SPI + AT91_SPI_CSR(0));
-
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
- /* Configure CS1 */
- writel(AT91_SPI_NCPHA |
- (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
- (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
- ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8),
- AT91_BASE_SPI + AT91_SPI_CSR(1));
-#endif
-
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
- /* Configure CS3 */
- writel(AT91_SPI_NCPHA |
- (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
- (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
- ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8),
- AT91_BASE_SPI + AT91_SPI_CSR(3));
-#endif
-
- /* SPI_Enable */
- writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
-
- while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS));
-
- /*
- * Add tempo to get SPI in a safe state.
- * Should not be needed for new silicon (Rev B)
- */
- udelay(500000);
- readl(AT91_BASE_SPI + AT91_SPI_SR);
- readl(AT91_BASE_SPI + AT91_SPI_RDR);
-
-}
-
-void AT91F_SpiEnable(int cs)
-{
- unsigned long mode;
-
- switch (cs) {
- case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
- mode &= 0xFFF0FFFF;
- writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
- AT91_BASE_SPI + AT91_SPI_MR);
- break;
- case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */
- mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
- mode &= 0xFFF0FFFF;
- writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
- AT91_BASE_SPI + AT91_SPI_MR);
- break;
- case 3:
- mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
- mode &= 0xFFF0FFFF;
- writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
- AT91_BASE_SPI + AT91_SPI_MR);
- break;
- }
-
- /* SPI_Enable */
- writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
-}
-
-unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
-
-unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
-{
- unsigned int timeout;
-
- pDesc->state = BUSY;
-
- writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
-
- /* Initialize the Transmit and Receive Pointer */
- writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR);
- writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR);
-
- /* Intialize the Transmit and Receive Counters */
- writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR);
- writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR);
-
- if (pDesc->tx_data_size != 0) {
- /* Initialize the Next Transmit and Next Receive Pointer */
- writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR);
- writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR);
-
- /* Intialize the Next Transmit and Next Receive Counters */
- writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR);
- writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR);
- }
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
- timeout = 0;
-
- writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR);
- while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
- ((timeout = get_timer_masked()) < CONFIG_SYS_SPI_WRITE_TOUT));
- writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
- pDesc->state = IDLE;
-
- if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
- printf("Error Timeout\n\r");
- return DATAFLASH_ERROR;
- }
-
- return DATAFLASH_OK;
-}
diff --git a/cpu/arm926ejs/at91/usb.c b/cpu/arm926ejs/at91/usb.c
deleted file mode 100644
index 7c44ad0..0000000
--- a/cpu/arm926ejs/at91/usb.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * (C) Copyright 2006
- * DENX Software Engineering <mk@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
-
-#include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
-#include <asm/arch/at91_pmc.h>
-
-int usb_cpu_init(void)
-{
-
-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
- defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
- /* Enable PLLB */
- at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB);
- while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
- ;
-#endif
-
- /* Enable USB host clock. */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
-#ifdef CONFIG_AT91SAM9261
- at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0);
-#else
- at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP);
-#endif
-
- return 0;
-}
-
-int usb_cpu_stop(void)
-{
- /* Disable USB host clock. */
- at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP);
-#ifdef CONFIG_AT91SAM9261
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0);
-#else
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
-#endif
-
-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
- defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
- /* Disable PLLB */
- at91_sys_write(AT91_CKGR_PLLBR, 0);
- while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)
- ;
-#endif
-
- return 0;
-}
-
-int usb_cpu_init_fail(void)
-{
- return usb_cpu_stop();
-}
-
-#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
generated by cgit v1.1 at 2024-11-10 19:00:50 +0000