diff options
Diffstat (limited to 'cpu/arm926ejs/at91/at91sam9rl_devices.c')
| -rw-r--r-- | cpu/arm926ejs/at91/at91sam9rl_devices.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/cpu/arm926ejs/at91/at91sam9rl_devices.c b/cpu/arm926ejs/at91/at91sam9rl_devices.c index ebed193..d74e144 100644 --- a/cpu/arm926ejs/at91/at91sam9rl_devices.c +++ b/cpu/arm926ejs/at91/at91sam9rl_devices.c @@ -30,29 +30,29 @@ void at91_serial0_hw_init(void) { - at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ - at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ + at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */ + at91_set_a_periph(AT91_PIO_PORTA, 7, 0); /* RXD0 */ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0); } void at91_serial1_hw_init(void) { - at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ - at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ + at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */ + at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* RXD1 */ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1); } void at91_serial2_hw_init(void) { - at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ - at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ + at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */ + at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* RXD2 */ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2); } void at91_serial3_hw_init(void) { - at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ - at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ + at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* DRXD */ + at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); } @@ -78,36 +78,36 @@ void at91_serial_hw_init(void) #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { - at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ - at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ - at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ + at91_set_a_periph(AT91_PIO_PORTA, 25, 0); /* SPI0_MISO */ + at91_set_a_periph(AT91_PIO_PORTA, 26, 0); /* SPI0_MOSI */ + at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* SPI0_SPCK */ /* Enable clock */ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); if (cs_mask & (1 << 0)) { - at91_set_A_periph(AT91_PIN_PA28, 1); + at91_set_a_periph(AT91_PIO_PORTA, 28, 1); } if (cs_mask & (1 << 1)) { - at91_set_B_periph(AT91_PIN_PB7, 1); + at91_set_b_periph(AT91_PIO_PORTB, 7, 1); } if (cs_mask & (1 << 2)) { - at91_set_A_periph(AT91_PIN_PD8, 1); + at91_set_a_periph(AT91_PIO_PORTD, 8, 1); } if (cs_mask & (1 << 3)) { - at91_set_B_periph(AT91_PIN_PD9, 1); + at91_set_b_periph(AT91_PIO_PORTD, 9, 1); } if (cs_mask & (1 << 4)) { - at91_set_gpio_output(AT91_PIN_PA28, 1); + at91_set_pio_output(AT91_PIO_PORTA, 28, 1); } if (cs_mask & (1 << 5)) { - at91_set_gpio_output(AT91_PIN_PB7, 1); + at91_set_pio_output(AT91_PIO_PORTB, 7, 1); } if (cs_mask & (1 << 6)) { - at91_set_gpio_output(AT91_PIN_PD8, 1); + at91_set_pio_output(AT91_PIO_PORTD, 8, 1); } if (cs_mask & (1 << 7)) { - at91_set_gpio_output(AT91_PIN_PD9, 1); + at91_set_pio_output(AT91_PIO_PORTD, 9, 1); } } #endif |