diff options
Diffstat (limited to 'cpu/arm926ejs/at91/at91sam9m10g45_devices.c')
| -rw-r--r-- | cpu/arm926ejs/at91/at91sam9m10g45_devices.c | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c index 6881e46..4ad9b1f 100644 --- a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c +++ b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c @@ -30,30 +30,38 @@ void at91_serial0_hw_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_set_a_periph(AT91_PIO_PORTB, 19, 1); /* TXD0 */ at91_set_a_periph(AT91_PIO_PORTB, 18, 0); /* RXD0 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US0); + writel(1 << AT91SAM9G45_ID_US0, &pmc->pcer); } void at91_serial1_hw_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD1 */ at91_set_a_periph(AT91_PIO_PORTB, 5, 0); /* RXD1 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US1); + writel(1 << AT91SAM9G45_ID_US1, &pmc->pcer); } void at91_serial2_hw_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_set_a_periph(AT91_PIO_PORTD, 6, 1); /* TXD2 */ at91_set_a_periph(AT91_PIO_PORTD, 7, 0); /* RXD2 */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US2); + writel(1 << AT91SAM9G45_ID_US2, &pmc->pcer); } void at91_serial3_hw_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* DRXD */ at91_set_a_periph(AT91_PIO_PORTB, 13, 1); /* DTXD */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);; + writel(1 << AT91_ID_SYS, &pmc->pcer); } void at91_serial_hw_init(void) @@ -78,12 +86,14 @@ void at91_serial_hw_init(void) #ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* SPI0_MISO */ at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* SPI0_MOSI */ at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* SPI0_SPCK */ /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_SPI0); + writel(1 << AT91SAM9G45_ID_SPI0, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTB, 3, 0); @@ -113,12 +123,14 @@ void at91_spi0_hw_init(unsigned long cs_mask) void at91_spi1_hw_init(unsigned long cs_mask) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_MISO */ at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* SPI1_MOSI */ at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* SPI1_SPCK */ /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_SPI1); + writel(1 << AT91SAM9G45_ID_SPI1, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTB, 17, 0); |