diff options
Diffstat (limited to 'board')
29 files changed, 1086 insertions, 714 deletions
diff --git a/board/compulab/cm_t335/u-boot.lds b/board/compulab/cm_t335/u-boot.lds index 0984dfe..c8ab716 100644 --- a/board/compulab/cm_t335/u-boot.lds +++ b/board/compulab/cm_t335/u-boot.lds @@ -18,6 +18,7 @@ SECTIONS .text : { *(.__image_copy_start) + *(.vectors) CPUDIR/start.o (.text*) board/compulab/cm_t335/built-in.o (.text*) *(.text*) diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds index 6da1d4b..61b83bf 100644 --- a/board/freescale/mx31ads/u-boot.lds +++ b/board/freescale/mx31ads/u-boot.lds @@ -22,6 +22,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ + * (.vectors) arch/arm/cpu/arm1136/start.o (.text*) board/freescale/mx31ads/built-in.o (.text*) arch/arm/lib/built-in.o (.text*) diff --git a/board/gumstix/pepper/Makefile b/board/gumstix/pepper/Makefile new file mode 100644 index 0000000..ecb1d61 --- /dev/null +++ b/board/gumstix/pepper/Makefile @@ -0,0 +1,13 @@ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifdef CONFIG_SPL_BUILD +obj-y += mux.o +endif + +obj-y += board.o diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c new file mode 100644 index 0000000..75aac49 --- /dev/null +++ b/board/gumstix/pepper/board.c @@ -0,0 +1,226 @@ +/* + * Board functions for Gumstix Pepper and AM335x-based boards + * + * Copyright (C) 2014, Gumstix, Incorporated - http://www.gumstix.com/ + * Based on board/ti/am335x/board.c from Texas Instruments, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <spl.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/ddr_defs.h> +#include <asm/arch/clock.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mem.h> +#include <asm/io.h> +#include <asm/emif.h> +#include <asm/gpio.h> +#include <i2c.h> +#include <miiphy.h> +#include <cpsw.h> +#include <power/tps65217.h> +#include <environment.h> +#include <watchdog.h> +#include "board.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SPL_BUILD +static const struct ddr_data ddr2_data = { + .datardsratio0 = ((MT47H128M16RT25E_RD_DQS<<30) | + (MT47H128M16RT25E_RD_DQS<<20) | + (MT47H128M16RT25E_RD_DQS<<10) | + (MT47H128M16RT25E_RD_DQS<<0)), + .datawdsratio0 = ((MT47H128M16RT25E_WR_DQS<<30) | + (MT47H128M16RT25E_WR_DQS<<20) | + (MT47H128M16RT25E_WR_DQS<<10) | + (MT47H128M16RT25E_WR_DQS<<0)), + .datawiratio0 = ((MT47H128M16RT25E_PHY_WRLVL<<30) | + (MT47H128M16RT25E_PHY_WRLVL<<20) | + (MT47H128M16RT25E_PHY_WRLVL<<10) | + (MT47H128M16RT25E_PHY_WRLVL<<0)), + .datagiratio0 = ((MT47H128M16RT25E_PHY_GATELVL<<30) | + (MT47H128M16RT25E_PHY_GATELVL<<20) | + (MT47H128M16RT25E_PHY_GATELVL<<10) | + (MT47H128M16RT25E_PHY_GATELVL<<0)), + .datafwsratio0 = ((MT47H128M16RT25E_PHY_FIFO_WE<<30) | + (MT47H128M16RT25E_PHY_FIFO_WE<<20) | + (MT47H128M16RT25E_PHY_FIFO_WE<<10) | + (MT47H128M16RT25E_PHY_FIFO_WE<<0)), + .datawrsratio0 = ((MT47H128M16RT25E_PHY_WR_DATA<<30) | + (MT47H128M16RT25E_PHY_WR_DATA<<20) | + (MT47H128M16RT25E_PHY_WR_DATA<<10) | + (MT47H128M16RT25E_PHY_WR_DATA<<0)), +}; + +static const struct cmd_control ddr2_cmd_ctrl_data = { + .cmd0csratio = MT47H128M16RT25E_RATIO, + .cmd0iclkout = MT47H128M16RT25E_INVERT_CLKOUT, + + .cmd1csratio = MT47H128M16RT25E_RATIO, + .cmd1iclkout = MT47H128M16RT25E_INVERT_CLKOUT, + + .cmd2csratio = MT47H128M16RT25E_RATIO, + .cmd2iclkout = MT47H128M16RT25E_INVERT_CLKOUT, +}; + +static const struct emif_regs ddr2_emif_reg_data = { + .sdram_config = MT47H128M16RT25E_EMIF_SDCFG, + .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF, + .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1, + .sdram_tim2 = MT47H128M16RT25E_EMIF_TIM2, + .sdram_tim3 = MT47H128M16RT25E_EMIF_TIM3, + .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY, +}; + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; +} +#endif + +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + +void set_uart_mux_conf(void) +{ + enable_uart0_pin_mux(); +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +const struct ctrl_ioregs ioregs = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; + +void sdram_init(void) +{ + config_ddr(266, &ioregs, &ddr2_data, + &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); +} +#endif + +int board_init(void) +{ +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gpmc_init(); + + return 0; +} + +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + +static void cpsw_control(int enabled) +{ + /* VTP can be added here */ + + return; +} + +static struct cpsw_slave_data cpsw_slaves[] = { + { + .slave_reg_ofs = 0x208, + .sliver_reg_ofs = 0xd80, + .phy_addr = 0, + .phy_if = PHY_INTERFACE_MODE_RGMII, + }, +}; + +static struct cpsw_platform_data cpsw_data = { + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, + .mdio_div = 0xff, + .channels = 8, + .cpdma_reg_ofs = 0x800, + .slaves = 1, + .slave_data = cpsw_slaves, + .ale_reg_ofs = 0xd00, + .ale_entries = 1024, + .host_port_reg_ofs = 0x108, + .hw_stats_reg_ofs = 0x900, + .bd_ram_ofs = 0x2000, + .mac_control = (1 << 5), + .control = cpsw_control, + .host_port_num = 0, + .version = CPSW_CTRL_VERSION_2, +}; + +int board_eth_init(bd_t *bis) +{ + int rv, n = 0; + uint8_t mac_addr[6]; + uint32_t mac_hi, mac_lo; + const char *devname; + + if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + if (is_valid_ether_addr(mac_addr)) + eth_setenv_enetaddr("ethaddr", mac_addr); + } + + writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); + + rv = cpsw_register(&cpsw_data); + if (rv < 0) + printf("Error %d registering CPSW switch\n", rv); + else + n += rv; + + /* + * + * CPSW RGMII Internal Delay Mode is not supported in all PVT + * operating points. So we must set the TX clock delay feature + * in the KSZ9021 PHY. Since we only support a single ethernet + * device in U-Boot, we only do this for the current instance. + */ + devname = miiphy_get_current_dev(); + /* max rx/tx clock delay, min rx/tx control delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8104); + miiphy_write(devname, 0x0, 0xc, 0xa0a0); + + /* min rx data delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8105); + miiphy_write(devname, 0x0, 0x0c, 0x0000); + + /* min tx data delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8106); + miiphy_write(devname, 0x0, 0x0c, 0x0000); + + return n; +} +#endif diff --git a/board/gumstix/pepper/board.h b/board/gumstix/pepper/board.h new file mode 100644 index 0000000..0512735 --- /dev/null +++ b/board/gumstix/pepper/board.h @@ -0,0 +1,19 @@ +/* + * Gumstix Pepper and AM335x-based boards information header + * + * Copyright (C) 2014, Gumstix, Inc. - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * We must be able to enable uart0, for initial output. We then have a + * main pinmux function that can be overridden to enable all other pinmux that + * is required on the board. + */ +void enable_uart0_pin_mux(void); +void enable_board_pin_mux(void); +#endif diff --git a/board/gumstix/pepper/mux.c b/board/gumstix/pepper/mux.c new file mode 100644 index 0000000..50b1266 --- /dev/null +++ b/board/gumstix/pepper/mux.c @@ -0,0 +1,78 @@ +/* + * Muxing for Gumstix Pepper and AM335x-based boards + * + * Copyright (C) 2014, Gumstix, Incorporated - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <i2c.h> +#include "board.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; + +static struct module_pin_mux i2c0_pin_mux[] = { + /* I2C_DATA */ + {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, + /* I2C_SCLK */ + {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, + {-1}, +}; + +static struct module_pin_mux rgmii1_pin_mux[] = { + {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */ + {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */ + {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */ + {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */ + {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */ + {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */ + {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */ + {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */ + {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */ + {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */ + {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */ + {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {OFFSET(rmii1_refclk), MODE(7) | RXACTIVE}, /* ETH_INT */ + {OFFSET(mii1_col), MODE(7) | PULLUP_EN}, /* PHY_NRESET */ + {OFFSET(xdma_event_intr1), MODE(3)}, + {-1}, +}; + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +/* + * Do board-specific muxes. + */ +void enable_board_pin_mux(void) +{ + /* I2C0 */ + configure_module_pin_mux(i2c0_pin_mux); + /* SD Card */ + configure_module_pin_mux(mmc0_pin_mux); + /* Ethernet pinmux. */ + configure_module_pin_mux(rgmii1_pin_mux); +} diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c index f97aafa..5d37718 100644 --- a/board/nvidia/jetson-tk1/jetson-tk1.c +++ b/board/nvidia/jetson-tk1/jetson-tk1.c @@ -6,6 +6,7 @@ */ #include <common.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include "pinmux-config-jetson-tk1.h" @@ -15,6 +16,11 @@ */ void pinmux_init(void) { + pinmux_set_tristate_input_clamping(); + + gpio_config_table(jetson_tk1_gpio_inits, + ARRAY_SIZE(jetson_tk1_gpio_inits)); + pinmux_config_pingrp_table(jetson_tk1_pingrps, ARRAY_SIZE(jetson_tk1_pingrps)); diff --git a/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h b/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h index 1adcae4..d338818 100644 --- a/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h +++ b/board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h @@ -7,6 +7,98 @@ #ifndef _PINMUX_CONFIG_JETSON_TK1_H_ #define _PINMUX_CONFIG_JETSON_TK1_H_ +#define GPIO_INIT(_gpio, _init) \ + { \ + .gpio = GPIO_P##_gpio, \ + .init = TEGRA_GPIO_INIT_##_init, \ + } + +static const struct tegra_gpio_config jetson_tk1_gpio_inits[] = { + /* gpio, init_val */ + GPIO_INIT(C7, IN), + GPIO_INIT(G0, OUT0), + GPIO_INIT(G1, OUT0), + GPIO_INIT(G2, IN), + GPIO_INIT(G3, IN), + GPIO_INIT(H2, OUT0), + GPIO_INIT(H3, OUT0), + GPIO_INIT(H4, IN), + GPIO_INIT(H5, OUT0), + GPIO_INIT(H6, IN), + GPIO_INIT(H7, OUT0), + GPIO_INIT(I0, OUT0), + GPIO_INIT(I2, OUT0), + GPIO_INIT(I4, OUT0), + GPIO_INIT(I5, IN), + GPIO_INIT(I6, IN), + GPIO_INIT(J0, IN), + GPIO_INIT(J2, IN), + GPIO_INIT(K1, OUT0), + GPIO_INIT(K2, IN), + GPIO_INIT(K3, IN), + GPIO_INIT(K4, OUT0), + GPIO_INIT(K5, OUT0), + GPIO_INIT(K6, OUT0), + GPIO_INIT(N7, IN), + GPIO_INIT(O0, IN), + GPIO_INIT(O1, IN), + GPIO_INIT(O2, IN), + GPIO_INIT(O3, IN), + GPIO_INIT(O4, IN), + GPIO_INIT(O5, IN), + GPIO_INIT(O6, OUT0), + GPIO_INIT(O7, IN), + GPIO_INIT(P0, OUT0), + GPIO_INIT(P1, OUT0), + GPIO_INIT(P2, OUT0), + GPIO_INIT(Q0, IN), + GPIO_INIT(Q1, IN), + GPIO_INIT(Q2, IN), + GPIO_INIT(Q5, IN), + GPIO_INIT(Q6, IN), + GPIO_INIT(Q7, IN), + GPIO_INIT(R0, OUT0), + GPIO_INIT(R1, OUT0), + GPIO_INIT(R2, OUT0), + GPIO_INIT(R4, IN), + GPIO_INIT(R5, OUT0), + GPIO_INIT(R7, IN), + GPIO_INIT(S0, IN), + GPIO_INIT(S3, OUT0), + GPIO_INIT(S4, OUT0), + GPIO_INIT(S5, IN), + GPIO_INIT(S6, OUT0), + GPIO_INIT(T0, OUT0), + GPIO_INIT(T1, OUT0), + GPIO_INIT(U0, OUT0), + GPIO_INIT(U1, IN), + GPIO_INIT(U2, IN), + GPIO_INIT(U3, OUT0), + GPIO_INIT(U4, OUT0), + GPIO_INIT(U5, IN), + GPIO_INIT(U6, IN), + GPIO_INIT(V0, IN), + GPIO_INIT(V1, IN), + GPIO_INIT(W2, IN), + GPIO_INIT(W3, IN), + GPIO_INIT(X1, OUT0), + GPIO_INIT(X3, IN), + GPIO_INIT(X4, OUT0), + GPIO_INIT(X5, IN), + GPIO_INIT(X6, IN), + GPIO_INIT(X7, OUT0), + GPIO_INIT(BB3, OUT0), + GPIO_INIT(BB5, OUT0), + GPIO_INIT(BB6, OUT0), + GPIO_INIT(BB7, OUT0), + GPIO_INIT(CC1, IN), + GPIO_INIT(CC2, IN), + GPIO_INIT(CC5, OUT0), + GPIO_INIT(EE1, OUT0), + GPIO_INIT(FF1, OUT0), + GPIO_INIT(FF2, IN), +}; + #define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \ { \ .pingrp = PMUX_PINGRP_##_pingrp, \ @@ -41,43 +133,43 @@ static const struct pmux_pingrp_config jetson_tk1_pingrps[] = { PINCFG(UART2_RXD_PC3, IRDA, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), - PINCFG(PC7, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PG0, RSVD1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PG1, RSVD1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PG2, RSVD1, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PG3, RSVD1, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PC7, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PG0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG2, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PG3, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(PG4, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PG7, SPI4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(PH0, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PH2, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PH3, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PH4, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PH5, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PH6, GMI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PH7, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PI0, RSVD1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH4, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PH5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PI1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PI2, RSVD4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PI4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PI5, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PI6, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PI4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PI6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(PI7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PJ0, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PJ2, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PJ0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PJ2, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(UART2_CTS_N_PJ5, UARTB, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PJ7, UARTD, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PK0, SOC, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PK1, RSVD4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PK2, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PK3, GMI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PK4, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(SPDIF_OUT_PK5, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(SPDIF_IN_PK6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK2, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PK3, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PK4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SPDIF_OUT_PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SPDIF_IN_PK6, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PK7, UARTD, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(DAP1_FS_PN0, I2S0, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(DAP1_DIN_PN1, I2S0, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), @@ -85,79 +177,79 @@ static const struct pmux_pingrp_config jetson_tk1_pingrps[] = { PINCFG(DAP1_SCLK_PN3, I2S0, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(USB_VBUS_EN0_PN4, USB, UP, NORMAL, INPUT, ENABLE, DEFAULT), PINCFG(USB_VBUS_EN1_PN5, USB, UP, NORMAL, INPUT, ENABLE, DEFAULT), - PINCFG(HDMI_INT_PN7, RSVD1, DOWN, NORMAL, INPUT, DEFAULT, NORMAL), - PINCFG(ULPI_DATA7_PO0, ULPI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(ULPI_DATA0_PO1, ULPI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(ULPI_DATA1_PO2, ULPI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(ULPI_DATA2_PO3, ULPI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(ULPI_DATA3_PO4, ULPI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(ULPI_DATA4_PO5, ULPI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(ULPI_DATA6_PO7, ULPI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(DAP3_DIN_PP1, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(DAP3_DOUT_PP2, RSVD4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(HDMI_INT_PN7, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, NORMAL), + PINCFG(ULPI_DATA7_PO0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA0_PO1, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA1_PO2, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA2_PO3, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA3_PO4, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA4_PO5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA5_PO6, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA6_PO7, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_FS_PP0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_DIN_PP1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_DOUT_PP2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(DAP3_SCLK_PP3, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), PINCFG(DAP4_FS_PP4, I2S3, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(DAP4_DIN_PP5, I2S3, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(DAP4_DOUT_PP6, I2S3, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(DAP4_SCLK_PP7, I2S3, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_COL0_PQ0, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_COL1_PQ1, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_COL2_PQ2, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL0_PQ0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL1_PQ1, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL2_PQ2, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(KB_COL3_PQ3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), PINCFG(KB_COL4_PQ4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_COL5_PQ5, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_COL6_PQ6, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_COL7_PQ7, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW0_PR0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW1_PR1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW2_PR2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL5_PQ5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL6_PQ6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL7_PQ7, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW0_PR0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW1_PR1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW2_PR2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(KB_ROW3_PR3, SYS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW4_PR4, RSVD3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW5_PR5, RSVD3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW4_PR4, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW5_PR5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(KB_ROW6_PR6, DISPLAYA_ALT, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW7_PR7, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW8_PS0, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW7_PR7, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW8_PS0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(KB_ROW9_PS1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(KB_ROW10_PS2, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW11_PS3, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW12_PS4, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW13_PS5, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW14_PS6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW11_PS3, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW12_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW13_PS5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW14_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(KB_ROW15_PS7, SOC, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW16_PT0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(KB_ROW17_PT1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW16_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW17_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), PINCFG(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PU0, RSVD4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PU1, RSVD1, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PU2, RSVD1, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PU3, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PU4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PU5, GMI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PU6, RSVD3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PV0, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PV1, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU1, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU2, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU3, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PV0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PV1, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(SDMMC3_CD_N_PV2, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(SDMMC1_WP_N_PV3, SDMMC1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), PINCFG(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL), PINCFG(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL), - PINCFG(GPIO_W2_AUD_PW2, RSVD2, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(GPIO_W3_AUD_PW3, SPI6, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_W2_AUD_PW2, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_W3_AUD_PW3, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(CLK2_OUT_PW5, EXTPERIPH2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(UART3_RXD_PW7, UARTC, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(GPIO_X1_AUD_PX1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X1_AUD_PX1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(GPIO_X3_AUD_PX3, RSVD4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(GPIO_X4_AUD_PX4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(GPIO_X5_AUD_PX5, RSVD4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(GPIO_X6_AUD_PX6, GMI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(GPIO_X7_AUD_PX7, RSVD1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X3_AUD_PX3, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X4_AUD_PX4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X5_AUD_PX5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X6_AUD_PX6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X7_AUD_PX7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(ULPI_DIR_PY1, SPI1, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), @@ -181,25 +273,25 @@ static const struct pmux_pingrp_config jetson_tk1_pingrps[] = { PINCFG(PBB0, VIMCLK2_ALT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), - PINCFG(PBB3, VGP3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PBB4, VGP4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PBB5, RSVD3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PBB6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PBB7, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB6, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(PCC1, RSVD2, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(PCC2, RSVD2, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PCC1, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PCC2, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(CLK2_REQ_PCC5, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CLK2_REQ_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), - PINCFG(CLK3_REQ_PEE1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CLK3_REQ_PEE1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(DAP_MCLK1_REQ_PEE2, SATA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), PINCFG(DP_HPD_PFF0, DP, UP, NORMAL, INPUT, DEFAULT, DEFAULT), - PINCFG(USB_VBUS_EN2_PFF1, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), - PINCFG(PFF2, RSVD2, UP, NORMAL, INPUT, DISABLE, DEFAULT), + PINCFG(USB_VBUS_EN2_PFF1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), + PINCFG(PFF2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT), PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(CPU_PWR_REQ, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DEFAULT, DEFAULT), diff --git a/board/nvidia/venice2/pinmux-config-venice2.h b/board/nvidia/venice2/pinmux-config-venice2.h index 2f79ec7..bf8e3fd 100644 --- a/board/nvidia/venice2/pinmux-config-venice2.h +++ b/board/nvidia/venice2/pinmux-config-venice2.h @@ -1,76 +1,286 @@ /* - * (C) Copyright 2013 - * NVIDIA Corporation <www.nvidia.com> + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _PINMUX_CONFIG_VENICE2_H_ #define _PINMUX_CONFIG_VENICE2_H_ -#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \ - { \ - .pingrp = PMUX_PINGRP_##_pingrp, \ - .func = PMUX_FUNC_##_mux, \ - .pull = PMUX_PULL_##_pull, \ - .tristate = PMUX_TRI_##_tri, \ - .io = PMUX_PIN_##_io, \ - .lock = PMUX_PIN_LOCK_DEFAULT, \ - .od = PMUX_PIN_OD_DEFAULT, \ - .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ +#define GPIO_INIT(_gpio, _init) \ + { \ + .gpio = GPIO_P##_gpio, \ + .init = TEGRA_GPIO_INIT_##_init, \ } -#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ - { \ - .pingrp = PMUX_PINGRP_##_pingrp, \ - .func = PMUX_FUNC_##_mux, \ - .pull = PMUX_PULL_##_pull, \ - .tristate = PMUX_TRI_##_tri, \ - .io = PMUX_PIN_##_io, \ - .lock = PMUX_PIN_LOCK_##_lock, \ - .od = PMUX_PIN_OD_##_od, \ - .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ - } +static const struct tegra_gpio_config venice2_gpio_inits[] = { + /* gpio, init_val */ + GPIO_INIT(A0, IN), + GPIO_INIT(C7, IN), + GPIO_INIT(G0, IN), + GPIO_INIT(G1, IN), + GPIO_INIT(G2, IN), + GPIO_INIT(G3, IN), + GPIO_INIT(H2, IN), + GPIO_INIT(H4, IN), + GPIO_INIT(H5, OUT0), + GPIO_INIT(H6, IN), + GPIO_INIT(H7, OUT1), + GPIO_INIT(I0, IN), + GPIO_INIT(I1, IN), + GPIO_INIT(I2, OUT0), + GPIO_INIT(I4, OUT0), + GPIO_INIT(I5, OUT1), + GPIO_INIT(I6, IN), + GPIO_INIT(J0, IN), + GPIO_INIT(J7, IN), + GPIO_INIT(K0, IN), + GPIO_INIT(K1, OUT0), + GPIO_INIT(K2, IN), + GPIO_INIT(K3, IN), + GPIO_INIT(K4, OUT0), + GPIO_INIT(K6, OUT0), + GPIO_INIT(K7, IN), + GPIO_INIT(N7, IN), + GPIO_INIT(O2, IN), + GPIO_INIT(O5, IN), + GPIO_INIT(O6, OUT0), + GPIO_INIT(O7, IN), + GPIO_INIT(P2, OUT0), + GPIO_INIT(Q0, IN), + GPIO_INIT(Q2, IN), + GPIO_INIT(Q3, IN), + GPIO_INIT(Q6, IN), + GPIO_INIT(Q7, IN), + GPIO_INIT(R0, OUT0), + GPIO_INIT(R1, IN), + GPIO_INIT(R4, IN), + GPIO_INIT(S0, IN), + GPIO_INIT(S3, OUT0), + GPIO_INIT(S4, OUT0), + GPIO_INIT(S7, IN), + GPIO_INIT(T1, IN), + GPIO_INIT(U4, IN), + GPIO_INIT(U5, IN), + GPIO_INIT(U6, IN), + GPIO_INIT(V0, IN), + GPIO_INIT(V1, IN), + GPIO_INIT(W3, IN), + GPIO_INIT(X1, IN), + GPIO_INIT(X3, IN), + GPIO_INIT(X4, IN), + GPIO_INIT(X7, OUT0), + GPIO_INIT(CC5, OUT0), +}; -#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \ +#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \ { \ .pingrp = PMUX_PINGRP_##_pingrp, \ .func = PMUX_FUNC_##_mux, \ .pull = PMUX_PULL_##_pull, \ .tristate = PMUX_TRI_##_tri, \ .io = PMUX_PIN_##_io, \ - .lock = PMUX_PIN_LOCK_##_lock, \ + .od = PMUX_PIN_OD_##_od, \ .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \ + .lock = PMUX_PIN_LOCK_DEFAULT, \ .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ } -#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \ - { \ - .pingrp = PMUX_PINGRP_##_pingrp, \ - .func = PMUX_FUNC_##_mux, \ - .pull = PMUX_PULL_##_pull, \ - .tristate = PMUX_TRI_##_tri, \ - .io = PMUX_PIN_##_io, \ - .lock = PMUX_PIN_LOCK_##_lock, \ - .od = PMUX_PIN_OD_DEFAULT, \ - .ioreset = PMUX_PIN_IO_RESET_##_ioreset \ - } - -#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \ - { \ - .pingrp = PMUX_PINGRP_##_pingrp, \ - .func = PMUX_FUNC_##_mux, \ - .pull = PMUX_PULL_##_pull, \ - .tristate = PMUX_TRI_##_tri, \ - .io = PMUX_PIN_##_io, \ - .lock = PMUX_PIN_LOCK_##_lock, \ - .od = PMUX_PIN_OD_##_od, \ - .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ - } - -#define USB_PINMUX CEC_PINMUX +static const struct pmux_pingrp_config venice2_pingrps[] = { + /* pingrp, mux, pull, tri, e_input, od, rcv_sel */ + PINCFG(CLK_32K_OUT_PA0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PB0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PB1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART2_RXD_PC3, IRDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(PC7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PG0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PG1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PG2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PG3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PG4, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PG7, SPI4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PH3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PH5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PH6, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PI1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PI6, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PI7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PJ0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PJ2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PJ7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PK3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PK4, DEFAULT, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SPDIF_OUT_PK5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SPDIF_IN_PK6, DEFAULT, DOWN, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PK7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_DIN_PN1, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(HDMI_INT_PN7, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, NORMAL), + PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA1_PO2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA2_PO3, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA3_PO4, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA4_PO5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA5_PO6, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DATA6_PO7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_FS_PP0, I2S2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_DIN_PP1, I2S2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_DOUT_PP2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP3_SCLK_PP3, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL0_PQ0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL1_PQ1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL2_PQ2, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL3_PQ3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL4_PQ4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL5_PQ5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL6_PQ6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_COL7_PQ7, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW0_PR0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW1_PR1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW2_PR2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW4_PR4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW5_PR5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW7_PR7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW8_PS0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW9_PS1, UARTA, DOWN, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW10_PS2, UARTA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW11_PS3, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW12_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW13_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW14_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW15_PS7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(KB_ROW17_PT1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(SDMMC4_CMD_PT7, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU1, UARTA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU2, UARTA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU3, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PU4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PU6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PV0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PV1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CD_N_PV2, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_WP_N_PV3, SDMMC1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL), + PINCFG(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL), + PINCFG(GPIO_W2_AUD_PW2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_W3_AUD_PW3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CLK2_OUT_PW5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X1_AUD_PX1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X3_AUD_PX3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X4_AUD_PX4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X5_AUD_PX5, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X6_AUD_PX6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(GPIO_X7_AUD_PX7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_DIR_PY1, SPI1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(PBB0, VGP6, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(PBB3, VGP3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB4, VGP4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PBB7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CAM_MCLK_PCC0, VI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PCC1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PCC2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(CLK2_REQ_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L0_RST_N_PDD1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L0_CLKREQ_N_PDD2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PEX_WAKE_N_PDD3, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L1_RST_N_PDD5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PEX_L1_CLKREQ_N_PDD6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CLK3_REQ_PEE1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(DAP_MCLK1_REQ_PEE2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), + PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), + PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(DP_HPD_PFF0, DP, UP, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(USB_VBUS_EN2_PFF1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(PFF2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), + PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(PWR_INT_N, PMI, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), + PINCFG(OWR, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, NORMAL), + PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), + PINCFG(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), +}; -#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ +#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ { \ .drvgrp = PMUX_DRVGRP_##_drvgrp, \ .slwf = _slwf, \ @@ -82,258 +292,7 @@ .hsm = PMUX_HSM_##_hsm, \ } -static struct pmux_pingrp_config tegra124_pinmux_common[] = { - /* EXTPERIPH1 pinmux */ - DEFAULT_PINMUX(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT), - - /* I2S0 pinmux */ - DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT), - - /* I2S1 pinmux */ - DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT), - - /* I2S3 pinmux */ - DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT), - - /* CLDVFS pinmux */ - DEFAULT_PINMUX(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT), - - /* ULPI pinmux */ - DEFAULT_PINMUX(ULPI_DATA0_PO1, ULPI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA1_PO2, ULPI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA2_PO3, ULPI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA3_PO4, ULPI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA4_PO5, ULPI, UP, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA5_PO6, ULPI, UP, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DATA6_PO7, ULPI, NORMAL, NORMAL, INPUT), - - /* EC KBC/SPI */ - DEFAULT_PINMUX(ULPI_CLK_PY0, SPI1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_DIR_PY1, SPI1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, INPUT), - - /* I2C3 (TPM) pinmux */ - I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - - /* I2C2 pinmux */ - I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - - /* UARTD pinmux (UART4 on Servo board, unused) */ - DEFAULT_PINMUX(PJ7, UARTD, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(PB0, UARTD, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PB1, UARTD, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PK7, UARTD, NORMAL, NORMAL, OUTPUT), - - /* SPI4 (Winbond 'boot ROM') */ - DEFAULT_PINMUX(PG5, SPI4, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(PG6, SPI4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(PG7, SPI4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(PI3, SPI4, NORMAL, NORMAL, INPUT), - - /* Touch IRQ */ - DEFAULT_PINMUX(GPIO_W3_AUD_PW3, RSVD1, NORMAL, NORMAL, INPUT), - - /* PWM1 pinmux */ - DEFAULT_PINMUX(PH1, PWM1, NORMAL, NORMAL, OUTPUT), - - /* SDMMC1 pinmux */ - DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT), - - /* SDMMC3 pinmux */ - DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, UP, TRISTATE, INPUT), - DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, DOWN, NORMAL, INPUT), - - /* SDMMC4 pinmux */ - DEFAULT_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT), - - /* BLINK pinmux */ - DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT), - - /* KBC pinmux */ - DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW0_PR0, KBC, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT), - - /* Misc */ - DEFAULT_PINMUX(PV0, RSVD1, NORMAL, TRISTATE, OUTPUT), - DEFAULT_PINMUX(KB_ROW7_PR7, RSVD1, UP, NORMAL, INPUT), - - /* UARTA pinmux (BR_UART_TXD/RXD on Servo board) */ - DEFAULT_PINMUX(KB_ROW9_PS1, UARTA, UP, NORMAL, OUTPUT), - DEFAULT_PINMUX(KB_ROW10_PS2, UARTA, UP, TRISTATE, INPUT), - - /* I2CPWR pinmux (I2C5) */ - I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - - /* RTCK pinmux */ - DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, INPUT), - - /* CLK pinmux */ - DEFAULT_PINMUX(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT), - - /* PWRON pinmux */ - DEFAULT_PINMUX(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT), - - /* CPU pinmux */ - DEFAULT_PINMUX(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT), - - /* PMI pinmux */ - DEFAULT_PINMUX(PWR_INT_N, PMI, NORMAL, TRISTATE, INPUT), - - /* RESET_OUT_N pinmux */ - DEFAULT_PINMUX(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT), - - /* EXTPERIPH3 pinmux */ - DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), - - /* I2C1 pinmux */ - I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - - /* UARTB, GPS */ - DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(UART2_RXD_PC3, IRDA, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT), - - /* UARTC (WIFI/BT) */ - DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT), - - /* CEC pinmux */ - CEC_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE), - - /* I2C4 (HDMI_DDC) pinmux */ - DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH), - DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH), - - /* USB pinmux */ - USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - USB_PINMUX(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE), - - /* Unused, marked SNN_ on schematic, TRISTATE 'em */ - DEFAULT_PINMUX(PBB0, RSVD3, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PBB3, RSVD3, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PBB4, RSVD3, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PBB5, RSVD2, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PBB6, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PBB7, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PCC1, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PCC2, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PH3, GMI, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PI7, GMI, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PJ2, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GPIO_X5_AUD_PX5, RSVD3, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GPIO_X6_AUD_PX6, GMI, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(GPIO_W2_AUD_PW2, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(PFF2, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(USB_VBUS_EN2_PFF1, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_COL5_PQ5, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_ROW2_PR2, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_ROW3_PR3, KBC, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_ROW5_PR5, RSVD2, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_ROW13_PS5, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_ROW14_PS6, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(KB_ROW16_PT0, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(OWR, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(ULPI_DATA7_PO0, ULPI, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(DAP3_DIN_PP1, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(DAP3_FS_PP0, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(DAP3_SCLK_PP3, RSVD2, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(CLK2_OUT_PW5, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(SDMMC1_WP_N_PV3, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(CAM_MCLK_PCC0, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(CLK3_REQ_PEE1, RSVD1, NORMAL, TRISTATE, INPUT), - DEFAULT_PINMUX(SPDIF_OUT_PK5, RSVD1, NORMAL, TRISTATE, INPUT), -}; - -static struct pmux_pingrp_config unused_pins_lowpower[] = { - DEFAULT_PINMUX(DAP_MCLK1_REQ_PEE2, RSVD3, DOWN, TRISTATE, OUTPUT), -}; - -/* Initially setting all used GPIO's to non-TRISTATE */ -static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = { - DEFAULT_PINMUX(GPIO_X4_AUD_PX4, RSVD1, DOWN, NORMAL, OUTPUT), - DEFAULT_PINMUX(GPIO_X7_AUD_PX7, RSVD1, DOWN, NORMAL, OUTPUT), - DEFAULT_PINMUX(GPIO_W2_AUD_PW2, RSVD1, UP, NORMAL, INPUT), - DEFAULT_PINMUX(GPIO_X3_AUD_PX3, RSVD3, UP, NORMAL, INPUT), - - /* EN_VDD_BL */ - DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, DOWN, NORMAL, OUTPUT), - - /* MODEM */ - DEFAULT_PINMUX(PV0, RSVD3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, INPUT), - - /* BOOT_SEL0-3 */ - DEFAULT_PINMUX(PG0, GMI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(PG1, GMI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(PG2, GMI, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(PG3, GMI, NORMAL, NORMAL, INPUT), - - DEFAULT_PINMUX(CLK2_REQ_PCC5, RSVD3, NORMAL, NORMAL, OUTPUT), - - DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, OUTPUT), - DEFAULT_PINMUX(KB_COL4_PQ4, SDMMC3, UP, NORMAL, INPUT), - DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, OUTPUT), - DEFAULT_PINMUX(KB_COL7_PQ7, KBC, UP, NORMAL, OUTPUT), - DEFAULT_PINMUX(KB_ROW4_PR4, KBC, DOWN, NORMAL, INPUT), - DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT), - - DEFAULT_PINMUX(PU4, RSVD3, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(PU5, RSVD3, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(PU6, RSVD3, NORMAL, NORMAL, INPUT), - - DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, DOWN, NORMAL, INPUT), - DEFAULT_PINMUX(SPDIF_IN_PK6, RSVD2, NORMAL, NORMAL, INPUT), - DEFAULT_PINMUX(SDMMC3_CD_N_PV2, SDMMC3, UP, NORMAL, INPUT), - - /* TS_SHDN_L */ - DEFAULT_PINMUX(PK1, GMI, NORMAL, NORMAL, OUTPUT), +static const struct pmux_drvgrp_config venice2_drvgrps[] = { }; -static struct pmux_drvgrp_config venice2_padctrl[] = { - /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ - DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, - SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE), -}; #endif /* PINMUX_CONFIG_VENICE2_H */ diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c index 15082c4..c56ef12 100644 --- a/board/nvidia/venice2/venice2.c +++ b/board/nvidia/venice2/venice2.c @@ -6,12 +6,9 @@ */ #include <common.h> -#include <asm-generic/gpio.h> #include <asm/arch/gpio.h> -#include <asm/arch/gp_padctrl.h> #include <asm/arch/pinmux.h> #include "pinmux-config-venice2.h" -#include <i2c.h> /* * Routine: pinmux_init @@ -19,16 +16,14 @@ */ void pinmux_init(void) { - pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate, - ARRAY_SIZE(tegra124_pinmux_set_nontristate)); + pinmux_set_tristate_input_clamping(); - pinmux_config_pingrp_table(tegra124_pinmux_common, - ARRAY_SIZE(tegra124_pinmux_common)); + gpio_config_table(venice2_gpio_inits, + ARRAY_SIZE(venice2_gpio_inits)); - pinmux_config_pingrp_table(unused_pins_lowpower, - ARRAY_SIZE(unused_pins_lowpower)); + pinmux_config_pingrp_table(venice2_pingrps, + ARRAY_SIZE(venice2_pingrps)); - /* Initialize any non-default pad configs (APB_MISC_GP regs) */ - pinmux_config_drvgrp_table(venice2_padctrl, - ARRAY_SIZE(venice2_padctrl)); + pinmux_config_drvgrp_table(venice2_drvgrps, + ARRAY_SIZE(venice2_drvgrps)); } diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c index 9efc355..ef88314 100644 --- a/board/samsung/arndale/arndale.c +++ b/board/samsung/arndale/arndale.c @@ -16,17 +16,14 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_USB_EHCI_EXYNOS int board_usb_init(int index, enum usb_init_type init) { - struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *) - samsung_get_base_gpio_part1(); - /* Configure gpios for usb 3503 hub: * disconnect, toggle reset and connect */ - s5p_gpio_direction_output(&gpio->d1, 7, 0); - s5p_gpio_direction_output(&gpio->x3, 5, 0); + gpio_direction_output(EXYNOS5_GPIO_D17, 0); + gpio_direction_output(EXYNOS5_GPIO_X35, 0); - s5p_gpio_direction_output(&gpio->x3, 5, 1); - s5p_gpio_direction_output(&gpio->d1, 7, 1); + gpio_direction_output(EXYNOS5_GPIO_X35, 1); + gpio_direction_output(EXYNOS5_GPIO_D17, 1); return 0; } diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c index 3ff4289..03106fd 100644 --- a/board/samsung/common/misc.c +++ b/board/samsung/common/misc.c @@ -116,12 +116,14 @@ static int check_keys(void) * 4 BOOT_MODE_EXIT */ static char * -mode_name[BOOT_MODE_EXIT + 1] = { - "DEVICE", - "THOR", - "UMS", - "DFU", - "EXIT" +mode_name[BOOT_MODE_EXIT + 1][2] = { + {"DEVICE", ""}, + {"THOR", "thor"}, + {"UMS", "ums"}, + {"DFU", "dfu"}, + {"GPT", "gpt"}, + {"ENV", "env"}, + {"EXIT", ""}, }; static char * @@ -130,18 +132,20 @@ mode_info[BOOT_MODE_EXIT + 1] = { "downloader", "mass storage", "firmware update", + "restore", + "default", "and run normal boot" }; -#define MODE_CMD_ARGC 4 - static char * -mode_cmd[BOOT_MODE_EXIT + 1][MODE_CMD_ARGC] = { - {"", "", "", ""}, - {"thor", "0", "mmc", "0"}, - {"ums", "0", "mmc", "0"}, - {"dfu", "0", "mmc", "0"}, - {"", "", "", ""}, +mode_cmd[BOOT_MODE_EXIT + 1] = { + "", + "thor 0 mmc 0", + "ums 0 mmc 0", + "dfu 0 mmc 0", + "gpt write mmc 0 $partitions", + "env default -a; saveenv", + "", }; static void display_board_info(void) @@ -182,11 +186,10 @@ static void display_board_info(void) static int mode_leave_menu(int mode) { char *exit_option; - char *exit_boot = "boot"; + char *exit_reset = "reset"; char *exit_back = "back"; cmd_tbl_t *cmd; int cmd_result; - int cmd_repeatable; int leave; lcd_clear(); @@ -200,31 +203,29 @@ static int mode_leave_menu(int mode) leave = 0; break; default: - cmd = find_cmd(mode_cmd[mode][0]); + cmd = find_cmd(mode_name[mode][1]); if (cmd) { - printf("Enter: %s %s\n", mode_name[mode], + printf("Enter: %s %s\n", mode_name[mode][0], mode_info[mode]); - lcd_printf("\n\n\t%s %s\n", mode_name[mode], + lcd_printf("\n\n\t%s %s\n", mode_name[mode][0], mode_info[mode]); lcd_puts("\n\tDo not turn off device before finish!\n"); - cmd_result = cmd_process(0, MODE_CMD_ARGC, - *(mode_cmd + mode), - &cmd_repeatable, NULL); + cmd_result = run_command(mode_cmd[mode], 0); if (cmd_result == CMD_RET_SUCCESS) { printf("Command finished\n"); lcd_clear(); lcd_printf("\n\n\t%s finished\n", - mode_name[mode]); + mode_name[mode][0]); - exit_option = exit_boot; + exit_option = exit_reset; leave = 1; } else { printf("Command error\n"); lcd_clear(); lcd_printf("\n\n\t%s command error\n", - mode_name[mode]); + mode_name[mode][0]); exit_option = exit_back; leave = 0; @@ -260,11 +261,11 @@ static void display_download_menu(int mode) selection[mode] = "[=>]"; lcd_clear(); - lcd_printf("\n\t\tDownload Mode Menu\n"); + lcd_printf("\n\n\t\tDownload Mode Menu\n\n"); for (i = 0; i <= BOOT_MODE_EXIT; i++) lcd_printf("\t%s %s - %s\n\n", selection[i], - mode_name[i], + mode_name[i][0], mode_info[i]); } @@ -273,10 +274,38 @@ static void download_menu(void) int mode = 0; int last_mode = 0; int run; - int key; + int key = 0; + int timeout = 15; /* sec */ + int i; display_download_menu(mode); + lcd_puts("\n"); + + /* Start count if no key is pressed */ + while (check_keys()) + continue; + + while (timeout--) { + lcd_printf("\r\tNormal boot will start in: %2.d seconds.", + timeout); + + /* about 1000 ms in for loop */ + for (i = 0; i < 10; i++) { + mdelay(100); + key = check_keys(); + if (key) + break; + } + if (key) + break; + } + + if (!key) { + lcd_clear(); + return; + } + while (1) { run = 0; @@ -284,7 +313,7 @@ static void download_menu(void) display_download_menu(mode); last_mode = mode; - mdelay(100); + mdelay(200); key = check_keys(); switch (key) { @@ -305,7 +334,7 @@ static void download_menu(void) if (run) { if (mode_leave_menu(mode)) - break; + run_command("reset", 0); display_download_menu(mode); } @@ -314,45 +343,6 @@ static void download_menu(void) lcd_clear(); } -static void display_mode_info(void) -{ - lcd_position_cursor(4, 4); - lcd_printf("%s\n", U_BOOT_VERSION); - lcd_puts("\nDownload Mode Menu\n"); -#ifdef CONFIG_SYS_BOARD - lcd_printf("Board name: %s\n", CONFIG_SYS_BOARD); -#endif - lcd_printf("Press POWER KEY to display MENU options."); -} - -static int boot_menu(void) -{ - int key = 0; - int timeout = 10; - - display_mode_info(); - - while (timeout--) { - lcd_printf("\rNormal boot will start in: %d seconds.", timeout); - mdelay(1000); - - key = key_pressed(KEY_POWER); - if (key) - break; - } - - lcd_clear(); - - /* If PWR pressed - show download menu */ - if (key) { - printf("Power pressed - go to download menu\n"); - download_menu(); - printf("Download mode exit.\n"); - } - - return 0; -} - void check_boot_mode(void) { int pwr_key; @@ -365,7 +355,7 @@ void check_boot_mode(void) power_key_pressed(KEY_PWR_INTERRUPT_REG); if (key_pressed(KEY_VOLUMEUP)) - boot_menu(); + download_menu(); else if (key_pressed(KEY_VOLUMEDOWN)) mode_leave_menu(BOOT_MODE_THOR); } diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index 61b9ece..4cea63b 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -17,8 +17,6 @@ DECLARE_GLOBAL_DATA_PTR; -static struct s5pc110_gpio *s5pc110_gpio; - u32 get_board_rev(void) { return 0; @@ -27,8 +25,6 @@ u32 get_board_rev(void) int board_init(void) { /* Set Initial global variables */ - s5pc110_gpio = (struct s5pc110_gpio *)S5PC110_GPIO_BASE; - gd->bd->bi_arch_number = MACH_TYPE_GONI; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -82,7 +78,7 @@ int board_mmc_init(bd_t *bis) int i, ret, ret_sd = 0; /* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */ - s5p_gpio_direction_output(&s5pc110_gpio->j2, 7, 1); + gpio_direction_output(S5PC110_GPIO_J27, 1); /* * MMC0 GPIO @@ -91,15 +87,15 @@ int board_mmc_init(bd_t *bis) * GPG0[2] SD_0_CDn -> Not used * GPG0[3:6] SD_0_DATA[0:3] */ - for (i = 0; i < 7; i++) { - if (i == 2) + for (i = S5PC110_GPIO_G00; i < S5PC110_GPIO_G07; i++) { + if (i == S5PC110_GPIO_G02) continue; /* GPG0[0:6] special function 2 */ - s5p_gpio_cfg_pin(&s5pc110_gpio->g0, i, 0x2); + gpio_cfg_pin(i, 0x2); /* GPG0[0:6] pull disable */ - s5p_gpio_set_pull(&s5pc110_gpio->g0, i, GPIO_PULL_NONE); + gpio_set_pull(i, S5P_GPIO_PULL_NONE); /* GPG0[0:6] drv 4x */ - s5p_gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X); + gpio_set_drv(i, S5P_GPIO_DRV_4X); } ret = s5p_mmc_init(0, 4); @@ -110,20 +106,20 @@ int board_mmc_init(bd_t *bis) * SD card (T_FLASH) detect and init * T_FLASH_DETECT: EINT28: GPH3[4] input mode */ - s5p_gpio_cfg_pin(&s5pc110_gpio->h3, 4, GPIO_INPUT); - s5p_gpio_set_pull(&s5pc110_gpio->h3, 4, GPIO_PULL_UP); + gpio_cfg_pin(S5PC110_GPIO_H34, S5P_GPIO_INPUT); + gpio_set_pull(S5PC110_GPIO_H34, S5P_GPIO_PULL_UP); - if (!s5p_gpio_get_value(&s5pc110_gpio->h3, 4)) { - for (i = 0; i < 7; i++) { - if (i == 2) + if (!gpio_get_value(S5PC110_GPIO_H34)) { + for (i = S5PC110_GPIO_G20; i < S5PC110_GPIO_G27; i++) { + if (i == S5PC110_GPIO_G22) continue; /* GPG2[0:6] special function 2 */ - s5p_gpio_cfg_pin(&s5pc110_gpio->g2, i, 0x2); + gpio_cfg_pin(i, 0x2); /* GPG2[0:6] pull disable */ - s5p_gpio_set_pull(&s5pc110_gpio->g2, i, GPIO_PULL_NONE); + gpio_set_pull(i, S5P_GPIO_PULL_NONE); /* GPG2[0:6] drv 4x */ - s5p_gpio_set_drv(&s5pc110_gpio->g2, i, GPIO_DRV_4X); + gpio_set_drv(i, S5P_GPIO_DRV_4X); } ret_sd = s5p_mmc_init(2, 4); diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c index 379a45c..58821c4 100644 --- a/board/samsung/smdk5250/exynos5-dt.c +++ b/board/samsung/smdk5250/exynos5-dt.c @@ -27,12 +27,9 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SOUND_MAX98095 static void board_enable_audio_codec(void) { - struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) - samsung_get_base_gpio_part1(); - /* Enable MAX98095 Codec */ - s5p_gpio_direction_output(&gpio1->x1, 7, 1); - s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); + gpio_direction_output(EXYNOS5_GPIO_X17, 1); + gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE); } #endif @@ -47,19 +44,16 @@ int exynos_init(void) #ifdef CONFIG_LCD void exynos_cfg_lcd_gpio(void) { - struct exynos5_gpio_part1 *gpio1 = - (struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1(); - /* For Backlight */ - s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->b2, 0, 1); + gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_OUTPUT); + gpio_set_value(EXYNOS5_GPIO_B20, 1); /* LCD power on */ - s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->x1, 5, 1); + gpio_cfg_pin(EXYNOS5_GPIO_X15, S5P_GPIO_OUTPUT); + gpio_set_value(EXYNOS5_GPIO_X15, 1); /* Set Hotplug detect for DP */ - s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3)); + gpio_cfg_pin(EXYNOS5_GPIO_X07, S5P_GPIO_FUNC(0x3)); } void exynos_set_dp_phy(unsigned int onoff) diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 28a6d9e..014b7bd 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -29,12 +29,9 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SOUND_MAX98095 static void board_enable_audio_codec(void) { - struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) - samsung_get_base_gpio_part1(); - /* Enable MAX98095 Codec */ - s5p_gpio_direction_output(&gpio1->x1, 7, 1); - s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); + gpio_direction_output(EXYNOS5_GPIO_X17, 1); + gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE); } #endif @@ -275,19 +272,17 @@ int exynos_power_init(void) #ifdef CONFIG_LCD void exynos_cfg_lcd_gpio(void) { - struct exynos5_gpio_part1 *gpio1 = - (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); /* For Backlight */ - s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->b2, 0, 1); + gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_OUTPUT); + gpio_set_value(EXYNOS5_GPIO_B20, 1); /* LCD power on */ - s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->x1, 5, 1); + gpio_cfg_pin(EXYNOS5_GPIO_X15, S5P_GPIO_OUTPUT); + gpio_set_value(EXYNOS5_GPIO_X15, 1); /* Set Hotplug detect for DP */ - s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3)); + gpio_cfg_pin(EXYNOS5_GPIO_X07, S5P_GPIO_FUNC(0x3)); } void exynos_set_dp_phy(unsigned int onoff) diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c index e4606ec..9207522 100644 --- a/board/samsung/smdk5420/smdk5420.c +++ b/board/samsung/smdk5420/smdk5420.c @@ -21,11 +21,8 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_USB_EHCI_EXYNOS static int board_usb_vbus_init(void) { - struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) - samsung_get_base_gpio_part1(); - /* Enable VBUS power switch */ - s5p_gpio_direction_output(&gpio1->x2, 6, 1); + gpio_direction_output(EXYNOS5420_GPIO_X26, 1); /* VBUS turn ON time */ mdelay(3); @@ -49,15 +46,15 @@ void cfg_lcd_gpio(void) (struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1(); /* For Backlight */ - s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->b2, 0, 1); + gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_OUTPUT); + gpio_set_value(EXYNOS5420_GPIO_B20, 1); /* LCD power on */ - s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT); - s5p_gpio_set_value(&gpio1->x1, 5, 1); + gpio_cfg_pin(EXYNOS5420_GPIO_X15, S5P_GPIO_OUTPUT); + gpio_set_value(EXYNOS5420_GPIO_X15, 1); /* Set Hotplug detect for DP */ - s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3)); + gpio_cfg_pin(EXYNOS5420_GPIO_X07, S5P_GPIO_FUNC(0x3)); } vidinfo_t panel_info = { diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c index 860c851..e009564 100644 --- a/board/samsung/smdkc100/smdkc100.c +++ b/board/samsung/smdkc100/smdkc100.c @@ -21,11 +21,8 @@ static void smc9115_pre_init(void) { u32 smc_bw_conf, smc_bc_conf; - struct s5pc100_gpio *const gpio = - (struct s5pc100_gpio *)samsung_get_base_gpio(); - /* gpio configuration GPK0CON */ - s5p_gpio_cfg_pin(&gpio->k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + gpio_cfg_pin(S5PC100_GPIO_K00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2)); /* Ethernet needs bus width of 16 bits */ smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c index 81a3060..8eca358 100644 --- a/board/samsung/smdkv310/smdkv310.c +++ b/board/samsung/smdkv310/smdkv310.c @@ -15,15 +15,13 @@ #include <asm/arch/sromc.h> DECLARE_GLOBAL_DATA_PTR; -struct exynos4_gpio_part1 *gpio1; -struct exynos4_gpio_part2 *gpio2; static void smc9115_pre_init(void) { u32 smc_bw_conf, smc_bc_conf; /* gpio configuration GPK0CON */ - s5p_gpio_cfg_pin(&gpio2->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2)); + gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2)); /* Ethernet needs bus width of 16 bits */ smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); @@ -38,9 +36,6 @@ static void smc9115_pre_init(void) int board_init(void) { - gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; - gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; - smc9115_pre_init(); gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); @@ -103,21 +98,21 @@ int board_mmc_init(bd_t *bis) * GPK2[2] SD_2_CDn * GPK2[3:6] SD_2_DATA[0:3](2) */ - for (i = 0; i < 7; i++) { + for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) { /* GPK2[0:6] special function 2 */ - s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2)); + gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2)); /* GPK2[0:6] drv 4x */ - s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); + gpio_set_drv(i, S5P_GPIO_DRV_4X); /* GPK2[0:1] pull disable */ - if (i == 0 || i == 1) { - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); + if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) { + gpio_set_pull(i, S5P_GPIO_PULL_NONE); continue; } /* GPK2[2:6] pull up */ - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP); + gpio_set_pull(i, S5P_GPIO_PULL_UP); } err = s5p_mmc_init(2, 4); return err; diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index ab0ad1d..fec72d4 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -54,8 +54,6 @@ int exynos_init(void) void i2c_init_board(void) { int err; - struct exynos4_gpio_part2 *gpio2 = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); /* I2C_5 -> PMIC */ err = exynos_pinmux_config(PERIPH_ID_I2C5, PINMUX_FLAG_NONE); @@ -65,8 +63,8 @@ void i2c_init_board(void) } /* I2C_8 -> FG */ - s5p_gpio_direction_output(&gpio2->y4, 0, 1); - s5p_gpio_direction_output(&gpio2->y4, 1, 1); + gpio_direction_output(EXYNOS4_GPIO_Y40, 1); + gpio_direction_output(EXYNOS4_GPIO_Y41, 1); } static void trats_low_power_mode(void) @@ -347,21 +345,19 @@ int exynos_power_init(void) static unsigned int get_hw_revision(void) { - struct exynos4_gpio_part1 *gpio = - (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1(); int hwrev = 0; int i; /* hw_rev[3:0] == GPE1[3:0] */ - for (i = 0; i < 4; i++) { - s5p_gpio_cfg_pin(&gpio->e1, i, GPIO_INPUT); - s5p_gpio_set_pull(&gpio->e1, i, GPIO_PULL_NONE); + for (i = EXYNOS4_GPIO_E10; i < EXYNOS4_GPIO_E14; i++) { + gpio_cfg_pin(i, S5P_GPIO_INPUT); + gpio_set_pull(i, S5P_GPIO_PULL_NONE); } udelay(1); for (i = 0; i < 4; i++) - hwrev |= (s5p_gpio_get_value(&gpio->e1, i) << i); + hwrev |= (gpio_get_value(EXYNOS4_GPIO_E10 + i) << i); debug("hwrev 0x%x\n", hwrev); @@ -442,11 +438,8 @@ int g_dnl_board_usb_cable_connected(void) static void pmic_reset(void) { - struct exynos4_gpio_part2 *gpio = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); - - s5p_gpio_direction_output(&gpio->x0, 7, 1); - s5p_gpio_set_pull(&gpio->x2, 7, GPIO_PULL_NONE); + gpio_direction_output(EXYNOS4_GPIO_X07, 1); + gpio_set_pull(EXYNOS4_GPIO_X27, S5P_GPIO_PULL_NONE); } static void board_clock_init(void) @@ -523,12 +516,9 @@ static void board_power_init(void) static void exynos_uart_init(void) { - struct exynos4_gpio_part2 *gpio2 = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); - /* UART_SEL GPY4[7] (part2) at EXYNOS4 */ - s5p_gpio_set_pull(&gpio2->y4, 7, GPIO_PULL_UP); - s5p_gpio_direction_output(&gpio2->y4, 7, 1); + gpio_set_pull(EXYNOS4_GPIO_Y47, S5P_GPIO_PULL_UP); + gpio_direction_output(EXYNOS4_GPIO_Y47, 1); } int exynos_early_init_f(void) @@ -544,14 +534,11 @@ int exynos_early_init_f(void) void exynos_reset_lcd(void) { - struct exynos4_gpio_part2 *gpio2 = - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); - - s5p_gpio_direction_output(&gpio2->y4, 5, 1); + gpio_direction_output(EXYNOS4_GPIO_Y45, 1); udelay(10000); - s5p_gpio_direction_output(&gpio2->y4, 5, 0); + gpio_direction_output(EXYNOS4_GPIO_Y45, 0); udelay(10000); - s5p_gpio_direction_output(&gpio2->y4, 5, 1); + gpio_direction_output(EXYNOS4_GPIO_Y45, 1); } int lcd_power(void) diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index 4709525..e4987ce 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -25,9 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; -static struct exynos4x12_gpio_part1 *gpio1; -static struct exynos4x12_gpio_part2 *gpio2; - static unsigned int board_rev = -1; static inline u32 get_model_rev(void); @@ -37,26 +34,24 @@ static void check_hw_revision(void) int modelrev = 0; int i; - gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2(); - /* * GPM1[1:0]: MODEL_REV[1:0] * Don't set as pull-none for these N/C pin. * TRM say that it may cause unexcepted state and leakage current. * and pull-none is only for output function. */ - for (i = 0; i < 2; i++) - s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT); + for (i = EXYNOS4X12_GPIO_M10; i < EXYNOS4X12_GPIO_M12; i++) + gpio_cfg_pin(i, S5P_GPIO_INPUT); /* GPM1[5:2]: HW_REV[3:0] */ - for (i = 2; i < 6; i++) { - s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT); - s5p_gpio_set_pull(&gpio2->m1, i, GPIO_PULL_NONE); + for (i = EXYNOS4X12_GPIO_M12; i < EXYNOS4X12_GPIO_M16; i++) { + gpio_cfg_pin(i, S5P_GPIO_INPUT); + gpio_set_pull(i, S5P_GPIO_PULL_NONE); } /* GPM1[1:0]: MODEL_REV[1:0] */ for (i = 0; i < 2; i++) - modelrev |= (s5p_gpio_get_value(&gpio2->m1, i) << i); + modelrev |= (gpio_get_value(EXYNOS4X12_GPIO_M10 + i) << i); /* board_rev[15:8] = model */ board_rev = modelrev << 8; @@ -74,26 +69,24 @@ static inline u32 get_model_rev(void) static void board_external_gpio_init(void) { - gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2(); - /* * some pins which in alive block are connected with external pull-up * but it's default setting is pull-down. * if that pin set as input then that floated */ - s5p_gpio_set_pull(&gpio2->x0, 2, GPIO_PULL_NONE); /* PS_ALS_INT */ - s5p_gpio_set_pull(&gpio2->x0, 4, GPIO_PULL_NONE); /* TSP_nINT */ - s5p_gpio_set_pull(&gpio2->x0, 7, GPIO_PULL_NONE); /* AP_PMIC_IRQ*/ - s5p_gpio_set_pull(&gpio2->x1, 5, GPIO_PULL_NONE); /* IF_PMIC_IRQ*/ - s5p_gpio_set_pull(&gpio2->x2, 0, GPIO_PULL_NONE); /* VOL_UP */ - s5p_gpio_set_pull(&gpio2->x2, 1, GPIO_PULL_NONE); /* VOL_DOWN */ - s5p_gpio_set_pull(&gpio2->x2, 3, GPIO_PULL_NONE); /* FUEL_ALERT */ - s5p_gpio_set_pull(&gpio2->x2, 4, GPIO_PULL_NONE); /* ADC_INT */ - s5p_gpio_set_pull(&gpio2->x2, 7, GPIO_PULL_NONE); /* nPOWER */ - s5p_gpio_set_pull(&gpio2->x3, 0, GPIO_PULL_NONE); /* WPC_INT */ - s5p_gpio_set_pull(&gpio2->x3, 5, GPIO_PULL_NONE); /* OK_KEY */ - s5p_gpio_set_pull(&gpio2->x3, 7, GPIO_PULL_NONE); /* HDMI_HPD */ + gpio_set_pull(EXYNOS4X12_GPIO_X02, S5P_GPIO_PULL_NONE); /* PS_ALS_INT */ + gpio_set_pull(EXYNOS4X12_GPIO_X04, S5P_GPIO_PULL_NONE); /* TSP_nINT */ + gpio_set_pull(EXYNOS4X12_GPIO_X07, S5P_GPIO_PULL_NONE); /* AP_PMIC_IRQ*/ + gpio_set_pull(EXYNOS4X12_GPIO_X15, S5P_GPIO_PULL_NONE); /* IF_PMIC_IRQ*/ + gpio_set_pull(EXYNOS4X12_GPIO_X20, S5P_GPIO_PULL_NONE); /* VOL_UP */ + gpio_set_pull(EXYNOS4X12_GPIO_X21, S5P_GPIO_PULL_NONE); /* VOL_DOWN */ + gpio_set_pull(EXYNOS4X12_GPIO_X23, S5P_GPIO_PULL_NONE); /* FUEL_ALERT */ + gpio_set_pull(EXYNOS4X12_GPIO_X24, S5P_GPIO_PULL_NONE); /* ADC_INT */ + gpio_set_pull(EXYNOS4X12_GPIO_X27, S5P_GPIO_PULL_NONE); /* nPOWER */ + gpio_set_pull(EXYNOS4X12_GPIO_X30, S5P_GPIO_PULL_NONE); /* WPC_INT */ + gpio_set_pull(EXYNOS4X12_GPIO_X35, S5P_GPIO_PULL_NONE); /* OK_KEY */ + gpio_set_pull(EXYNOS4X12_GPIO_X37, S5P_GPIO_PULL_NONE); /* HDMI_HPD */ } #ifdef CONFIG_SYS_I2C_INIT_BOARD @@ -101,9 +94,6 @@ static void board_init_i2c(void) { int err; - gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1(); - gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2(); - /* I2C_7 */ err = exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE); if (err) { @@ -112,12 +102,12 @@ static void board_init_i2c(void) } /* I2C_8 */ - s5p_gpio_direction_output(&gpio1->f1, 4, 1); - s5p_gpio_direction_output(&gpio1->f1, 5, 1); + gpio_direction_output(EXYNOS4X12_GPIO_F14, 1); + gpio_direction_output(EXYNOS4X12_GPIO_F15, 1); /* I2C_9 */ - s5p_gpio_direction_output(&gpio2->m2, 1, 1); - s5p_gpio_direction_output(&gpio2->m2, 0, 1); + gpio_direction_output(EXYNOS4X12_GPIO_M21, 1); + gpio_direction_output(EXYNOS4X12_GPIO_M20, 1); } #endif @@ -125,17 +115,17 @@ static void board_init_i2c(void) int get_soft_i2c_scl_pin(void) { if (I2C_ADAP_HWNR) - return exynos4x12_gpio_get(2, m2, 1); /* I2C9 */ + return EXYNOS4X12_GPIO_M21; /* I2C9 */ else - return exynos4x12_gpio_get(1, f1, 4); /* I2C8 */ + return EXYNOS4X12_GPIO_F14; /* I2C8 */ } int get_soft_i2c_sda_pin(void) { if (I2C_ADAP_HWNR) - return exynos4x12_gpio_get(2, m2, 0); /* I2C9 */ + return EXYNOS4X12_GPIO_M20; /* I2C9 */ else - return exynos4x12_gpio_get(1, f1, 5); /* I2C8 */ + return EXYNOS4X12_GPIO_F15; /* I2C8 */ } #endif @@ -396,11 +386,9 @@ void exynos_lcd_power_on(void) { struct pmic *p = pmic_get("MAX77686_PMIC"); - gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1(); - /* LCD_2.2V_EN: GPC0[1] */ - s5p_gpio_set_pull(&gpio1->c0, 1, GPIO_PULL_UP); - s5p_gpio_direction_output(&gpio1->c0, 1, 1); + gpio_set_pull(EXYNOS4X12_GPIO_C01, S5P_GPIO_PULL_UP); + gpio_direction_output(EXYNOS4X12_GPIO_C01, 1); /* LDO25 VCC_3.1V_LCD */ pmic_probe(p); @@ -410,12 +398,10 @@ void exynos_lcd_power_on(void) void exynos_reset_lcd(void) { - gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1(); - /* reset lcd */ - s5p_gpio_direction_output(&gpio1->f2, 1, 0); + gpio_direction_output(EXYNOS4X12_GPIO_F21, 0); udelay(10); - s5p_gpio_set_value(&gpio1->f2, 1, 1); + gpio_set_value(EXYNOS4X12_GPIO_F21, 1); } void exynos_lcd_misc_init(vidinfo_t *vid) diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 8e49195..47e7f53 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -27,8 +27,6 @@ DECLARE_GLOBAL_DATA_PTR; -struct exynos4_gpio_part1 *gpio1; -struct exynos4_gpio_part2 *gpio2; unsigned int board_rev; u32 get_board_rev(void) @@ -305,35 +303,35 @@ void exynos_cfg_lcd_gpio(void) for (i = 0; i < 8; i++) { /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */ - s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2)); - s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2)); - s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2)); + gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2)); + gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2)); + gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2)); /* pull-up/down disable */ - s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE); - s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE); - s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE); + gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE); + gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE); + gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE); /* drive strength to max (24bit) */ - s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW); - s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW); - s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW); + gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X); + gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); + gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X); + gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW); + gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X); + gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW); } - for (i = 0; i < f3_end; i++) { + for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) { /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */ - s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2)); + gpio_cfg_pin(i, S5P_GPIO_FUNC(2)); /* pull-up/down disable */ - s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE); + gpio_set_pull(i, S5P_GPIO_PULL_NONE); /* drive strength to max (24bit) */ - s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X); - s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW); + gpio_set_drv(i, S5P_GPIO_DRV_4X); + gpio_set_rate(i, S5P_GPIO_DRV_SLOW); } /* gpio pad configuration for LCD reset. */ - s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT); + gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT); spi_init(); } @@ -345,11 +343,11 @@ int mipi_power(void) void exynos_reset_lcd(void) { - s5p_gpio_set_value(&gpio2->y4, 5, 1); + gpio_set_value(EXYNOS4_GPIO_Y45, 1); udelay(10000); - s5p_gpio_set_value(&gpio2->y4, 5, 0); + gpio_set_value(EXYNOS4_GPIO_Y45, 0); udelay(10000); - s5p_gpio_set_value(&gpio2->y4, 5, 1); + gpio_set_value(EXYNOS4_GPIO_Y45, 1); udelay(100); } @@ -379,9 +377,6 @@ void exynos_enable_ldo(unsigned int onoff) int exynos_init(void) { - gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; - gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; - gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; switch (get_hwrev()) { @@ -392,7 +387,7 @@ int exynos_init(void) * you should set it HIGH since it removes the inverter */ /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */ - s5p_gpio_direction_output(&gpio1->e3, 6, 0); + gpio_direction_output(EXYNOS4_GPIO_E36, 0); break; default: /* @@ -400,7 +395,7 @@ int exynos_init(void) * But set it as HIGH to ensure */ /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */ - s5p_gpio_direction_output(&gpio1->e1, 3, 1); + gpio_direction_output(EXYNOS4_GPIO_E13, 1); break; } diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c index 7e8731b..2782bcc 100644 --- a/board/siemens/common/board.c +++ b/board/siemens/common/board.c @@ -128,12 +128,6 @@ do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) button = 0; gpio_free(gpio); - if (!button) { - /* LED0 - RED=1: GPIO2_0 2*32 = 64 */ - gpio_request(BOARD_DFU_BUTTON_LED, ""); - gpio_direction_output(BOARD_DFU_BUTTON_LED, 1); - gpio_set_value(BOARD_DFU_BUTTON_LED, 1); - } return button; } @@ -144,6 +138,46 @@ U_BOOT_CMD( "" ); #endif +/* + * This command sets led + * Input - name of led + * value of led + * Returns - 1 if input does not match + * 0 if led was set + */ +static int +do_setled(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int gpio = 0; + if (argc != 3) + goto exit; +#if defined(BOARD_STATUS_LED) + if (!strcmp(argv[1], "stat")) + gpio = BOARD_STATUS_LED; +#endif +#if defined(BOARD_DFU_BUTTON_LED) + if (!strcmp(argv[1], "dfu")) + gpio = BOARD_DFU_BUTTON_LED; +#endif + /* If argument does not mach exit */ + if (gpio == 0) + goto exit; + gpio_request(gpio, ""); + gpio_direction_output(gpio, 1); + if (!strcmp(argv[2], "1")) + gpio_set_value(gpio, 1); + else + gpio_set_value(gpio, 0); + return 0; +exit: + return 1; +} + +U_BOOT_CMD( + led, CONFIG_SYS_MAXARGS, 2, do_setled, + "Set led on or off", + "dfu val - set dfu led\nled stat val - set status led" +); static int do_usertestwdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) diff --git a/board/siemens/dxr2/Makefile b/board/siemens/draco/Makefile index f159932..f159932 100644 --- a/board/siemens/dxr2/Makefile +++ b/board/siemens/draco/Makefile diff --git a/board/siemens/dxr2/board.c b/board/siemens/draco/board.c index 38ac93d..9be2e34 100644 --- a/board/siemens/dxr2/board.c +++ b/board/siemens/draco/board.c @@ -1,5 +1,5 @@ /* - * Board functions for TI AM335X based dxr2 board + * Board functions for TI AM335X based draco board * (C) Copyright 2013 Siemens Schweiz AG * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. * @@ -37,13 +37,27 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SPL_BUILD -static struct dxr2_baseboard_id __attribute__((section(".data"))) settings; -/* @303MHz-i0 */ +static struct draco_baseboard_id __attribute__((section(".data"))) settings; + +#if DDR_PLL_FREQ == 303 +/* Default@303MHz-i0 */ +const struct ddr3_data ddr3_default = { + 0x33524444, 0x56312e35, 0x0080, 0x0000, 0x003A, 0x003F, 0x009F, + 0x0079, 0x0888A39B, 0x26247FDA, 0x501F821F, 0x00100206, 0x61A44A32, + 0x0000093B, 0x0000014A, + "default name @303MHz \0", + "default marking \0", +}; +#elif DDR_PLL_FREQ == 400 +/* Default@400MHz-i0 */ const struct ddr3_data ddr3_default = { - 0x33524444, 0x56312e34, 0x0080, 0x0000, 0x0038, 0x003E, 0x00A4, - 0x0075, 0x0888A39B, 0x26247FDA, 0x501F821F, 0x00100206, 0x61A44A32, + 0x33524444, 0x56312e35, 0x0080, 0x0000, 0x0039, 0x0046, 0x00ab, + 0x0080, 0x0AAAA4DB, 0x26307FDA, 0x501F821F, 0x00100207, 0x61A45232, 0x00000618, 0x0000014A, + "default name @400MHz \0", + "default marking \0", }; +#endif static void set_default_ddr3_timings(void) { @@ -53,8 +67,12 @@ static void set_default_ddr3_timings(void) static void print_ddr3_timings(void) { - printf("\n\nDDR3 Timing parameters:\n"); - printf("Diff Eeprom Default\n"); + printf("\nDDR3\n"); + printf("clock:\t\t%d MHz\n", DDR_PLL_FREQ); + printf("device:\t\t%s\n", settings.ddr3.manu_name); + printf("marking:\t%s\n", settings.ddr3.manu_marking); + printf("timing parameters\n"); + printf("diff\teeprom\tdefault\n"); PRINTARGS(magic); PRINTARGS(version); PRINTARGS(ddr3_sratio); @@ -78,9 +96,9 @@ static void print_ddr3_timings(void) static void print_chip_data(void) { - printf("\n"); - printf("Device: '%s'\n", settings.chip.sdevname); - printf("HW version: '%s'\n", settings.chip.shwver); + printf("\nCPU BOARD\n"); + printf("device: \t'%s'\n", settings.chip.sdevname); + printf("hw version: \t'%s'\n", settings.chip.shwver); } #endif /* CONFIG_SPL_BUILD */ @@ -112,20 +130,18 @@ static int read_eeprom(void) printf("Using DDR3 settings from EEPROM\n"); } else { if (ddr3_default.magic != settings.ddr3.magic) - printf("Error: No valid DDR3 data in eeprom.\n"); + printf("Warning: No valid DDR3 data in eeprom.\n"); if (ddr3_default.version != settings.ddr3.version) - printf("Error: DDR3 data version does not match.\n"); + printf("Warning: DDR3 data version does not match.\n"); printf("Using default settings\n"); set_default_ddr3_timings(); } - if (MAGIC_CHIP == settings.chip.magic) { - printf("Valid chip data in eeprom\n"); + if (MAGIC_CHIP == settings.chip.magic) print_chip_data(); - } else { - printf("Error: No chip data in eeprom\n"); - } + else + printf("Warning: No chip data in eeprom\n"); print_ddr3_timings(); #endif @@ -135,48 +151,48 @@ static int read_eeprom(void) #ifdef CONFIG_SPL_BUILD static void board_init_ddr(void) { -struct emif_regs dxr2_ddr3_emif_reg_data = { +struct emif_regs draco_ddr3_emif_reg_data = { .zq_config = 0x50074BE4, }; -struct ddr_data dxr2_ddr3_data = { +struct ddr_data draco_ddr3_data = { }; -struct cmd_control dxr2_ddr3_cmd_ctrl_data = { +struct cmd_control draco_ddr3_cmd_ctrl_data = { }; -struct ctrl_ioregs dxr2_ddr3_ioregs = { +struct ctrl_ioregs draco_ddr3_ioregs = { }; /* pass values from eeprom */ - dxr2_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1; - dxr2_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2; - dxr2_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3; - dxr2_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 = + draco_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1; + draco_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2; + draco_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3; + draco_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 = settings.ddr3.emif_ddr_phy_ctlr_1; - dxr2_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config; - dxr2_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl; - - dxr2_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0; - dxr2_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0; - dxr2_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0; - dxr2_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0; - - dxr2_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio; - dxr2_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout; - dxr2_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio; - dxr2_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout; - dxr2_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio; - dxr2_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout; - - dxr2_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val, - dxr2_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val, - dxr2_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val, - dxr2_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val, - dxr2_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val, - - config_ddr(DDR_PLL_FREQ, &dxr2_ddr3_ioregs, &dxr2_ddr3_data, - &dxr2_ddr3_cmd_ctrl_data, &dxr2_ddr3_emif_reg_data, 0); + draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config; + draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl; + + draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0; + draco_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0; + draco_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0; + draco_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0; + + draco_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio; + draco_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout; + draco_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio; + draco_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout; + draco_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio; + draco_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout; + + draco_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val, + draco_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val, + draco_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val, + draco_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val, + draco_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val, + + config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data, + &draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0); } static void spl_siemens_board_init(void) diff --git a/board/siemens/dxr2/board.h b/board/siemens/draco/board.h index abf5432..ff8ab76 100644 --- a/board/siemens/dxr2/board.h +++ b/board/siemens/draco/board.h @@ -22,24 +22,26 @@ #define MAGIC_CHIP 0x50494843 /* Automatic generated definition */ -/* Wed, 18 Sep 2013 18:58:27 +0200 */ -/* From file: draco/ddr3-data-micron-v2.txt */ +/* Wed, 16 Apr 2014 16:50:41 +0200 */ +/* From file: draco/ddr3-data-universal-default@303MHz-i0-ES3.txt */ struct ddr3_data { unsigned int magic; /* 0x33524444 */ - unsigned int version; /* 0x56312e34 */ - unsigned short int ddr3_sratio; /* 0x0100 */ - unsigned short int iclkout; /* 0x0001 */ + unsigned int version; /* 0x56312e35 */ + unsigned short int ddr3_sratio; /* 0x0080 */ + unsigned short int iclkout; /* 0x0000 */ unsigned short int dt0rdsratio0; /* 0x003A */ - unsigned short int dt0wdsratio0; /* 0x008A */ - unsigned short int dt0fwsratio0; /* 0x010B */ - unsigned short int dt0wrsratio0; /* 0x00C4 */ + unsigned short int dt0wdsratio0; /* 0x003F */ + unsigned short int dt0fwsratio0; /* 0x009F */ + unsigned short int dt0wrsratio0; /* 0x0079 */ unsigned int sdram_tim1; /* 0x0888A39B */ unsigned int sdram_tim2; /* 0x26247FDA */ unsigned int sdram_tim3; /* 0x501F821F */ unsigned int emif_ddr_phy_ctlr_1; /* 0x00100206 */ - unsigned int sdram_config; /* 0x61C04AB2 */ - unsigned int ref_ctrl; /* 0x00000618 */ - unsigned int ioctr_val; /* 0x0000018B */ + unsigned int sdram_config; /* 0x61A44A32 */ + unsigned int ref_ctrl; /* 0x0000093B */ + unsigned int ioctr_val; /* 0x0000014A */ + char manu_name[32]; /* "default@303MHz \0" */ + char manu_marking[32]; /* "default \0" */ }; struct chip_data { @@ -48,7 +50,7 @@ struct chip_data { char shwver[7]; }; -struct dxr2_baseboard_id { +struct draco_baseboard_id { struct ddr3_data ddr3; struct chip_data chip; }; diff --git a/board/siemens/dxr2/mux.c b/board/siemens/draco/mux.c index f2314b5..eaa3c70 100644 --- a/board/siemens/dxr2/mux.c +++ b/board/siemens/draco/mux.c @@ -1,5 +1,5 @@ /* - * pinmux setup for siemens dxr2 board + * pinmux setup for siemens draco board * * (C) Copyright 2013 Siemens Schweiz AG * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c index 98083d5..64e69dc 100644 --- a/board/siemens/pxm2/board.c +++ b/board/siemens/pxm2/board.c @@ -70,11 +70,11 @@ struct cmd_control pxm2_ddr3_cmd_ctrl_data = { }; const struct ctrl_ioregs ioregs = { - .cm0ioctl = DXR2_IOCTRL_VAL, - .cm1ioctl = DXR2_IOCTRL_VAL, - .cm2ioctl = DXR2_IOCTRL_VAL, - .dt0ioctl = DXR2_IOCTRL_VAL, - .dt1ioctl = DXR2_IOCTRL_VAL, + .cm0ioctl = DDR_IOCTRL_VAL, + .cm1ioctl = DDR_IOCTRL_VAL, + .cm2ioctl = DDR_IOCTRL_VAL, + .dt0ioctl = DDR_IOCTRL_VAL, + .dt1ioctl = DDR_IOCTRL_VAL, }; config_ddr(DDR_PLL_FREQ, &ioregs, &pxm2_ddr3_data, diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c index e0ada3f..1752df2 100644 --- a/board/siemens/rut/board.c +++ b/board/siemens/rut/board.c @@ -400,7 +400,7 @@ static int conf_disp_pll(int m, int n) #if defined(DISPL_PLL_SPREAD_SPECTRUM) writel(0x64, &cmwkup->resv6[3]); /* 0x50 */ writel(0x800, &cmwkup->resv6[2]); /* 0x4c */ - writel(readl(&cmwkup->clkmoddplldisp) | (1 << 12), + writel(readl(&cmwkup->clkmoddplldisp) | CM_CLKMODE_DPLL_SSC_EN_MASK, &cmwkup->clkmoddplldisp); /* 0x98 */ #endif return 0; diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds index a9e3d34..2c5a0f8 100644 --- a/board/ti/am335x/u-boot.lds +++ b/board/ti/am335x/u-boot.lds @@ -34,6 +34,7 @@ SECTIONS .text : { *(.__image_copy_start) + *(.vectors) CPUDIR/start.o (.text*) board/ti/am335x/built-in.o (.text*) *(.text*) |