diff options
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/mpc8323erdb/Makefile | 50 | ||||
-rw-r--r-- | board/freescale/mpc8323erdb/config.mk | 28 | ||||
-rw-r--r-- | board/freescale/mpc8323erdb/mpc8323erdb.c | 217 | ||||
-rw-r--r-- | board/mpc8349emds/mpc8349emds.c | 327 | ||||
-rw-r--r-- | board/mpc8349itx/config.mk | 6 | ||||
-rw-r--r-- | board/mpc8360emds/mpc8360emds.c | 389 | ||||
-rw-r--r-- | board/mpc8360emds/pci.c | 22 |
7 files changed, 311 insertions, 728 deletions
diff --git a/board/freescale/mpc8323erdb/Makefile b/board/freescale/mpc8323erdb/Makefile new file mode 100644 index 0000000..acc9544 --- /dev/null +++ b/board/freescale/mpc8323erdb/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mpc8323erdb/config.mk b/board/freescale/mpc8323erdb/config.mk new file mode 100644 index 0000000..fe0d37d --- /dev/null +++ b/board/freescale/mpc8323erdb/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# MPC8323ERDB +# + +TEXT_BASE = 0xFE000000 diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c new file mode 100644 index 0000000..1886f19 --- /dev/null +++ b/board/freescale/mpc8323erdb/mpc8323erdb.c @@ -0,0 +1,217 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * + * Michael Barkowski <michael.barkowski@freescale.com> + * Based on mpc832xmds file by Dave Liu <daveliu@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include <common.h> +#include <ioports.h> +#include <mpc83xx.h> +#include <i2c.h> +#include <spd.h> +#include <miiphy.h> +#include <command.h> +#include <libfdt.h> +#include <libfdt_env.h> +#if defined(CONFIG_PCI) +#include <pci.h> +#endif +#if defined(CONFIG_SPD_EEPROM) +#include <spd_sdram.h> +#else +#include <asm/mmu.h> +#endif + +const qe_iop_conf_t qe_iop_conf_tab[] = { + /* UCC3 */ + {1, 0, 1, 0, 1}, /* TxD0 */ + {1, 1, 1, 0, 1}, /* TxD1 */ + {1, 2, 1, 0, 1}, /* TxD2 */ + {1, 3, 1, 0, 1}, /* TxD3 */ + {1, 9, 1, 0, 1}, /* TxER */ + {1, 12, 1, 0, 1}, /* TxEN */ + {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */ + + {1, 4, 2, 0, 1}, /* RxD0 */ + {1, 5, 2, 0, 1}, /* RxD1 */ + {1, 6, 2, 0, 1}, /* RxD2 */ + {1, 7, 2, 0, 1}, /* RxD3 */ + {1, 8, 2, 0, 1}, /* RxER */ + {1, 10, 2, 0, 1}, /* RxDV */ + {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */ + {1, 11, 2, 0, 1}, /* COL */ + {1, 13, 2, 0, 1}, /* CRS */ + + /* UCC2 */ + {0, 18, 1, 0, 1}, /* TxD0 */ + {0, 19, 1, 0, 1}, /* TxD1 */ + {0, 20, 1, 0, 1}, /* TxD2 */ + {0, 21, 1, 0, 1}, /* TxD3 */ + {0, 27, 1, 0, 1}, /* TxER */ + {0, 30, 1, 0, 1}, /* TxEN */ + {3, 23, 2, 0, 1}, /* TxCLK->CLK3 */ + + {0, 22, 2, 0, 1}, /* RxD0 */ + {0, 23, 2, 0, 1}, /* RxD1 */ + {0, 24, 2, 0, 1}, /* RxD2 */ + {0, 25, 2, 0, 1}, /* RxD3 */ + {0, 26, 1, 0, 1}, /* RxER */ + {0, 28, 2, 0, 1}, /* Rx_DV */ + {3, 21, 2, 0, 1}, /* RxCLK->CLK16 */ + {0, 29, 2, 0, 1}, /* COL */ + {0, 31, 2, 0, 1}, /* CRS */ + + {3, 4, 3, 0, 2}, /* MDIO */ + {3, 5, 1, 0, 2}, /* MDC */ + + {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ +}; + +int board_early_init_f(void) +{ + return 0; +} + +int fixed_sdram(void); + +long int initdram(int board_type) +{ + volatile immap_t *im = (immap_t *) CFG_IMMR; + u32 msize = 0; + + if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) + return -1; + + /* DDR SDRAM - Main SODIMM */ + im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR; + + msize = fixed_sdram(); + + puts("\n DDR RAM: "); + + /* return total bus SDRAM size(bytes) -- DDR */ + return (msize * 1024 * 1024); +} + +/************************************************************************* + * fixed sdram init -- doesn't use serial presence detect. + ************************************************************************/ +int fixed_sdram(void) +{ + volatile immap_t *im = (immap_t *) CFG_IMMR; + u32 msize = 0; + u32 ddr_size; + u32 ddr_size_log2; + + msize = CFG_DDR_SIZE; + for (ddr_size = msize << 20, ddr_size_log2 = 0; + (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) { + if (ddr_size & 1) { + return -1; + } + } + im->sysconf.ddrlaw[0].ar = + LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); + im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL; + im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS; + im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG; + im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0; + im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1; + im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2; + im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3; + im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG; + im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2; + im->ddr.sdram_mode = CFG_DDR_MODE; + im->ddr.sdram_mode2 = CFG_DDR_MODE2; + im->ddr.sdram_interval = CFG_DDR_INTERVAL; + __asm__ __volatile__ ("sync"); + udelay(200); + + im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; + __asm__ __volatile__ ("sync"); + return msize; +} + +int checkboard(void) +{ + puts("Board: Freescale MPC8323ERDB\n"); + return 0; +} + +static struct pci_region pci_regions[] = { + { + bus_start: CFG_PCI1_MEM_BASE, + phys_start: CFG_PCI1_MEM_PHYS, + size: CFG_PCI1_MEM_SIZE, + flags: PCI_REGION_MEM | PCI_REGION_PREFETCH + }, + { + bus_start: CFG_PCI1_MMIO_BASE, + phys_start: CFG_PCI1_MMIO_PHYS, + size: CFG_PCI1_MMIO_SIZE, + flags: PCI_REGION_MEM + }, + { + bus_start: CFG_PCI1_IO_BASE, + phys_start: CFG_PCI1_IO_PHYS, + size: CFG_PCI1_IO_SIZE, + flags: PCI_REGION_IO + } +}; + +void pci_init_board(void) +{ + volatile immap_t *immr = (volatile immap_t *)CFG_IMMR; + volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; + volatile law83xx_t *pci_law = immr->sysconf.pcilaw; + struct pci_region *reg[] = { pci_regions }; + + /* Enable all 3 PCI_CLK_OUTPUTs. */ + clk->occr |= 0xe0000000; + + /* Configure PCI Local Access Windows */ + pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; + + pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; + + mpc83xx_pci_init(1, reg, 0); +} + +#if defined(CONFIG_OF_BOARD_SETUP) + +/* + * Prototypes of functions that we use. + */ +void ft_cpu_setup(void *blob, bd_t *bd); + +#ifdef CONFIG_PCI +void ft_pci_setup(void *blob, bd_t *bd); +#endif + +void +ft_board_setup(void *blob, bd_t *bd) +{ + int nodeoffset; + int tmp[2]; + + nodeoffset = fdt_find_node_by_path(blob, "/memory"); + if (nodeoffset >= 0) { + tmp[0] = cpu_to_be32(bd->bi_memstart); + tmp[1] = cpu_to_be32(bd->bi_memsize); + fdt_setprop(blob, nodeoffset, "reg", tmp, sizeof(tmp)); + } + + ft_cpu_setup(blob, bd); + +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif +} +#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/board/mpc8349emds/mpc8349emds.c b/board/mpc8349emds/mpc8349emds.c index 071591e..521d1bb 100644 --- a/board/mpc8349emds/mpc8349emds.c +++ b/board/mpc8349emds/mpc8349emds.c @@ -29,7 +29,6 @@ #include <i2c.h> #include <spd.h> #include <miiphy.h> -#include <command.h> #if defined(CONFIG_SPD_EEPROM) #include <spd_sdram.h> #endif @@ -258,332 +257,6 @@ void sdram_init(void) } #endif -#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) -/* - * ECC user commands - */ -void ecc_print_status(void) -{ - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ddr83xx_t *ddr = &immap->ddr; - - printf("\nECC mode: %s\n\n", (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF"); - - /* Interrupts */ - printf("Memory Error Interrupt Enable:\n"); - printf(" Multiple-Bit Error Interrupt Enable: %d\n", - (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0); - printf(" Single-Bit Error Interrupt Enable: %d\n", - (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0); - printf(" Memory Select Error Interrupt Enable: %d\n\n", - (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0); - - /* Error disable */ - printf("Memory Error Disable:\n"); - printf(" Multiple-Bit Error Disable: %d\n", - (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0); - printf(" Sinle-Bit Error Disable: %d\n", - (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0); - printf(" Memory Select Error Disable: %d\n\n", - (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0); - - /* Error injection */ - printf("Memory Data Path Error Injection Mask High/Low: %08lx %08lx\n", - ddr->data_err_inject_hi, ddr->data_err_inject_lo); - - printf("Memory Data Path Error Injection Mask ECC:\n"); - printf(" ECC Mirror Byte: %d\n", - (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0); - printf(" ECC Injection Enable: %d\n", - (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0); - printf(" ECC Error Injection Mask: 0x%02x\n\n", - ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM); - - /* SBE counter/threshold */ - printf("Memory Single-Bit Error Management (0..255):\n"); - printf(" Single-Bit Error Threshold: %d\n", - (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT); - printf(" Single-Bit Error Counter: %d\n\n", - (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT); - - /* Error detect */ - printf("Memory Error Detect:\n"); - printf(" Multiple Memory Errors: %d\n", - (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0); - printf(" Multiple-Bit Error: %d\n", - (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0); - printf(" Single-Bit Error: %d\n", - (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0); - printf(" Memory Select Error: %d\n\n", - (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0); - - /* Capture data */ - printf("Memory Error Address Capture: 0x%08lx\n", ddr->capture_address); - printf("Memory Data Path Read Capture High/Low: %08lx %08lx\n", - ddr->capture_data_hi, ddr->capture_data_lo); - printf("Memory Data Path Read Capture ECC: 0x%02x\n\n", - ddr->capture_ecc & CAPTURE_ECC_ECE); - - printf("Memory Error Attributes Capture:\n"); - printf(" Data Beat Number: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> ECC_CAPT_ATTR_BNUM_SHIFT); - printf(" Transaction Size: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> ECC_CAPT_ATTR_TSIZ_SHIFT); - printf(" Transaction Source: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> ECC_CAPT_ATTR_TSRC_SHIFT); - printf(" Transaction Type: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> ECC_CAPT_ATTR_TTYP_SHIFT); - printf(" Error Information Valid: %d\n\n", - ddr->capture_attributes & ECC_CAPT_ATTR_VLD); -} - -int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ddr83xx_t *ddr = &immap->ddr; - volatile u32 val; - u64 *addr, count, val64; - register u64 *i; - - if (argc > 4) { - printf ("Usage:\n%s\n", cmdtp->usage); - return 1; - } - - if (argc == 2) { - if (strcmp(argv[1], "status") == 0) { - ecc_print_status(); - return 0; - } else if (strcmp(argv[1], "captureclear") == 0) { - ddr->capture_address = 0; - ddr->capture_data_hi = 0; - ddr->capture_data_lo = 0; - ddr->capture_ecc = 0; - ddr->capture_attributes = 0; - return 0; - } - } - - if (argc == 3) { - if (strcmp(argv[1], "sbecnt") == 0) { - val = simple_strtoul(argv[2], NULL, 10); - if (val > 255) { - printf("Incorrect Counter value, should be 0..255\n"); - return 1; - } - - val = (val << ECC_ERROR_MAN_SBEC_SHIFT); - val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET); - - ddr->err_sbe = val; - return 0; - } else if (strcmp(argv[1], "sbethr") == 0) { - val = simple_strtoul(argv[2], NULL, 10); - if (val > 255) { - printf("Incorrect Counter value, should be 0..255\n"); - return 1; - } - - val = (val << ECC_ERROR_MAN_SBET_SHIFT); - val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC); - - ddr->err_sbe = val; - return 0; - } else if (strcmp(argv[1], "errdisable") == 0) { - val = ddr->err_disable; - - if (strcmp(argv[2], "+sbe") == 0) { - val |= ECC_ERROR_DISABLE_SBED; - } else if (strcmp(argv[2], "+mbe") == 0) { - val |= ECC_ERROR_DISABLE_MBED; - } else if (strcmp(argv[2], "+mse") == 0) { - val |= ECC_ERROR_DISABLE_MSED; - } else if (strcmp(argv[2], "+all") == 0) { - val |= (ECC_ERROR_DISABLE_SBED | - ECC_ERROR_DISABLE_MBED | - ECC_ERROR_DISABLE_MSED); - } else if (strcmp(argv[2], "-sbe") == 0) { - val &= ~ECC_ERROR_DISABLE_SBED; - } else if (strcmp(argv[2], "-mbe") == 0) { - val &= ~ECC_ERROR_DISABLE_MBED; - } else if (strcmp(argv[2], "-mse") == 0) { - val &= ~ECC_ERROR_DISABLE_MSED; - } else if (strcmp(argv[2], "-all") == 0) { - val &= ~(ECC_ERROR_DISABLE_SBED | - ECC_ERROR_DISABLE_MBED | - ECC_ERROR_DISABLE_MSED); - } else { - printf("Incorrect err_disable field\n"); - return 1; - } - - ddr->err_disable = val; - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("isync"); - return 0; - } else if (strcmp(argv[1], "errdetectclr") == 0) { - val = ddr->err_detect; - - if (strcmp(argv[2], "mme") == 0) { - val |= ECC_ERROR_DETECT_MME; - } else if (strcmp(argv[2], "sbe") == 0) { - val |= ECC_ERROR_DETECT_SBE; - } else if (strcmp(argv[2], "mbe") == 0) { - val |= ECC_ERROR_DETECT_MBE; - } else if (strcmp(argv[2], "mse") == 0) { - val |= ECC_ERROR_DETECT_MSE; - } else if (strcmp(argv[2], "all") == 0) { - val |= (ECC_ERROR_DETECT_MME | - ECC_ERROR_DETECT_MBE | - ECC_ERROR_DETECT_SBE | - ECC_ERROR_DETECT_MSE); - } else { - printf("Incorrect err_detect field\n"); - return 1; - } - - ddr->err_detect = val; - return 0; - } else if (strcmp(argv[1], "injectdatahi") == 0) { - val = simple_strtoul(argv[2], NULL, 16); - - ddr->data_err_inject_hi = val; - return 0; - } else if (strcmp(argv[1], "injectdatalo") == 0) { - val = simple_strtoul(argv[2], NULL, 16); - - ddr->data_err_inject_lo = val; - return 0; - } else if (strcmp(argv[1], "injectecc") == 0) { - val = simple_strtoul(argv[2], NULL, 16); - if (val > 0xff) { - printf("Incorrect ECC inject mask, should be 0x00..0xff\n"); - return 1; - } - val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM); - - ddr->ecc_err_inject = val; - return 0; - } else if (strcmp(argv[1], "inject") == 0) { - val = ddr->ecc_err_inject; - - if (strcmp(argv[2], "en") == 0) - val |= ECC_ERR_INJECT_EIEN; - else if (strcmp(argv[2], "dis") == 0) - val &= ~ECC_ERR_INJECT_EIEN; - else - printf("Incorrect command\n"); - - ddr->ecc_err_inject = val; - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("isync"); - return 0; - } else if (strcmp(argv[1], "mirror") == 0) { - val = ddr->ecc_err_inject; - - if (strcmp(argv[2], "en") == 0) - val |= ECC_ERR_INJECT_EMB; - else if (strcmp(argv[2], "dis") == 0) - val &= ~ECC_ERR_INJECT_EMB; - else - printf("Incorrect command\n"); - - ddr->ecc_err_inject = val; - return 0; - } - } - - if (argc == 4) { - if (strcmp(argv[1], "test") == 0) { - addr = (u64 *)simple_strtoul(argv[2], NULL, 16); - count = simple_strtoul(argv[3], NULL, 16); - - if ((u32)addr % 8) { - printf("Address not alligned on double word boundary\n"); - return 1; - } - - disable_interrupts(); - icache_disable(); - - for (i = addr; i < addr + count; i++) { - /* enable injects */ - ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("isync"); - - /* write memory location injecting errors */ - *i = 0x1122334455667788ULL; - __asm__ __volatile__ ("sync"); - - /* disable injects */ - ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("isync"); - - /* read data, this generates ECC error */ - val64 = *i; - __asm__ __volatile__ ("sync"); - - /* disable errors for ECC */ - ddr->err_disable |= ~ECC_ERROR_ENABLE; - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("isync"); - - /* re-initialize memory, write the location again - * NOT injecting errors this time */ - *i = 0xcafecafecafecafeULL; - __asm__ __volatile__ ("sync"); - - /* enable errors for ECC */ - ddr->err_disable &= ECC_ERROR_ENABLE; - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("isync"); - } - - icache_enable(); - enable_interrupts(); - - return 0; - } - } - - printf ("Usage:\n%s\n", cmdtp->usage); - return 1; -} - -U_BOOT_CMD( - ecc, 4, 0, do_ecc, - "ecc - support for DDR ECC features\n", - "status - print out status info\n" - "ecc captureclear - clear capture regs data\n" - "ecc sbecnt <val> - set Single-Bit Error counter\n" - "ecc sbethr <val> - set Single-Bit Threshold\n" - "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n" - " [-|+]sbe - Single-Bit Error\n" - " [-|+]mbe - Multiple-Bit Error\n" - " [-|+]mse - Memory Select Error\n" - " [-|+]all - all errors\n" - "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n" - " mme - Multiple Memory Errors\n" - " sbe - Single-Bit Error\n" - " mbe - Multiple-Bit Error\n" - " mse - Memory Select Error\n" - " all - all errors\n" - "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n" - "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n" - "ecc injectecc <ecc> - set ECC Error Injection Mask\n" - "ecc inject <en|dis> - enable/disable error injection\n" - "ecc mirror <en|dis> - enable/disable mirror byte\n" - "ecc test <addr> <cnt> - test mem region:\n" - " - enables injects\n" - " - writes pattern injecting errors\n" - " - disables injects\n" - " - reads pattern back, generates error\n" - " - re-inits memory" -); -#endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */ - #if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) diff --git a/board/mpc8349itx/config.mk b/board/mpc8349itx/config.mk index 1901fdc..79f1765 100644 --- a/board/mpc8349itx/config.mk +++ b/board/mpc8349itx/config.mk @@ -29,9 +29,3 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp ifndef TEXT_BASE TEXT_BASE = 0xFEF00000 endif - -ifneq ($(OBJTREE),$(SRCTREE)) -# We are building u-boot in a separate directory, use generated -# .lds script from OBJTREE directory. -LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds -endif diff --git a/board/mpc8360emds/mpc8360emds.c b/board/mpc8360emds/mpc8360emds.c index 562eb8b..3fa093d 100644 --- a/board/mpc8360emds/mpc8360emds.c +++ b/board/mpc8360emds/mpc8360emds.c @@ -1,8 +1,6 @@ /* * Copyright (C) 2006 Freescale Semiconductor, Inc. - * * Dave Liu <daveliu@freescale.com> - * based on board/mpc8349emds/mpc8349emds.c * * See file CREDITS for list of people who contributed to this * project. @@ -19,7 +17,6 @@ #include <i2c.h> #include <spd.h> #include <miiphy.h> -#include <command.h> #if defined(CONFIG_PCI) #include <pci.h> #endif @@ -30,8 +27,7 @@ #endif #if defined(CONFIG_OF_FLAT_TREE) #include <ft_build.h> -#endif -#if defined(CONFIG_OF_LIBFDT) +#elif defined(CONFIG_OF_LIBFDT) #include <libfdt.h> #include <libfdt_env.h> #endif @@ -103,7 +99,9 @@ int board_early_init_f(void) /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */ if (immr->sysconf.spridr == SPR_8360_REV20 || - immr->sysconf.spridr == SPR_8360E_REV20) + immr->sysconf.spridr == SPR_8360E_REV20 || + immr->sysconf.spridr == SPR_8360_REV21 || + immr->sysconf.spridr == SPR_8360E_REV21) bcsr[0xe] = 0x30; return 0; @@ -287,381 +285,6 @@ void sdram_init(void) } #endif -#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) -/* - * ECC user commands - */ -void ecc_print_status(void) -{ - volatile immap_t *immap = (immap_t *) CFG_IMMR; - volatile ddr83xx_t *ddr = &immap->ddr; - - printf("\nECC mode: %s\n\n", - (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF"); - - /* Interrupts */ - printf("Memory Error Interrupt Enable:\n"); - printf(" Multiple-Bit Error Interrupt Enable: %d\n", - (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0); - printf(" Single-Bit Error Interrupt Enable: %d\n", - (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0); - printf(" Memory Select Error Interrupt Enable: %d\n\n", - (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0); - - /* Error disable */ - printf("Memory Error Disable:\n"); - printf(" Multiple-Bit Error Disable: %d\n", - (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0); - printf(" Sinle-Bit Error Disable: %d\n", - (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0); - printf(" Memory Select Error Disable: %d\n\n", - (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0); - - /* Error injection */ - printf("Memory Data Path Error Injection Mask High/Low: %08lx %08lx\n", - ddr->data_err_inject_hi, ddr->data_err_inject_lo); - - printf("Memory Data Path Error Injection Mask ECC:\n"); - printf(" ECC Mirror Byte: %d\n", - (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0); - printf(" ECC Injection Enable: %d\n", - (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0); - printf(" ECC Error Injection Mask: 0x%02x\n\n", - ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM); - - /* SBE counter/threshold */ - printf("Memory Single-Bit Error Management (0..255):\n"); - printf(" Single-Bit Error Threshold: %d\n", - (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT); - printf(" Single-Bit Error Counter: %d\n\n", - (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT); - - /* Error detect */ - printf("Memory Error Detect:\n"); - printf(" Multiple Memory Errors: %d\n", - (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0); - printf(" Multiple-Bit Error: %d\n", - (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0); - printf(" Single-Bit Error: %d\n", - (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0); - printf(" Memory Select Error: %d\n\n", - (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0); - - /* Capture data */ - printf("Memory Error Address Capture: 0x%08lx\n", ddr->capture_address); - printf("Memory Data Path Read Capture High/Low: %08lx %08lx\n", - ddr->capture_data_hi, ddr->capture_data_lo); - printf("Memory Data Path Read Capture ECC: 0x%02x\n\n", - ddr->capture_ecc & CAPTURE_ECC_ECE); - - printf("Memory Error Attributes Capture:\n"); - printf(" Data Beat Number: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> - ECC_CAPT_ATTR_BNUM_SHIFT); - printf(" Transaction Size: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> - ECC_CAPT_ATTR_TSIZ_SHIFT); - printf(" Transaction Source: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> - ECC_CAPT_ATTR_TSRC_SHIFT); - printf(" Transaction Type: %d\n", - (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> - ECC_CAPT_ATTR_TTYP_SHIFT); - printf(" Error Information Valid: %d\n\n", - ddr->capture_attributes & ECC_CAPT_ATTR_VLD); -} - -int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -{ - volatile immap_t *immap = (immap_t *) CFG_IMMR; - volatile ddr83xx_t *ddr = &immap->ddr; - volatile u32 val; - u64 *addr; - u32 count; - register u64 *i; - u32 ret[2]; - u32 pattern[2]; - u32 writeback[2]; - - /* The pattern is written into memory to generate error */ - pattern[0] = 0xfedcba98UL; - pattern[1] = 0x76543210UL; - - /* After injecting error, re-initialize the memory with the value */ - writeback[0] = 0x01234567UL; - writeback[1] = 0x89abcdefUL; - - if (argc > 4) { - printf("Usage:\n%s\n", cmdtp->usage); - return 1; - } - - if (argc == 2) { - if (strcmp(argv[1], "status") == 0) { - ecc_print_status(); - return 0; - } else if (strcmp(argv[1], "captureclear") == 0) { - ddr->capture_address = 0; - ddr->capture_data_hi = 0; - ddr->capture_data_lo = 0; - ddr->capture_ecc = 0; - ddr->capture_attributes = 0; - return 0; - } - } - if (argc == 3) { - if (strcmp(argv[1], "sbecnt") == 0) { - val = simple_strtoul(argv[2], NULL, 10); - if (val > 255) { - printf("Incorrect Counter value, " - "should be 0..255\n"); - return 1; - } - - val = (val << ECC_ERROR_MAN_SBEC_SHIFT); - val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET); - - ddr->err_sbe = val; - return 0; - } else if (strcmp(argv[1], "sbethr") == 0) { - val = simple_strtoul(argv[2], NULL, 10); - if (val > 255) { - printf("Incorrect Counter value, " - "should be 0..255\n"); - return 1; - } - - val = (val << ECC_ERROR_MAN_SBET_SHIFT); - val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC); - - ddr->err_sbe = val; - return 0; - } else if (strcmp(argv[1], "errdisable") == 0) { - val = ddr->err_disable; - - if (strcmp(argv[2], "+sbe") == 0) { - val |= ECC_ERROR_DISABLE_SBED; - } else if (strcmp(argv[2], "+mbe") == 0) { - val |= ECC_ERROR_DISABLE_MBED; - } else if (strcmp(argv[2], "+mse") == 0) { - val |= ECC_ERROR_DISABLE_MSED; - } else if (strcmp(argv[2], "+all") == 0) { - val |= (ECC_ERROR_DISABLE_SBED | - ECC_ERROR_DISABLE_MBED | - ECC_ERROR_DISABLE_MSED); - } else if (strcmp(argv[2], "-sbe") == 0) { - val &= ~ECC_ERROR_DISABLE_SBED; - } else if (strcmp(argv[2], "-mbe") == 0) { - val &= ~ECC_ERROR_DISABLE_MBED; - } else if (strcmp(argv[2], "-mse") == 0) { - val &= ~ECC_ERROR_DISABLE_MSED; - } else if (strcmp(argv[2], "-all") == 0) { - val &= ~(ECC_ERROR_DISABLE_SBED | - ECC_ERROR_DISABLE_MBED | - ECC_ERROR_DISABLE_MSED); - } else { - printf("Incorrect err_disable field\n"); - return 1; - } - - ddr->err_disable = val; - __asm__ __volatile__("sync"); - __asm__ __volatile__("isync"); - return 0; - } else if (strcmp(argv[1], "errdetectclr") == 0) { - val = ddr->err_detect; - - if (strcmp(argv[2], "mme") == 0) { - val |= ECC_ERROR_DETECT_MME; - } else if (strcmp(argv[2], "sbe") == 0) { - val |= ECC_ERROR_DETECT_SBE; - } else if (strcmp(argv[2], "mbe") == 0) { - val |= ECC_ERROR_DETECT_MBE; - } else if (strcmp(argv[2], "mse") == 0) { - val |= ECC_ERROR_DETECT_MSE; - } else if (strcmp(argv[2], "all") == 0) { - val |= (ECC_ERROR_DETECT_MME | - ECC_ERROR_DETECT_MBE | - ECC_ERROR_DETECT_SBE | - ECC_ERROR_DETECT_MSE); - } else { - printf("Incorrect err_detect field\n"); - return 1; - } - - ddr->err_detect = val; - return 0; - } else if (strcmp(argv[1], "injectdatahi") == 0) { - val = simple_strtoul(argv[2], NULL, 16); - - ddr->data_err_inject_hi = val; - return 0; - } else if (strcmp(argv[1], "injectdatalo") == 0) { - val = simple_strtoul(argv[2], NULL, 16); - - ddr->data_err_inject_lo = val; - return 0; - } else if (strcmp(argv[1], "injectecc") == 0) { - val = simple_strtoul(argv[2], NULL, 16); - if (val > 0xff) { - printf("Incorrect ECC inject mask, " - "should be 0x00..0xff\n"); - return 1; - } - val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM); - - ddr->ecc_err_inject = val; - return 0; - } else if (strcmp(argv[1], "inject") == 0) { - val = ddr->ecc_err_inject; - - if (strcmp(argv[2], "en") == 0) - val |= ECC_ERR_INJECT_EIEN; - else if (strcmp(argv[2], "dis") == 0) - val &= ~ECC_ERR_INJECT_EIEN; - else - printf("Incorrect command\n"); - - ddr->ecc_err_inject = val; - __asm__ __volatile__("sync"); - __asm__ __volatile__("isync"); - return 0; - } else if (strcmp(argv[1], "mirror") == 0) { - val = ddr->ecc_err_inject; - - if (strcmp(argv[2], "en") == 0) - val |= ECC_ERR_INJECT_EMB; - else if (strcmp(argv[2], "dis") == 0) - val &= ~ECC_ERR_INJECT_EMB; - else - printf("Incorrect command\n"); - - ddr->ecc_err_inject = val; - return 0; - } - } - if (argc == 4) { - if (strcmp(argv[1], "testdw") == 0) { - addr = (u64 *) simple_strtoul(argv[2], NULL, 16); - count = simple_strtoul(argv[3], NULL, 16); - - if ((u32) addr % 8) { - printf("Address not alligned on " - "double word boundary\n"); - return 1; - } - disable_interrupts(); - - for (i = addr; i < addr + count; i++) { - - /* enable injects */ - ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; - __asm__ __volatile__("sync"); - __asm__ __volatile__("isync"); - - /* write memory location injecting errors */ - ppcDWstore((u32 *) i, pattern); - __asm__ __volatile__("sync"); - - /* disable injects */ - ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; - __asm__ __volatile__("sync"); - __asm__ __volatile__("isync"); - - /* read data, this generates ECC error */ - ppcDWload((u32 *) i, ret); - __asm__ __volatile__("sync"); - - /* re-initialize memory, double word write the location again, - * generates new ECC code this time */ - ppcDWstore((u32 *) i, writeback); - __asm__ __volatile__("sync"); - } - enable_interrupts(); - return 0; - } - if (strcmp(argv[1], "testword") == 0) { - addr = (u64 *) simple_strtoul(argv[2], NULL, 16); - count = simple_strtoul(argv[3], NULL, 16); - - if ((u32) addr % 8) { - printf("Address not alligned on " - "double word boundary\n"); - return 1; - } - disable_interrupts(); - - for (i = addr; i < addr + count; i++) { - - /* enable injects */ - ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; - __asm__ __volatile__("sync"); - __asm__ __volatile__("isync"); - - /* write memory location injecting errors */ - *(u32 *) i = 0xfedcba98UL; - __asm__ __volatile__("sync"); - - /* sub double word write, - * bus will read-modify-write, - * generates ECC error */ - *((u32 *) i + 1) = 0x76543210UL; - __asm__ __volatile__("sync"); - - /* disable injects */ - ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; - __asm__ __volatile__("sync"); - __asm__ __volatile__("isync"); - - /* re-initialize memory, - * double word write the location again, - * generates new ECC code this time */ - ppcDWstore((u32 *) i, writeback); - __asm__ __volatile__("sync"); - } - enable_interrupts(); - return 0; - } - } - printf("Usage:\n%s\n", cmdtp->usage); - return 1; -} - -U_BOOT_CMD(ecc, 4, 0, do_ecc, - "ecc - support for DDR ECC features\n", - "status - print out status info\n" - "ecc captureclear - clear capture regs data\n" - "ecc sbecnt <val> - set Single-Bit Error counter\n" - "ecc sbethr <val> - set Single-Bit Threshold\n" - "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n" - " [-|+]sbe - Single-Bit Error\n" - " [-|+]mbe - Multiple-Bit Error\n" - " [-|+]mse - Memory Select Error\n" - " [-|+]all - all errors\n" - "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n" - " mme - Multiple Memory Errors\n" - " sbe - Single-Bit Error\n" - " mbe - Multiple-Bit Error\n" - " mse - Memory Select Error\n" - " all - all errors\n" - "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n" - "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n" - "ecc injectecc <ecc> - set ECC Error Injection Mask\n" - "ecc inject <en|dis> - enable/disable error injection\n" - "ecc mirror <en|dis> - enable/disable mirror byte\n" - "ecc testdw <addr> <cnt> - test mem region with double word access:\n" - " - enables injects\n" - " - writes pattern injecting errors with double word access\n" - " - disables injects\n" - " - reads pattern back with double word access, generates error\n" - " - re-inits memory\n" - "ecc testword <addr> <cnt> - test mem region with word access:\n" - " - enables injects\n" - " - writes pattern injecting errors with word access\n" - " - writes pattern with word access, generates error\n" - " - disables injects\n" " - re-inits memory"); -#endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */ - #if (defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)) \ && defined(CONFIG_OF_BOARD_SETUP) @@ -681,11 +304,11 @@ ft_board_setup(void *blob, bd_t *bd) int nodeoffset; int tmp[2]; - nodeoffset = fdt_path_offset (fdt, "/memory"); + nodeoffset = fdt_find_node_by_path(blob, "/memory"); if (nodeoffset >= 0) { tmp[0] = cpu_to_be32(bd->bi_memstart); tmp[1] = cpu_to_be32(bd->bi_memsize); - fdt_setprop(fdt, nodeoffset, "reg", tmp, sizeof(tmp)); + fdt_setprop(blob, nodeoffset, "reg", tmp, sizeof(tmp)); } #else u32 *p; diff --git a/board/mpc8360emds/pci.c b/board/mpc8360emds/pci.c index 158effe..8f90471 100644 --- a/board/mpc8360emds/pci.c +++ b/board/mpc8360emds/pci.c @@ -20,8 +20,7 @@ #include <i2c.h> #if defined(CONFIG_OF_FLAT_TREE) #include <ft_build.h> -#endif -#if defined(CONFIG_OF_LIBFDT) +#elif defined(CONFIG_OF_LIBFDT) #include <libfdt.h> #include <libfdt_env.h> #endif @@ -207,7 +206,7 @@ void pci_init_board(void) /* Switch temporarily to I2C bus #2 */ orig_i2c_bus = i2c_get_bus_num(); - i2c_set_bus_num(1); + i2c_set_bus_num(1); val8 = 0; i2c_write(0x23, 0x6, 1, &val8, 1); @@ -311,26 +310,25 @@ ft_pci_setup(void *blob, bd_t *bd) int err; int tmp[2]; - nodeoffset = fdt_path_offset (fdt, "/" OF_SOC "/pci@8500"); + nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500"); if (nodeoffset >= 0) { tmp[0] = cpu_to_be32(hose[0].first_busno); tmp[1] = cpu_to_be32(hose[0].last_busno); - err = fdt_setprop(fdt, nodeoffset, "bus-range", tmp, sizeof(tmp)); + err = fdt_setprop(blob, nodeoffset, "bus-range", tmp, sizeof(tmp)); } } -#endif /* CONFIG_OF_LIBFDT */ -#ifdef CONFIG_OF_FLAT_TREE +#elif defined(CONFIG_OF_FLAT_TREE) void ft_pci_setup(void *blob, bd_t *bd) { - u32 *p; - int len; + u32 *p; + int len; - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len); - if (p != NULL) { + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len); + if (p != NULL) { p[0] = hose[0].first_busno; p[1] = hose[0].last_busno; - } + } } #endif /* CONFIG_OF_FLAT_TREE */ #endif /* CONFIG_PCI */ |