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-rw-r--r--board/freescale/b4860qds/ddr.c4
-rw-r--r--board/freescale/corenet_ds/ddr.c6
2 files changed, 5 insertions, 5 deletions
diff --git a/board/freescale/b4860qds/ddr.c b/board/freescale/b4860qds/ddr.c
index 3885acc..99cd884 100644
--- a/board/freescale/b4860qds/ddr.c
+++ b/board/freescale/b4860qds/ddr.c
@@ -213,7 +213,7 @@ unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
debug("rank density is 0x%llx, ctlr density is 0x%llx\n",
rank_density, ctlr_density);
- for (i = CONFIG_NUM_DDR_CONTROLLERS - 1; i >= 0; i--) {
+ for (i = CONFIG_SYS_NUM_DDR_CTLRS - 1; i >= 0; i--) {
switch (pinfo->memctl_opts[i].memctl_interleaving_mode) {
case FSL_DDR_CACHE_LINE_INTERLEAVING:
case FSL_DDR_PAGE_INTERLEAVING:
@@ -237,7 +237,7 @@ unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo,
* Simple linear assignment if memory
* controllers are not interleaved.
*/
- for (i = CONFIG_NUM_DDR_CONTROLLERS - 1; i >= 0; i--) {
+ for (i = CONFIG_SYS_NUM_DDR_CTLRS - 1; i >= 0; i--) {
total_ctlr_mem = 0;
pinfo->common_timing_params[i].base_address =
current_mem_base;
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index f3ba41a..9c1a4c2 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
* Fixed sdram init -- doesn't use serial presence detect.
*/
extern fixed_ddr_parm_t fixed_ddr_parm_0[];
-#if (CONFIG_NUM_DDR_CONTROLLERS == 2)
+#if (CONFIG_SYS_NUM_DDR_CTLRS == 2)
extern fixed_ddr_parm_t fixed_ddr_parm_1[];
#endif
@@ -56,7 +56,7 @@ phys_size_t fixed_sdram(void)
ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN;
fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0);
-#if (CONFIG_NUM_DDR_CONTROLLERS == 2)
+#if (CONFIG_SYS_NUM_DDR_CTLRS == 2)
memcpy(&ddr_cfg_regs,
fixed_ddr_parm_1[i].ddr_settings,
sizeof(ddr_cfg_regs));
@@ -76,7 +76,7 @@ phys_size_t fixed_sdram(void)
return 0;
}
} else {
-#if (CONFIG_NUM_DDR_CONTROLLERS == 2)
+#if (CONFIG_SYS_NUM_DDR_CTLRS == 2)
/* We require both controllers have identical DIMMs */
lawbar1_target_id = LAW_TRGT_IF_DDR_1;
if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE,