diff options
Diffstat (limited to 'board')
149 files changed, 2178 insertions, 2835 deletions
diff --git a/board/BuS/EB+MCF-EV123/flash.c b/board/BuS/EB+MCF-EV123/flash.c index 3c36367..8b7f957 100644 --- a/board/BuS/EB+MCF-EV123/flash.c +++ b/board/BuS/EB+MCF-EV123/flash.c @@ -157,6 +157,7 @@ int amd_flash_erase_sector(flash_info_t * info, int sector) { int state; ulong result; + ulong start; volatile u16 *addr = (volatile u16 *) (info->start[sector]); @@ -171,13 +172,13 @@ int amd_flash_erase_sector(flash_info_t * info, int sector) /* wait until flash is ready */ state = 0; - set_timer (0); + start = get_timer(0); do { result = *addr; /* check timeout */ - if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; state = ERR_TIMOUT; } @@ -267,6 +268,7 @@ volatile static int amd_write_word (flash_info_t * info, ulong dest, u16 data) ulong result; int cflag, iflag; int state; + ulong start; /* * Check if Flash is (sufficiently) erased @@ -295,7 +297,7 @@ volatile static int amd_write_word (flash_info_t * info, ulong dest, u16 data) *addr = data; /* arm simple, non interrupt dependent timer */ - set_timer (0); + start = get_timer(0); /* wait until flash is ready */ state = 0; @@ -303,7 +305,7 @@ volatile static int amd_write_word (flash_info_t * info, ulong dest, u16 data) result = *addr; /* check timeout */ - if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { state = ERR_TIMOUT; } if (!state && ((result & BIT_RDY_MASK) == (data & BIT_RDY_MASK))) diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index a918b04..856d798 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -141,7 +141,7 @@ void reset_phy(void) int dram_init(void) { - gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); return 0; } diff --git a/board/Marvell/common/bootseq.txt b/board/Marvell/common/bootseq.txt index e4fefb3..6cae9ea 100644 --- a/board/Marvell/common/bootseq.txt +++ b/board/Marvell/common/bootseq.txt @@ -62,7 +62,7 @@ in_flash: remap gt regs? map PCI mem/io map device space - clear out interupts + clear out interrupts init_timebase env_init serial_init diff --git a/board/Marvell/common/i2c.c b/board/Marvell/common/i2c.c index 8d87b2d..d53495c 100644 --- a/board/Marvell/common/i2c.c +++ b/board/Marvell/common/i2c.c @@ -420,7 +420,7 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, status = i2c_get_data (data, len); if (status) { #ifdef DEBUG_I2C - printf ("Data not recieved: 0x%02x\n", status); + printf ("Data not received: 0x%02x\n", status); #endif return status; } diff --git a/board/Marvell/common/ns16550.h b/board/Marvell/common/ns16550.h index 0a2951b..9306381 100644 --- a/board/Marvell/common/ns16550.h +++ b/board/Marvell/common/ns16550.h @@ -51,7 +51,7 @@ struct NS16550 #define dlm ier #define FCR_FIFO_EN 0x01 /*fifo enable*/ -#define FCR_RXSR 0x02 /*reciever soft reset*/ +#define FCR_RXSR 0x02 /*receiver soft reset*/ #define FCR_TXSR 0x04 /*transmitter soft reset*/ diff --git a/board/Marvell/include/mv_gen_reg.h b/board/Marvell/include/mv_gen_reg.h index 5e4f076..03fcd88 100644 --- a/board/Marvell/include/mv_gen_reg.h +++ b/board/Marvell/include/mv_gen_reg.h @@ -2237,7 +2237,7 @@ #define CHANNEL2_REGISTER10 0x9070 #define CHANNEL2_REGISTER11 0x9074 -/* MPSCs Interupts */ +/* MPSCs Interrupts */ #define MPSC0_CAUSE 0xb824 #define MPSC0_MASK 0xb8a4 diff --git a/board/armadillo/flash.c b/board/armadillo/flash.c index cdbbfd0..cf7d7f6 100644 --- a/board/armadillo/flash.c +++ b/board/armadillo/flash.c @@ -162,6 +162,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int rc = ERR_OK; unsigned long base; unsigned long addr; + ulong start; if ((info->flash_id & FLASH_VENDMASK) != (FUJ_MANUFACT & FLASH_VENDMASK)) { @@ -192,7 +193,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { /* ARM simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ @@ -232,6 +233,7 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) { int flag; unsigned long base; + ulong start; /* Check if Flash is (sufficiently) erased */ @@ -250,7 +252,7 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) flag = disable_interrupts (); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); base = dest & 0xF0000000; FL_WORD (base + (0x555 << 1)) = 0xAA; diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c index 7562ffa..f10a026 100644 --- a/board/armltd/integrator/timer.c +++ b/board/armltd/integrator/timer.c @@ -95,7 +95,10 @@ int timer_init (void) /* init the timestamp */ total_count = 0ULL; - reset_timer_masked(); + /* capure current decrementer value */ + lastdec = READ_TIMER; + /* start "advancing" time stamp from 0 */ + timestamp = 0L; div_timer = CONFIG_SYS_HZ_CLOCK; do_div(div_timer, CONFIG_SYS_HZ); @@ -107,22 +110,11 @@ int timer_init (void) /* * timer without interrupts */ -void reset_timer (void) -{ - reset_timer_masked (); -} - ulong get_timer (ulong base_ticks) { return get_timer_masked () - base_ticks; } -void set_timer (ulong ticks) -{ - timestamp = ticks; - total_count = ticks * div_timer; -} - /* delay usec useconds */ void __udelay (unsigned long usec) { @@ -140,14 +132,6 @@ void __udelay (unsigned long usec) } } -void reset_timer_masked (void) -{ - /* capure current decrementer value */ - lastdec = READ_TIMER; - /* start "advancing" time stamp from 0 */ - timestamp = 0L; -} - /* converts the timer reading to U-Boot ticks */ /* the timestamp is the number of ticks since reset */ ulong get_timer_masked (void) diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c b/board/armltd/vexpress/ca9x4_ct_vxp.c index 6e5884b..da6f14d 100644 --- a/board/armltd/vexpress/ca9x4_ct_vxp.c +++ b/board/armltd/vexpress/ca9x4_ct_vxp.c @@ -199,11 +199,6 @@ void reset_timer_masked(void) timestamp = 0; } -void reset_timer(void) -{ - reset_timer_masked(); -} - ulong get_timer_masked(void) { ulong now = readl(&systimer_base->timer0value) / 1000; diff --git a/board/atmel/at91rm9200dk/flash.c b/board/atmel/at91rm9200dk/flash.c index 902c3c4..be22743 100644 --- a/board/atmel/at91rm9200dk/flash.c +++ b/board/atmel/at91rm9200dk/flash.c @@ -285,6 +285,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int iflag, cflag, prot, sect; int rc = ERR_OK; int chip1; + ulong start; /* first look for protection bits */ @@ -325,7 +326,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ volatile u16 *addr = (volatile u16 *) (info->start[sect]); @@ -345,7 +346,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) result = *addr; /* check timeout */ - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; chip1 = TMO; break; @@ -400,6 +401,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) int rc = ERR_OK; int cflag, iflag; int chip1; + ulong start; /* * Check if Flash is (sufficiently) erased @@ -425,7 +427,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait until flash is ready */ chip1 = 0; @@ -433,7 +435,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) result = *addr; /* check timeout */ - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { chip1 = ERR | TMO; break; } diff --git a/board/atmel/at91rm9200ek/at91rm9200ek.c b/board/atmel/at91rm9200ek/at91rm9200ek.c index ec0daba..2b4d845 100644 --- a/board/atmel/at91rm9200ek/at91rm9200ek.c +++ b/board/atmel/at91rm9200ek/at91rm9200ek.c @@ -64,7 +64,7 @@ int board_early_init_f(void) int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); return 0; } diff --git a/board/bmw/ns16550.h b/board/bmw/ns16550.h index 8aa251d..2087a4a 100644 --- a/board/bmw/ns16550.h +++ b/board/bmw/ns16550.h @@ -37,7 +37,7 @@ struct NS16550 { #define afr iirfcrafr #define FCR_FIFO_EN 0x01 /*fifo enable */ -#define FCR_RXSR 0x02 /*reciever soft reset */ +#define FCR_RXSR 0x02 /*receiver soft reset */ #define FCR_TXSR 0x04 /*transmitter soft reset */ #define FCR_DMS 0x08 /* DMA Mode Select */ diff --git a/board/cerf250/flash.c b/board/cerf250/flash.c index a4b201e..e1e7807 100644 --- a/board/cerf250/flash.c +++ b/board/cerf250/flash.c @@ -221,7 +221,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -254,9 +254,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -269,14 +266,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050; /* clear status register */ *addr = (FPW) 0x00200020; /* erase setup */ *addr = (FPW) 0x00D000D0; /* erase confirm */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW) 0x00B000B0; /* suspend erase */ *addr = (FPW) 0x00FF00FF; /* reset to read mode */ @@ -393,6 +390,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -406,11 +404,11 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/cm4008/flash.c b/board/cm4008/flash.c index 2e66872..d6fd519 100644 --- a/board/cm4008/flash.c +++ b/board/cm4008/flash.c @@ -209,6 +209,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int flag, prot, sect; ulong type; int rcode = 0; + ulong start; if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { @@ -250,7 +251,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); addr = (volatile unsigned char *) (info->start[sect]); *addr = 0x50; /* clear status register */ @@ -258,7 +259,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *addr = 0xD0; /* erase confirm */ while (((status = *addr) & 0x80) != 0x80) { - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = 0xB0; /* suspend erase */ @@ -370,6 +371,7 @@ static int write_data (flash_info_t * info, ulong dest, unsigned char data) volatile unsigned char *addr = (volatile unsigned char *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -384,11 +386,11 @@ static int write_data (flash_info_t * info, ulong dest, unsigned char data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & 0x80) != 0x80) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = 0xFF; /* restore read mode */ return (1); } diff --git a/board/cm41xx/flash.c b/board/cm41xx/flash.c index 2e66872..d6fd519 100644 --- a/board/cm41xx/flash.c +++ b/board/cm41xx/flash.c @@ -209,6 +209,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int flag, prot, sect; ulong type; int rcode = 0; + ulong start; if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { @@ -250,7 +251,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); addr = (volatile unsigned char *) (info->start[sect]); *addr = 0x50; /* clear status register */ @@ -258,7 +259,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *addr = 0xD0; /* erase confirm */ while (((status = *addr) & 0x80) != 0x80) { - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = 0xB0; /* suspend erase */ @@ -370,6 +371,7 @@ static int write_data (flash_info_t * info, ulong dest, unsigned char data) volatile unsigned char *addr = (volatile unsigned char *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -384,11 +386,11 @@ static int write_data (flash_info_t * info, ulong dest, unsigned char data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & 0x80) != 0x80) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = 0xFF; /* restore read mode */ return (1); } diff --git a/board/cmc_pu2/flash.c b/board/cmc_pu2/flash.c index d832e62..d10faab 100644 --- a/board/cmc_pu2/flash.c +++ b/board/cmc_pu2/flash.c @@ -264,7 +264,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) { vu_short *addr = (vu_short *)(info->start[0]); int flag, prot, sect, ssect, l_sect; - ulong now, last; + ulong now, last, start; debug ("flash_erase: first: %d last: %d\n", s_first, s_last); @@ -335,11 +335,11 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) if (l_sect < 0) goto DONE; - reset_timer_masked (); + start = get_timer(0); last = 0; addr = (vu_short *)(info->start[l_sect]); while ((addr[0] & 0x0080) != 0x0080) { - if ((now = get_timer_masked ()) > CONFIG_SYS_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } @@ -434,6 +434,7 @@ static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data) { int flag; vu_short *base; /* first address in flash bank */ + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*dest & data) != data) { @@ -455,11 +456,11 @@ static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data) if (flag) enable_interrupts(); - reset_timer_masked (); + start = get_timer(0); /* data polling for D7 */ while ((*dest & 0x0080) != (data & 0x0080)) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *dest = 0x00F0; /* reset bank */ return (1); } diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c index 33c9361..e8f02eb 100644 --- a/board/cobra5272/flash.c +++ b/board/cobra5272/flash.c @@ -147,6 +147,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int iflag, cflag, prot, sect; int rc = ERR_OK; int chip1; + ulong start; /* first look for protection bits */ @@ -190,7 +191,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - set_timer (0); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ volatile u16 *addr = @@ -211,7 +212,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) result = *addr; /* check timeout */ - if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; chip1 = TMO; break; @@ -264,6 +265,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) int rc = ERR_OK; int cflag, iflag; int chip1; + ulong start; /* * Check if Flash is (sufficiently) erased @@ -291,7 +293,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - set_timer (0); + start = get_timer(0); /* wait until flash is ready */ chip1 = 0; @@ -299,7 +301,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) result = *addr; /* check timeout */ - if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { chip1 = ERR | TMO; break; } diff --git a/board/cradle/flash.c b/board/cradle/flash.c index b5635fb..1601782 100644 --- a/board/cradle/flash.c +++ b/board/cradle/flash.c @@ -136,6 +136,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; int rc = ERR_OK; + ulong start; if (info->flash_id == FLASH_UNKNOWN) return ERR_UNKNOWN_FLASH_TYPE; @@ -173,7 +174,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ vu_short *addr = (vu_short *) (info->start[sect]); @@ -182,7 +183,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *addr = 0xD0; /* erase confirm */ while ((*addr & 0x80) != 0x80) { - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = 0xB0; /* suspend erase */ *addr = 0xFF; /* reset to read mode */ @@ -221,6 +222,7 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) vu_short *addr = (vu_short *) dest, val; int rc = ERR_OK; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ @@ -246,11 +248,11 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((val = *addr) & 0x80) != 0x80) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { rc = ERR_TIMOUT; /* suspend program command */ *addr = 0xB0; diff --git a/board/csb226/flash.c b/board/csb226/flash.c index 02ded1c..e103470 100644 --- a/board/csb226/flash.c +++ b/board/csb226/flash.c @@ -141,6 +141,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; int rc = ERR_OK; + ulong start; if (info->flash_id == FLASH_UNKNOWN) return ERR_UNKNOWN_FLASH_TYPE; @@ -175,7 +176,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) printf("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ u32 * volatile addr = (u32 * volatile)(info->start[sect]); @@ -189,7 +190,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) *addr = 0x00D000D0; /* erase confirm */ while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = 0x00B000B0; /* suspend erase*/ *addr = 0x00FF00FF; /* read mode */ rc = ERR_TIMOUT; @@ -221,6 +222,7 @@ static int write_long (flash_info_t *info, ulong dest, ulong data) u32 * volatile addr = (u32 * volatile)dest, val; int rc = ERR_OK; int flag; + ulong start; /* read array command - just for the case... */ *addr = 0x00FF00FF; @@ -247,11 +249,11 @@ static int write_long (flash_info_t *info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); /* wait while polling the status register */ while(((val = *addr) & 0x00800080) != 0x00800080) { - if (get_timer_masked() > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { rc = ERR_TIMOUT; /* suspend program command */ *addr = 0x00B000B0; diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index b1238d5..ec22627 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -44,7 +44,7 @@ void hw_watchdog_reset(void) int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index 2bfdf23..6103339 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -38,7 +38,7 @@ int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ gd->ram_size = get_ram_size( - (volatile void *)CONFIG_SYS_SDRAM_BASE, + (void *)CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE); return 0; } diff --git a/board/dnp1110/flash.c b/board/dnp1110/flash.c index c81abc5..53f89ee 100644 --- a/board/dnp1110/flash.c +++ b/board/dnp1110/flash.c @@ -212,7 +212,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -245,9 +245,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); @@ -260,14 +257,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); *addr = (FPW)0x00500050; /* clear status register */ *addr = (FPW)0x00200020; /* erase setup */ *addr = (FPW)0x00D000D0; /* erase confirm */ while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) { - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW)0x00B000B0; /* suspend erase */ *addr = (FPW)0x00FF00FF; /* reset to read mode */ @@ -385,6 +382,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) FPWV *addr = (FPWV *)dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -398,11 +396,11 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) { - if (get_timer_masked() > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (start = get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW)0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c index 16be532..4b36918 100644 --- a/board/efikamx/efikamx.c +++ b/board/efikamx/efikamx.c @@ -113,7 +113,7 @@ u32 get_board_rev(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/ep7312/flash.c b/board/ep7312/flash.c index 0c2b3ae..2ed9c9a 100644 --- a/board/ep7312/flash.c +++ b/board/ep7312/flash.c @@ -119,6 +119,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; int rc = ERR_OK; + ulong start; if (info->flash_id == FLASH_UNKNOWN) return ERR_UNKNOWN_FLASH_TYPE; @@ -156,7 +157,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ vu_short *addr = (vu_short *) (info->start[sect]); @@ -165,7 +166,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *addr = 0xD0; /* erase confirm */ while ((*addr & 0x80) != 0x80) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = 0xB0; /* suspend erase */ *addr = 0xFF; /* reset to read mode */ rc = ERR_TIMOUT; @@ -203,6 +204,7 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) vu_short *addr = (vu_short *) dest, val; int rc = ERR_OK; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ @@ -228,11 +230,11 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((val = *addr) & 0x80) != 0x80) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { rc = ERR_TIMOUT; /* suspend program command */ *addr = 0xB0; diff --git a/board/eukrea/cpu9260/cpu9260.c b/board/eukrea/cpu9260/cpu9260.c index 0959c5c..402f19f 100644 --- a/board/eukrea/cpu9260/cpu9260.c +++ b/board/eukrea/cpu9260/cpu9260.c @@ -174,7 +174,7 @@ int board_init(void) int dram_init(void) { - gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); return 0; } diff --git a/board/eukrea/cpuat91/cpuat91.c b/board/eukrea/cpuat91/cpuat91.c index 5d05414..f654f87 100644 --- a/board/eukrea/cpuat91/cpuat91.c +++ b/board/eukrea/cpuat91/cpuat91.c @@ -63,7 +63,7 @@ int board_early_init_f(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile long *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); return 0; } diff --git a/board/evb64260/bootseq.txt b/board/evb64260/bootseq.txt index e4fefb3..6cae9ea 100644 --- a/board/evb64260/bootseq.txt +++ b/board/evb64260/bootseq.txt @@ -62,7 +62,7 @@ in_flash: remap gt regs? map PCI mem/io map device space - clear out interupts + clear out interrupts init_timebase env_init serial_init diff --git a/board/evb64260/i2c.c b/board/evb64260/i2c.c index c62b647..88d0dac 100644 --- a/board/evb64260/i2c.c +++ b/board/evb64260/i2c.c @@ -306,7 +306,7 @@ i2c_read(uchar dev_addr, unsigned int offset, int len, uchar* data, status = i2c_get_data(data, len); if (status) { #ifdef DEBUG_I2C - printf("Data not recieved: 0x%02x\n", status); + printf("Data not received: 0x%02x\n", status); #endif return status; } diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index cf9b7b8..b1e7823 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -236,6 +236,7 @@ void ft_board_setup(void *blob, bd_t *bd) #endif fdt_fixup_liodn(blob); + fdt_fixup_dr_usb(blob, bd); } int board_eth_init(bd_t *bis) diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c index a184592..b937015 100644 --- a/board/freescale/corenet_ds/ddr.c +++ b/board/freescale/corenet_ds/ddr.c @@ -256,6 +256,6 @@ phys_size_t initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - puts(" DDR: "); + debug(" DDR: "); return dram_size; } diff --git a/board/freescale/corenet_ds/law.c b/board/freescale/corenet_ds/law.c index dd6f6f7..58f23c5 100644 --- a/board/freescale/corenet_ds/law.c +++ b/board/freescale/corenet_ds/law.c @@ -37,7 +37,8 @@ struct law_entry law_table[] = { #endif SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), #ifdef CONFIG_SYS_DCSRBAR_PHYS - SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), + /* Limit DCSR to 32M to access NPC Trace Buffer */ + SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), #endif #ifdef CONFIG_SYS_NAND_BASE_PHYS SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), diff --git a/board/freescale/mpc8266ads/mpc8266ads.c b/board/freescale/mpc8266ads/mpc8266ads.c index 66acc41..2caf4aa 100644 --- a/board/freescale/mpc8266ads/mpc8266ads.c +++ b/board/freescale/mpc8266ads/mpc8266ads.c @@ -392,7 +392,7 @@ phys_size_t initdram(int board_type) The 11th column addre will still be mucxed correctly onto the bus. Also be aware that the MPC8266ADS board Rev B has not connected - Row addres 13 to anything. + Row address 13 to anything. The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126) */ diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 4e4b7c0..8aceddb 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -145,7 +145,7 @@ initdram(int board_type) setup_ddr_bat(dram_size); - puts(" DDR: "); + debug(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index e3916fc..455569e 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -69,7 +69,7 @@ initdram(int board_type) setup_ddr_bat(dram_size); - puts(" DDR: "); + debug(" DDR: "); return dram_size; } diff --git a/board/freescale/mx31ads/mx31ads.c b/board/freescale/mx31ads/mx31ads.c index 9bf9c18..7637c92 100644 --- a/board/freescale/mx31ads/mx31ads.c +++ b/board/freescale/mx31ads/mx31ads.c @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c index 08addd2..f6e190a 100644 --- a/board/freescale/mx31pdk/mx31pdk.c +++ b/board/freescale/mx31pdk/mx31pdk.c @@ -42,7 +42,7 @@ void hw_watchdog_reset(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index e2d3d74..fd7342f 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -53,7 +53,7 @@ u32 get_board_rev(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index b51d209..134603a 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -46,8 +46,8 @@ int dram_init(void) { u32 size1, size2; - size1 = get_ram_size((volatile void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); - size2 = get_ram_size((volatile void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); gd->ram_size = size1 + size2; diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c index a89aa25..88095dc 100644 --- a/board/freescale/mx53evk/mx53evk.c +++ b/board/freescale/mx53evk/mx53evk.c @@ -46,7 +46,7 @@ u32 get_board_rev(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index d032428..18b388e 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -47,8 +47,8 @@ int dram_init(void) { u32 size1, size2; - size1 = get_ram_size((volatile void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); - size2 = get_ram_size((volatile void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); gd->ram_size = size1 + size2; diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c index f3c433f..21b5d14 100644 --- a/board/freescale/mx53smd/mx53smd.c +++ b/board/freescale/mx53smd/mx53smd.c @@ -44,8 +44,8 @@ int dram_init(void) { u32 size1, size2; - size1 = get_ram_size((volatile void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); - size2 = get_ram_size((volatile void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); gd->ram_size = size1 + size2; diff --git a/board/netstal/hcu4/Makefile b/board/freescale/p2041rdb/Makefile index a983de9..65f348f 100644 --- a/board/netstal/hcu4/Makefile +++ b/board/freescale/p2041rdb/Makefile @@ -1,6 +1,10 @@ # -# (C) Copyright 2007-2008 Netstal Maschinen AG -# Niklaus Giger (ng@netstal.com) +# Copyright 2011 Freescale Semiconductor, Inc. +# (C) Copyright 2001-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License as @@ -19,27 +23,28 @@ # include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -endif LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o \ - ../common/fixed_sdram.o \ - ../common/nm_bsp.o +COBJS-y += $(BOARD).o +COBJS-y += cpld.o +COBJS-y += ddr.o +COBJS-y += law.o +COBJS-y += tlb.o +COBJS-$(CONFIG_PCI) += pci.o -SRCS := $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) - $(call cmd_link_o_target, $^) +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS)) clean: - rm -f $(OBJS) + rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak $(obj).depend + rm -f $(LIB) core *.bak .depend ######################################################################### diff --git a/board/freescale/p2041rdb/cpld.c b/board/freescale/p2041rdb/cpld.c new file mode 100644 index 0000000..8e1f46e --- /dev/null +++ b/board/freescale/p2041rdb/cpld.c @@ -0,0 +1,171 @@ +/** + * Copyright 2011 Freescale Semiconductor + * Author: Mingkai Hu <Mingkai.hu@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This file provides support for the board-specific CPLD used on some Freescale + * reference boards. + * + * The following macros need to be defined: + * + * CPLD_BASE - The virtual address of the base of the CPLD register map + * + */ + +#include <common.h> +#include <command.h> +#include <asm/io.h> + +#include "cpld.h" + +static u8 __cpld_read(unsigned int reg) +{ + void *p = (void *)CPLD_BASE; + + return in_8(p + reg); +} +u8 cpld_read(unsigned int reg) __attribute__((weak, alias("__cpld_read"))); + +static void __cpld_write(unsigned int reg, u8 value) +{ + void *p = (void *)CPLD_BASE; + + out_8(p + reg, value); +} +void cpld_write(unsigned int reg, u8 value) + __attribute__((weak, alias("__cpld_write"))); + +/* + * Reset the board. This honors the por_cfg registers. + */ +void __cpld_reset(void) +{ + CPLD_WRITE(system_rst, 1); +} +void cpld_reset(void) __attribute__((weak, alias("__cpld_reset"))); + +/** + * Set the boot bank to the alternate bank + */ +void __cpld_set_altbank(void) +{ + CPLD_WRITE(fbank_sel, 1); +} +void cpld_set_altbank(void) + __attribute__((weak, alias("__cpld_set_altbank"))); + +/** + * Set the boot bank to the default bank + */ +void __cpld_clear_altbank(void) +{ + CPLD_WRITE(fbank_sel, 0); +} +void cpld_clear_altbank(void) + __attribute__((weak, alias("__cpld_clear_altbank"))); + +#ifdef DEBUG +static void cpld_dump_regs(void) +{ + printf("cpld_ver = 0x%02x\n", CPLD_READ(cpld_ver)); + printf("cpld_ver_sub = 0x%02x\n", CPLD_READ(cpld_ver_sub)); + printf("pcba_ver = 0x%02x\n", CPLD_READ(pcba_ver)); + printf("system_rst = 0x%02x\n", CPLD_READ(system_rst)); + printf("wd_cfg = 0x%02x\n", CPLD_READ(wd_cfg)); + printf("sw_ctl_on = 0x%02x\n", CPLD_READ(sw_ctl_on)); + printf("por_cfg = 0x%02x\n", CPLD_READ(por_cfg)); + printf("switch_strobe = 0x%02x\n", CPLD_READ(switch_strobe)); + printf("jtag_sel = 0x%02x\n", CPLD_READ(jtag_sel)); + printf("sdbank1_clk = 0x%02x\n", CPLD_READ(sdbank1_clk)); + printf("sdbank2_clk = 0x%02x\n", CPLD_READ(sdbank2_clk)); + printf("fbank_sel = 0x%02x\n", CPLD_READ(fbank_sel)); + printf("serdes_mux = 0x%02x\n", CPLD_READ(serdes_mux)); + printf("SW[2] = 0x%02x\n", in_8(&CPLD_SW(2))); + putc('\n'); +} +#endif + +int cpld_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int rc = 0; + unsigned int i; + + if (argc <= 1) + return cmd_usage(cmdtp); + + if (strcmp(argv[1], "reset") == 0) { + if (strcmp(argv[2], "altbank") == 0) + cpld_set_altbank(); + else + cpld_clear_altbank(); + + cpld_reset(); + } else if (strcmp(argv[1], "watchdog") == 0) { + static char *period[8] = {"1ms", "10ms", "30ms", "disable", + "100ms", "1s", "10s", "60s"}; + for (i = 0; i < ARRAY_SIZE(period); i++) { + if (strcmp(argv[2], period[i]) == 0) + CPLD_WRITE(wd_cfg, i); + } + } else if (strcmp(argv[1], "lane_mux") == 0) { + u32 lane = simple_strtoul(argv[2], NULL, 16); + u8 val = (u8)simple_strtoul(argv[3], NULL, 16); + u8 reg = CPLD_READ(serdes_mux); + + switch (lane) { + case 0x6: + reg &= ~SERDES_MUX_LANE_6_MASK; + reg |= val << SERDES_MUX_LANE_6_SHIFT; + break; + case 0xa: + reg &= ~SERDES_MUX_LANE_A_MASK; + reg |= val << SERDES_MUX_LANE_A_SHIFT; + break; + case 0xc: + reg &= ~SERDES_MUX_LANE_C_MASK; + reg |= val << SERDES_MUX_LANE_C_SHIFT; + break; + case 0xd: + reg &= ~SERDES_MUX_LANE_D_MASK; + reg |= val << SERDES_MUX_LANE_D_SHIFT; + break; + default: + printf("Invalid value\n"); + break; + } + + CPLD_WRITE(serdes_mux, reg); +#ifdef DEBUG + } else if (strcmp(argv[1], "dump") == 0) { + cpld_dump_regs(); +#endif + } else + rc = cmd_usage(cmdtp); + + return rc; +} + +U_BOOT_CMD( + cpld_cmd, CONFIG_SYS_MAXARGS, 1, cpld_cmd, + "Reset the board or pin mulexing selection using the CPLD sequencer", + "reset - hard reset to default bank\n" + "cpld_cmd reset altbank - reset to alternate bank\n" + "cpld_cmd watchdog <watchdog_period> - set the watchdog period\n" + " period: 1ms 10ms 30ms 100ms 1s 10s 60s disable\n" + "cpld_cmd lane_mux <lane> <mux_value> - set multiplexed lane pin\n" + " lane 6: 0 -> slot1 (Default)\n" + " 1 -> SGMII\n" + " lane a: 0 -> slot2 (Default)\n" + " 1 -> AURORA\n" + " lane c: 0 -> slot2 (Default)\n" + " 1 -> SATA0\n" + " lane d: 0 -> slot2 (Default)\n" + " 1 -> SATA1\n" +#ifdef DEBUG + "cpld_cmd dump - display the CPLD registers\n" +#endif + ); diff --git a/board/freescale/p2041rdb/cpld.h b/board/freescale/p2041rdb/cpld.h new file mode 100644 index 0000000..3b24cb0 --- /dev/null +++ b/board/freescale/p2041rdb/cpld.h @@ -0,0 +1,53 @@ +/** + * Copyright 2011 Freescale Semiconductor + * Author: Mingkai Hu <Mingkai.hu@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This file provides support for the ngPIXIS, a board-specific FPGA used on + * some Freescale reference boards. + */ + +/* + * CPLD register set. Feel free to add board-specific #ifdefs where necessary. + */ +typedef struct cpld_data { + u8 cpld_ver; /* 0x0 - CPLD Major Revision Register */ + u8 cpld_ver_sub; /* 0x1 - CPLD Minor Revision Register */ + u8 pcba_ver; /* 0x2 - PCBA Revision Register */ + u8 system_rst; /* 0x3 - system reset register */ + u8 wd_cfg; /* 0x4 - Watchdog Period Setting Register */ + u8 sw_ctl_on; /* 0x5 - Switch Control Enable Register */ + u8 por_cfg; /* 0x6 - POR Control Register */ + u8 switch_strobe; /* 0x7 - Multiplexed pin Select Register */ + u8 jtag_sel; /* 0x8 - JTAG or AURORA Selection */ + u8 sdbank1_clk; /* 0x9 - SerDes Bank1 Reference clock */ + u8 sdbank2_clk; /* 0xa - SerDes Bank2 Reference clock */ + u8 fbank_sel; /* 0xb - Flash bank selection */ + u8 serdes_mux; /* 0xc - Multiplexed pin Select Register */ + u8 sw[1]; /* 0xd - SW2 Status */ +} __attribute__ ((packed)) cpld_data_t; + +#define SERDES_MUX_LANE_6_MASK 0x2 +#define SERDES_MUX_LANE_6_SHIFT 1 +#define SERDES_MUX_LANE_A_MASK 0x1 +#define SERDES_MUX_LANE_A_SHIFT 0 +#define SERDES_MUX_LANE_C_MASK 0x4 +#define SERDES_MUX_LANE_C_SHIFT 2 +#define SERDES_MUX_LANE_D_MASK 0x8 +#define SERDES_MUX_LANE_D_SHIFT 3 + +/* Pointer to the CPLD register set */ +#define cpld ((cpld_data_t *)CPLD_BASE) + +/* The CPLD SW register that corresponds to board switch X, where x >= 1 */ +#define CPLD_SW(x) (cpld->sw[(x) - 2]) + +u8 cpld_read(unsigned int reg); +void cpld_write(unsigned int reg, u8 value); + +#define CPLD_READ(reg) cpld_read(offsetof(cpld_data_t, reg)) +#define CPLD_WRITE(reg, value) cpld_write(offsetof(cpld_data_t, reg), value) diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c new file mode 100644 index 0000000..e9c699c --- /dev/null +++ b/board/freescale/p2041rdb/ddr.c @@ -0,0 +1,115 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <i2c.h> +#include <hwconfig.h> +#include <asm/mmu.h> +#include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_ddr_dimm_params.h> +#include <asm/fsl_law.h> + +typedef struct { + u32 datarate_mhz_low; + u32 datarate_mhz_high; + u32 n_ranks; + u32 clk_adjust; + u32 wrlvl_start; + u32 cpo; + u32 write_data_delay; + u32 force_2T; +} board_specific_parameters_t; + +/* + * ranges for parameters: + * wr_data_delay = 0-6 + * clk adjust = 0-8 + * cpo 2-0x1E (30) + */ +const board_specific_parameters_t board_specific_parameters[] = { + /* + * memory controller 0 + * lo| hi| num| clk| wrlvl | cpo |wrdata|2T + * mhz| mhz|ranks|adjst| start | delay| + */ + { 1017, 1116, 2, 4, 6, 0xff, 2, 0}, +}; + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + const board_specific_parameters_t *pbsp = + &board_specific_parameters[0]; + u32 num_params = ARRAY_SIZE(board_specific_parameters); + u32 i; + ulong ddr_freq; + + /* + * Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr + * freqency and n_banks specified in board_specific_parameters table. + */ + ddr_freq = get_ddr_freq(0) / 1000000; + for (i = 0; i < num_params; i++) { + if (ddr_freq >= pbsp->datarate_mhz_low && + ddr_freq <= pbsp->datarate_mhz_high && + pdimm[0].n_ranks == pbsp->n_ranks) { + popts->cpo_override = pbsp->cpo; + popts->write_data_delay = pbsp->write_data_delay; + popts->clk_adjust = pbsp->clk_adjust; + popts->wrlvl_start = pbsp->wrlvl_start; + popts->twoT_en = pbsp->force_2T; + break; + } + pbsp++; + } + + if (i == num_params) { + printf("Warning: board specific timing not found " + "for data rate %lu MT/s!\n", ddr_freq); + } + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; + /* Write leveling override */ + popts->wrlvl_override = 1; + popts->wrlvl_sample = 0xf; + + /* Rtt and Rtt_WR override */ + popts->rtt_override = 0; + + /* Enable ZQ calibration */ + popts->zq_en = 1; + + /* DHC_EN =1, ODT = 60 Ohm */ + popts->ddr_cdr1 = DDR_CDR1_DHC_EN; +} + +phys_size_t initdram(int board_type) +{ + phys_size_t dram_size = 0; + + puts("Initializing...."); + + if (fsl_use_spd()) { + puts("using SPD\n"); + dram_size = fsl_ddr_sdram(); + } else { + puts("no SPD and fixed parameters\n"); + return dram_size; + } + + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; + + debug(" DDR: "); + return dram_size; +} diff --git a/board/freescale/p2041rdb/law.c b/board/freescale/p2041rdb/law.c new file mode 100644 index 0000000..127a478 --- /dev/null +++ b/board/freescale/p2041rdb/law.c @@ -0,0 +1,37 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +struct law_entry law_table[] = { + SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN), + SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN), + SET_LAW(CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), +#ifdef CONFIG_SYS_DCSRBAR_PHYS + SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), +#endif +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c new file mode 100644 index 0000000..52269d3 --- /dev/null +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -0,0 +1,203 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <netdev.h> +#include <linux/compiler.h> +#include <asm/mmu.h> +#include <asm/processor.h> +#include <asm/cache.h> +#include <asm/immap_85xx.h> +#include <asm/fsl_law.h> +#include <asm/fsl_serdes.h> +#include <asm/fsl_portals.h> +#include <asm/fsl_liodn.h> + +extern void pci_of_setup(void *blob, bd_t *bd); + +#include "cpld.h" + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + u8 sw; + struct cpu_type *cpu = gd->cpu; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + unsigned int i; + + printf("Board: %sRDB, ", cpu->name); + printf("CPLD version: %d.%d ", CPLD_READ(cpld_ver), + CPLD_READ(cpld_ver_sub)); + + sw = CPLD_READ(fbank_sel); + printf("vBank: %d\n", sw & 0x1); + +#ifdef CONFIG_PHYS_64BIT + puts("36-bit Addressing\n"); +#endif + + /* + * Display the RCW, so that no one gets confused as to what RCW + * we're actually using for this boot. + */ + puts("Reset Configuration Word (RCW):"); + for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) { + u32 rcw = in_be32(&gur->rcwsr[i]); + + if ((i % 4) == 0) + printf("\n %08x:", i * 4); + printf(" %08x", rcw); + } + puts("\n"); + + /* + * Display the actual SERDES reference clocks as configured by the + * dip switches on the board. Note that the SWx registers could + * technically be set to force the reference clocks to match the + * values that the SERDES expects (or vice versa). For now, however, + * we just display both values and hope the user notices when they + * don't match. + */ + puts("SERDES Reference Clocks: "); + sw = in_8(&CPLD_SW(2)) >> 2; + for (i = 0; i < 2; i++) { + static const char * const freq[] = {"0", "100", "125"}; + unsigned int clock = (sw >> (2 * i)) & 3; + + printf("Bank%u=%sMhz ", i+1, freq[clock]); + } + puts("\n"); + + return 0; +} + +int board_early_init_f(void) +{ + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + + /* board only uses the DDR_MCK0/1, so disable the DDR_MCK2/3 */ + setbits_be32(&gur->ddrclkdr, 0x000f000f); + + return 0; +} + +int board_early_init_r(void) +{ + const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; + const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); + + /* + * Remap Boot flash + PROMJET region to caching-inhibited + * so that flash can be erased properly. + */ + + /* Flush d-cache and invalidate i-cache of any FLASH data */ + flush_dcache(); + invalidate_icache(); + + /* invalidate existing TLB entry for flash + promjet */ + disable_tlb(flash_esel); + + set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, flash_esel, BOOKE_PAGESZ_256M, 1); + + set_liodns(); + setup_portals(); + + return 0; +} + +static const char *serdes_clock_to_string(u32 clock) +{ + switch (clock) { + case SRDS_PLLCR0_RFCK_SEL_100: + return "100"; + case SRDS_PLLCR0_RFCK_SEL_125: + return "125"; + case SRDS_PLLCR0_RFCK_SEL_156_25: + return "156.25"; + default: + return "150"; + } +} + +#define NUM_SRDS_BANKS 2 + +int misc_init_r(void) +{ + serdes_corenet_t *regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR; + u32 actual[NUM_SRDS_BANKS]; + unsigned int i; + u8 sw; + + sw = in_8(&CPLD_SW(2)) >> 2; + for (i = 0; i < NUM_SRDS_BANKS; i++) { + unsigned int clock = (sw >> (2 * i)) & 3; + switch (clock) { + case 1: + actual[i] = SRDS_PLLCR0_RFCK_SEL_100; + break; + case 2: + actual[i] = SRDS_PLLCR0_RFCK_SEL_125; + break; + default: + printf("Warning: SDREFCLK%u switch setting of '11' is " + "unsupported\n", i + 1); + break; + } + } + + for (i = 0; i < NUM_SRDS_BANKS; i++) { + u32 expected = in_be32(®s->bank[i].pllcr0); + expected &= SRDS_PLLCR0_RFCK_SEL_MASK; + if (expected != actual[i]) { + printf("Warning: SERDES bank %u expects reference clock" + " %sMHz, but actual is %sMHz\n", i + 1, + serdes_clock_to_string(expected), + serdes_clock_to_string(actual[i])); + } + } + + return 0; +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + phys_addr_t base; + phys_size_t size; + + ft_cpu_setup(blob, bd); + + base = getenv_bootm_low(); + size = getenv_bootm_size(); + + fdt_fixup_memory(blob, (u64)base, (u64)size); + +#ifdef CONFIG_PCI + pci_of_setup(blob, bd); +#endif + + fdt_fixup_liodn(blob); +} diff --git a/board/freescale/p2041rdb/pci.c b/board/freescale/p2041rdb/pci.c new file mode 100644 index 0000000..1ab4cdf --- /dev/null +++ b/board/freescale/p2041rdb/pci.c @@ -0,0 +1,39 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <pci.h> +#include <asm/fsl_pci.h> +#include <libfdt.h> +#include <fdt_support.h> +#include <asm/fsl_serdes.h> + +void pci_init_board(void) +{ + fsl_pcie_init_board(0); +} + +void pci_of_setup(void *blob, bd_t *bd) +{ + FT_FSL_PCI_SETUP; +} diff --git a/board/freescale/p2041rdb/tlb.c b/board/freescale/p2041rdb/tlb.c new file mode 100644 index 0000000..43f28ed --- /dev/null +++ b/board/freescale/p2041rdb/tlb.c @@ -0,0 +1,119 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/mmu.h> + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 - for temp stack in cache */ + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, + CONFIG_SYS_INIT_RAM_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + + SET_TLB_ENTRY(0, CPLD_BASE, CPLD_BASE_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_4K, 0), + + /* TLB 1 */ + /* *I*** - Covers boot page */ +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) + /* + * *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the + * SRAM is at 0xfff00000, it covered the 0xfffff000. + */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_1M, 1), +#else + SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_4K, 1), +#endif + + /* *I*G* - CCSRBAR */ + SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 1, BOOKE_PAGESZ_16M, 1), + + /* *I*G* - Flash, localbus */ + /* This will be changed to *I*G* after relocation to RAM. */ + SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, + MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, + 0, 2, BOOKE_PAGESZ_256M, 1), + + /* *I*G* - PCI */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 3, BOOKE_PAGESZ_1G, 1), + + /* *I*G* - PCI */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000, + CONFIG_SYS_PCIE1_MEM_PHYS + 0x40000000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x50000000, + CONFIG_SYS_PCIE1_MEM_PHYS + 0x50000000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_256M, 1), + + /* *I*G* - PCI I/O */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 6, BOOKE_PAGESZ_256K, 1), + + /* Bman/Qman */ + SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 9, BOOKE_PAGESZ_1M, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x00100000, + CONFIG_SYS_BMAN_MEM_PHYS + 0x00100000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 10, BOOKE_PAGESZ_1M, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 11, BOOKE_PAGESZ_1M, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x00100000, + CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 12, BOOKE_PAGESZ_1M, 1), +#ifdef CONFIG_SYS_DCSRBAR_PHYS + SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 13, BOOKE_PAGESZ_4M, 1), +#endif +}; + +int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/board/gcplus/flash.c b/board/gcplus/flash.c index 8511582..ab567e8 100644 --- a/board/gcplus/flash.c +++ b/board/gcplus/flash.c @@ -225,7 +225,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -258,9 +258,6 @@ flash_erase(flash_info_t * info, int s_first, int s_last) printf("\n"); } - start = get_timer(0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); @@ -273,7 +270,7 @@ flash_erase(flash_info_t * info, int s_first, int s_last) printf("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); *addr = (FPW) 0x00500050; /* clear status register */ *addr = (FPW) 0x00200020; /* erase setup */ @@ -282,7 +279,7 @@ flash_erase(flash_info_t * info, int s_first, int s_last) while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf("Timeout\n"); *addr = (FPW) 0x00B000B0; /* suspend erase */ *addr = (FPW) 0x00FF00FF; /* reset to read mode */ @@ -401,6 +398,7 @@ write_data(flash_info_t * info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -414,11 +412,11 @@ write_data(flash_info_t * info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked() > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c index 9a92941..2cd3707 100644 --- a/board/hymod/bsp.c +++ b/board/hymod/bsp.c @@ -75,14 +75,14 @@ DECLARE_GLOBAL_DATA_PTR; */ int -fpga_load (int mezz, uchar *addr, ulong size) +fpga_load(int mezz, const uchar *addr, ulong size) { hymod_conf_t *cp = &gd->bd->bi_hymod_conf; xlx_info_t *fp; xlx_iopins_t *fpgaio; volatile uchar *fpgabase; volatile uint cnt; - uchar *eaddr = addr + size; + const uchar *eaddr = addr + size; int result; if (mezz) diff --git a/board/idmr/flash.c b/board/idmr/flash.c index 57c9948..9f4ff2b 100644 --- a/board/idmr/flash.c +++ b/board/idmr/flash.c @@ -130,6 +130,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int iflag, prot, sect; int rc = ERR_OK; int chip1; + ulong start; /* first look for protection bits */ @@ -170,7 +171,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - set_timer (0); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ volatile u16 *addr = @@ -191,7 +192,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) result = *addr; /* check timeout */ - if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT * CONFIG_SYS_HZ / 1000) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT * CONFIG_SYS_HZ / 1000) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; chip1 = TMO; break; @@ -248,6 +249,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) int rc = ERR_OK; int iflag; int chip1; + ulong start; /* * Check if Flash is (sufficiently) erased @@ -272,7 +274,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - set_timer (0); + start = get_timer(0); /* wait until flash is ready */ chip1 = 0; @@ -280,7 +282,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) result = *addr; /* check timeout */ - if (get_timer (0) > CONFIG_SYS_FLASH_ERASE_TOUT * CONFIG_SYS_HZ / 1000) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT * CONFIG_SYS_HZ / 1000) { chip1 = ERR | TMO; break; } diff --git a/board/impa7/flash.c b/board/impa7/flash.c index d0c5880..6eae428 100644 --- a/board/impa7/flash.c +++ b/board/impa7/flash.c @@ -128,6 +128,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; int rc = ERR_OK; + ulong start; if (info->flash_id == FLASH_UNKNOWN) return ERR_UNKNOWN_FLASH_TYPE; @@ -165,7 +166,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ vu_long *addr = (vu_long *) (info->start[sect]); @@ -174,7 +175,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *addr = 0x00D000D0; /* erase confirm */ while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = 0x00B000B0; /* suspend erase */ *addr = 0x00FF00FF; /* reset to read mode */ @@ -211,6 +212,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) ulong barf; int rc = ERR_OK; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ @@ -236,14 +238,14 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* read status register command */ *addr = 0x00700070; /* wait while polling the status register */ while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { rc = ERR_TIMOUT; /* suspend program command */ *addr = 0x00B000B0; diff --git a/board/imx31_phycore/imx31_phycore.c b/board/imx31_phycore/imx31_phycore.c index ca7d6e2..773900e 100644 --- a/board/imx31_phycore/imx31_phycore.c +++ b/board/imx31_phycore/imx31_phycore.c @@ -33,7 +33,7 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/innokom/flash.c b/board/innokom/flash.c index 8c95341..ed4b987 100644 --- a/board/innokom/flash.c +++ b/board/innokom/flash.c @@ -182,6 +182,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; int rc = ERR_OK; + ulong start; if (info->flash_id == FLASH_UNKNOWN) return ERR_UNKNOWN_FLASH_TYPE; @@ -218,7 +219,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) PRINTK("\n"); /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ u16 * volatile addr = (u16 * volatile)(info->start[sect]); @@ -235,7 +236,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) while ((*addr & 0x0080) != 0x0080) { PRINTK("."); - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = 0x00B0; /* suspend erase*/ *addr = 0x00FF; /* read mode */ rc = ERR_TIMOUT; @@ -279,6 +280,7 @@ static int write_word (flash_info_t *info, ulong dest, ushort data) volatile u16 *addr = (u16 *)dest, val; int rc = ERR_OK; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) return ERR_NOT_ERASED; @@ -302,11 +304,11 @@ static int write_word (flash_info_t *info, ulong dest, ushort data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); /* wait while polling the status register */ while(((val = *addr) & 0x80) != 0x80) { - if (get_timer_masked() > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { rc = ERR_TIMOUT; *addr = 0xB0; /* suspend program command */ goto outahere; diff --git a/board/digsy_mtc/Makefile b/board/intercontrol/digsy_mtc/Makefile index a40076c..19f5b3a 100644 --- a/board/digsy_mtc/Makefile +++ b/board/intercontrol/digsy_mtc/Makefile @@ -7,10 +7,11 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS := $(BOARD).o cmd_mtc.o +COBJS-y := $(BOARD).o cmd_mtc.o +COBJS-$(CONFIG_VIDEO) += cmd_disp.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(obj).depend $(OBJS) diff --git a/board/intercontrol/digsy_mtc/cmd_disp.c b/board/intercontrol/digsy_mtc/cmd_disp.c new file mode 100644 index 0000000..d5f5efb --- /dev/null +++ b/board/intercontrol/digsy_mtc/cmd_disp.c @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2011 DENX Software Engineering, + * Anatolij Gustschin <agust@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <mpc5xxx.h> +#include <asm/io.h> + +#define GPIO_USB1_0 0x00010000 + +static int cmd_disp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + + if (argc < 2) { + printf("%s\n", + in_be32(&gpio->simple_dvo) & GPIO_USB1_0 ? "on" : "off"); + return 0; + } + + if (!strncmp(argv[1], "on", 2)) { + setbits_be32(&gpio->simple_dvo, GPIO_USB1_0); + } else if (!strncmp(argv[1], "off", 3)) { + clrbits_be32(&gpio->simple_dvo, GPIO_USB1_0); + } else { + cmd_usage(cmdtp); + return 1; + } + return 0; +} + +U_BOOT_CMD(disp, 2, 1, cmd_disp, + "disp [on/off] - switch display on/off", + "\n - print display on/off status\n" + "on\n - turn on\n" + "off\n - turn off\n" +); diff --git a/board/digsy_mtc/cmd_mtc.c b/board/intercontrol/digsy_mtc/cmd_mtc.c index ba0c367..fffcee9 100644 --- a/board/digsy_mtc/cmd_mtc.c +++ b/board/intercontrol/digsy_mtc/cmd_mtc.c @@ -31,6 +31,8 @@ DECLARE_GLOBAL_DATA_PTR; +static uchar user_out; + static const char *led_names[] = { "diag", "can1", @@ -112,6 +114,8 @@ static int do_mtc_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) else pcmd.cmd_val2 = 0; + pcmd.user_out = user_out; + mtc_calculate_checksum(&pcmd); err = msp430_xfer(&pcmd, &prx); @@ -128,6 +132,7 @@ static int do_mtc_key(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) memset(&prx, 0, sizeof(prx)); pcmd.cmd = CMD_GET_VIM; + pcmd.user_out = user_out; mtc_calculate_checksum(&pcmd); err = msp430_xfer(&pcmd, &prx); @@ -160,6 +165,7 @@ static int do_mtc_digout(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv pcmd.cmd = CMD_GET_VIM; pcmd.user_out = channel_mask; + user_out = channel_mask; mtc_calculate_checksum(&pcmd); err = msp430_xfer(&pcmd, &prx); @@ -187,6 +193,7 @@ static int do_mtc_digin(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[ memset(&prx, 0, sizeof(prx)); pcmd.cmd = CMD_GET_VIM; + pcmd.user_out = user_out; mtc_calculate_checksum(&pcmd); err = msp430_xfer(&pcmd, &prx); @@ -205,6 +212,7 @@ static int do_mtc_appreg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv rx_msp_cmd prx; int err; char buf[5]; + uchar appreg; /* read appreg */ memset(&pcmd, 0, sizeof(pcmd)); @@ -214,13 +222,34 @@ static int do_mtc_appreg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv pcmd.cmd_val0 = 5; /* max. Count */ pcmd.cmd_val1 = 5; /* max. Time */ pcmd.cmd_val2 = 0; /* =0 means read appreg */ + pcmd.user_out = user_out; mtc_calculate_checksum(&pcmd); err = msp430_xfer(&pcmd, &prx); + /* on success decide between read or write */ if (!err) { - sprintf(buf, "%d", prx.ack2); - setenv("appreg", buf); + if (argc == 2) { + appreg = simple_strtol(argv[1], NULL, 10); + if (appreg == 0) { + printf("mtc appreg: invalid parameter - " + "must be between 1 and 255\n"); + return -1; + } + memset(&pcmd, 0, sizeof(pcmd)); + pcmd.cmd = CMD_WD_PARA; + pcmd.cmd_val0 = prx.ack3; /* max. Count */ + pcmd.cmd_val1 = prx.ack0; /* max. Time */ + pcmd.cmd_val2 = appreg; /* !=0 means write appreg */ + pcmd.user_out = user_out; + memset(&prx, 0, sizeof(prx)); + + mtc_calculate_checksum(&pcmd); + err = msp430_xfer(&pcmd, &prx); + } else { + sprintf(buf, "%d", prx.ack2); + setenv("appreg", buf); + } } return err; @@ -236,6 +265,7 @@ static int do_mtc_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const arg memset(&prx, 0, sizeof(prx)); pcmd.cmd = CMD_FW_VERSION; + pcmd.user_out = user_out; mtc_calculate_checksum(&pcmd); err = msp430_xfer(&pcmd, &prx); @@ -259,6 +289,7 @@ static int do_mtc_state(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[ pcmd.cmd = CMD_WD_WDSTATE; pcmd.cmd_val2 = 1; + pcmd.user_out = user_out; mtc_calculate_checksum(&pcmd); err = msp430_xfer(&pcmd, &prx); @@ -288,8 +319,10 @@ cmd_tbl_t cmd_mtc_sub[] = { "returns state of user key", ""), U_BOOT_CMD_MKENT(version, 0, 1, do_mtc_version, "returns firmware version of supervisor uC", ""), - U_BOOT_CMD_MKENT(appreg, 0, 1, do_mtc_appreg, - "reads appreg value and stores in environment variable 'appreg'", ""), + U_BOOT_CMD_MKENT(appreg, 1, 1, do_mtc_appreg, + "reads or writes appreg value and stores in environment " + "variable 'appreg'", + "[value] - value (1 - 255) to write to appreg"), U_BOOT_CMD_MKENT(digin, 1, 1, do_mtc_digin, "returns state of digital input", "<channel_num> - get state of digital input (1 or 2)\n"), @@ -342,8 +375,9 @@ U_BOOT_CMD(mtc, 5, 1, cmd_mtc, " [blink]: blink interval in 100ms steps (1 - 10; 0 = static)\n" "key - returns state of user key\n" "version - returns firmware version of supervisor uC\n" - "appreg - reads appreg value and stores in environment variable" - " 'appreg'\n" + "appreg [value] - reads (in environment variable 'appreg') or writes" + " appreg value\n" + " [value]: value (1 - 255) to write to appreg\n" "digin [channel] - returns state of digital input (1 or 2)\n" "digout <on|off> <on|off> - sets state of two digital outputs\n" "state - displays state\n" diff --git a/board/digsy_mtc/cmd_mtc.h b/board/intercontrol/digsy_mtc/cmd_mtc.h index 81714e3..81714e3 100644 --- a/board/digsy_mtc/cmd_mtc.h +++ b/board/intercontrol/digsy_mtc/cmd_mtc.h diff --git a/board/digsy_mtc/digsy_mtc.c b/board/intercontrol/digsy_mtc/digsy_mtc.c index 588face..784ba2a 100644 --- a/board/digsy_mtc/digsy_mtc.c +++ b/board/intercontrol/digsy_mtc/digsy_mtc.c @@ -48,6 +48,7 @@ #endif #include <libfdt.h> #include <fdt_support.h> +#include <i2c.h> DECLARE_GLOBAL_DATA_PTR; @@ -207,6 +208,69 @@ int checkboard(void) return 0; } +#if defined(CONFIG_VIDEO) + +#define GPIO_USB1_0 0x00010000 /* Power-On pin */ +#define GPIO_USB1_9 0x08 /* PX_~EN pin */ + +#define GPIO_EE_DO 0x10 /* PSC6_0 (DO) pin */ +#define GPIO_EE_CTS 0x20 /* PSC6_1 (CTS) pin */ +#define GPIO_EE_DI 0x10000000 /* PSC6_2 (DI) pin */ +#define GPIO_EE_CLK 0x20000000 /* PSC6_3 (CLK) pin */ + +#define GPT_GPIO_ON 0x00000034 /* GPT as simple GPIO, high */ + +/* ExBo I2C Addresses */ +#define EXBO_EE_I2C_ADDRESS 0x56 + +static void exbo_hw_init(void) +{ + struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)MPC5XXX_GPT; + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + struct mpc5xxx_wu_gpio *wu_gpio = + (struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO; + unsigned char val; + + /* 1st, check if extension board is present */ + if (i2c_read(EXBO_EE_I2C_ADDRESS, 0, 1, &val, 1)) + return; + + /* configure IrDA pins (PSC6 port) as gpios */ + gpio->port_config &= 0xFF8FFFFF; + + /* Init for USB1_0, EE_CLK and EE_DI - Low */ + setbits_be32(&gpio->simple_ddr, + GPIO_USB1_0 | GPIO_EE_CLK | GPIO_EE_DI); + clrbits_be32(&gpio->simple_ode, + GPIO_USB1_0 | GPIO_EE_CLK | GPIO_EE_DI); + clrbits_be32(&gpio->simple_dvo, + GPIO_USB1_0 | GPIO_EE_CLK | GPIO_EE_DI); + setbits_be32(&gpio->simple_gpioe, + GPIO_USB1_0 | GPIO_EE_CLK | GPIO_EE_DI); + + /* Init for EE_DO, EE_CTS - Input */ + clrbits_8(&wu_gpio->ddr, GPIO_EE_DO | GPIO_EE_CTS); + setbits_8(&wu_gpio->enable, GPIO_EE_DO | GPIO_EE_CTS); + + /* Init for PX_~EN (USB1_9) - High */ + clrbits_8(&gpio->sint_ode, GPIO_USB1_9); + setbits_8(&gpio->sint_ddr, GPIO_USB1_9); + clrbits_8(&gpio->sint_inten, GPIO_USB1_9); + setbits_8(&gpio->sint_dvo, GPIO_USB1_9); + setbits_8(&gpio->sint_gpioe, GPIO_USB1_9); + + /* Init for ~OE Switch (GPIO3) - Timer_0 GPIO High */ + out_be32(&gpt[0].emsr, GPT_GPIO_ON); + /* Init for S Switch (GPIO4) - Timer_1 GPIO High */ + out_be32(&gpt[1].emsr, GPT_GPIO_ON); + + /* Power-On camera supply */ + setbits_be32(&gpio->simple_dvo, GPIO_USB1_0); +} +#else +static inline void exbo_hw_init(void) {} +#endif /* CONFIG_VIDEO */ + int board_early_init_r(void) { #ifdef CONFIG_MPC52XX_SPI @@ -224,6 +288,8 @@ int board_early_init_r(void) /* enable CS0 */ setbits_be32((void *)MPC5XXX_ADDECR, (1 << 16)); + exbo_hw_init(); + #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) /* Low level USB init, required for proper kernel operation */ usb_cpu_init(); diff --git a/board/digsy_mtc/eeprom.h b/board/intercontrol/digsy_mtc/eeprom.h index 39e0378..fd11555 100644 --- a/board/digsy_mtc/eeprom.h +++ b/board/intercontrol/digsy_mtc/eeprom.h @@ -27,6 +27,6 @@ #define EEPROM_ADDR_IDENT 0 /* identification word offset */ #define EEPROM_ADDR_LEN_SYS 2 /* system area lenght offset */ #define EEPROM_ADDR_LEN_SYSCFG 4 /* system config area length offset */ -#define EEPROM_ADDR_ETHADDR 23 /* ethernet addres offset */ +#define EEPROM_ADDR_ETHADDR 23 /* ethernet address offset */ #endif diff --git a/board/digsy_mtc/is42s16800a-7t.h b/board/intercontrol/digsy_mtc/is42s16800a-7t.h index 64a81f4..64a81f4 100644 --- a/board/digsy_mtc/is42s16800a-7t.h +++ b/board/intercontrol/digsy_mtc/is42s16800a-7t.h diff --git a/board/digsy_mtc/is45s16800a2.h b/board/intercontrol/digsy_mtc/is45s16800a2.h index 6ab5c12..6ab5c12 100644 --- a/board/digsy_mtc/is45s16800a2.h +++ b/board/intercontrol/digsy_mtc/is45s16800a2.h diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c index 269858c..25b99e8 100644 --- a/board/karo/tx25/tx25.c +++ b/board/karo/tx25/tx25.c @@ -70,18 +70,18 @@ void tx25_fec_init(void) writel(0x0, &padctl->pad_d11); /* drop PHY power and assert reset (low) */ - val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9)); - writel(val, &gpio4->dr); - val = readl(&gpio4->dir) | (1 << 7) | (1 << 9); - writel(val, &gpio4->dir); + val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9)); + writel(val, &gpio4->gpio_dr); + val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9); + writel(val, &gpio4->gpio_dir); mdelay(5); debug("resetting phy\n"); /* turn on PHY power leaving reset asserted */ - val = readl(&gpio4->dr) | 1 << 9; - writel(val, &gpio4->dr); + val = readl(&gpio4->gpio_dr) | 1 << 9; + writel(val, &gpio4->gpio_dr); mdelay(10); @@ -111,19 +111,19 @@ void tx25_fec_init(void) /* * set each to 1 and make each an output */ - val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12); - writel(val, &gpio3->dr); - val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12); - writel(val, &gpio3->dir); + val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12); + writel(val, &gpio3->gpio_dr); + val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12); + writel(val, &gpio3->gpio_dir); mdelay(22); /* this value came from RedBoot */ /* * deassert PHY reset */ - val = readl(&gpio4->dr) | 1 << 7; - writel(val, &gpio4->dr); - writel(val, &gpio4->dr); + val = readl(&gpio4->gpio_dr) | 1 << 7; + writel(val, &gpio4->gpio_dr); + writel(val, &gpio4->gpio_dr); mdelay(5); @@ -160,7 +160,7 @@ int board_late_init(void) int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); return 0; } @@ -168,11 +168,11 @@ int dram_init (void) void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1, + gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); #if CONFIG_NR_DRAM_BANKS > 1 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2, + gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); #else diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 9be4c72..fce9d58 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -2,6 +2,9 @@ * (C) Copyright 2008 * Heiko Schocher, DENX Software Engineering, hs@denx.de. * + * (C) Copyright 2011 + * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com + * * See file CREDITS for list of people who contributed to this * project. * @@ -22,9 +25,6 @@ */ #include <common.h> -#if defined(CONFIG_KM82XX) -#include <mpc8260.h> -#endif #include <ioports.h> #include <command.h> #include <malloc.h> @@ -38,44 +38,14 @@ #include <libfdt.h> #endif -#include "../common/common.h" +#include "common.h" #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) #include <i2c.h> +#endif static void i2c_write_start_seq(void); -static int i2c_make_abort(void); DECLARE_GLOBAL_DATA_PTR; -int ivm_calc_crc(unsigned char *buf, int len) -{ - const unsigned short crc_tab[16] = { - 0x0000, 0xCC01, 0xD801, 0x1400, - 0xF001, 0x3C00, 0x2800, 0xE401, - 0xA001, 0x6C00, 0x7800, 0xB401, - 0x5000, 0x9C01, 0x8801, 0x4400}; - - unsigned short crc = 0; /* final result */ - unsigned short r1 = 0; /* temp */ - unsigned char byte = 0; /* input buffer */ - int i; - - /* calculate CRC from array data */ - for (i = 0; i < len; i++) { - byte = buf[i]; - - /* lower 4 bits */ - r1 = crc_tab[crc & 0xF]; - crc = ((crc) >> 4) & 0x0FFF; - crc = crc ^ r1 ^ crc_tab[byte & 0xF]; - - /* upper 4 bits */ - r1 = crc_tab[crc & 0xF]; - crc = (crc >> 4) & 0x0FFF; - crc = crc ^ r1 ^ crc_tab[(byte >> 4) & 0xF]; - } - return crc; -} - /* * Set Keymile specific environment variables * Currently only some memory layout variables are calculated here @@ -111,355 +81,9 @@ int set_km_env(void) return 0; } -static int ivm_set_value(char *name, char *value) -{ - char tempbuf[256]; - - if (value != NULL) { - sprintf(tempbuf, "%s=%s", name, value); - return set_local_var(tempbuf, 0); - } else { - unset_local_var(name); - } - return 0; -} - -static int ivm_get_value(unsigned char *buf, int len, char *name, int off, - int check) -{ - unsigned short val; - unsigned char valbuf[30]; - - if ((buf[off + 0] != buf[off + 2]) && - (buf[off + 2] != buf[off + 4])) { - printf("%s Error corrupted %s\n", __func__, name); - val = -1; - } else { - val = buf[off + 0] + (buf[off + 1] << 8); - if ((val == 0) && (check == 1)) - val = -1; - } - sprintf((char *)valbuf, "%x", val); - ivm_set_value(name, (char *)valbuf); - return val; -} - -#define INV_BLOCKSIZE 0x100 -#define INV_DATAADDRESS 0x21 -#define INVENTORYDATASIZE (INV_BLOCKSIZE - INV_DATAADDRESS - 3) - -#define IVM_POS_SHORT_TEXT 0 -#define IVM_POS_MANU_ID 1 -#define IVM_POS_MANU_SERIAL 2 -#define IVM_POS_PART_NUMBER 3 -#define IVM_POS_BUILD_STATE 4 -#define IVM_POS_SUPPLIER_PART_NUMBER 5 -#define IVM_POS_DELIVERY_DATE 6 -#define IVM_POS_SUPPLIER_BUILD_STATE 7 -#define IVM_POS_CUSTOMER_ID 8 -#define IVM_POS_CUSTOMER_PROD_ID 9 -#define IVM_POS_HISTORY 10 -#define IVM_POS_SYMBOL_ONLY 11 - -static char convert_char(char c) -{ - return (c < ' ' || c > '~') ? '.' : c; -} - -static int ivm_findinventorystring(int type, - unsigned char* const string, - unsigned long maxlen, - unsigned char *buf) -{ - int xcode = 0; - unsigned long cr = 0; - unsigned long addr = INV_DATAADDRESS; - unsigned long size = 0; - unsigned long nr = type; - int stop = 0; /* stop on semicolon */ - - memset(string, '\0', maxlen); - switch (type) { - case IVM_POS_SYMBOL_ONLY: - nr = 0; - stop= 1; - break; - default: - nr = type; - stop = 0; - } - - /* Look for the requested number of CR. */ - while ((cr != nr) && (addr < INVENTORYDATASIZE)) { - if ((buf[addr] == '\r')) { - cr++; - } - addr++; - } - - /* - * the expected number of CR was found until the end of the IVM - * content --> fill string - */ - if (addr < INVENTORYDATASIZE) { - /* Copy the IVM string in the corresponding string */ - for (; (buf[addr] != '\r') && - ((buf[addr] != ';') || (!stop)) && - (size < (maxlen - 1) && - (addr < INVENTORYDATASIZE)); addr++) - { - size += sprintf((char *)string + size, "%c", - convert_char (buf[addr])); - } - - /* - * copy phase is done: check if everything is ok. If not, - * the inventory data is most probably corrupted: tell - * the world there is a problem! - */ - if (addr == INVENTORYDATASIZE) { - xcode = -1; - printf("Error end of string not found\n"); - } else if ((size >= (maxlen - 1)) && - (buf[addr] != '\r')) { - xcode = -1; - printf("string too long till next CR\n"); - } - } else { - /* - * some CR are missing... - * the inventory data is most probably corrupted - */ - xcode = -1; - printf("not enough cr found\n"); - } - return xcode; -} - -#define GET_STRING(name, which, len) \ - if (ivm_findinventorystring(which, valbuf, len, buf) == 0) { \ - ivm_set_value(name, (char *)valbuf); \ - } - -static int ivm_check_crc(unsigned char *buf, int block) -{ - unsigned long crc; - unsigned long crceeprom; - - crc = ivm_calc_crc(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 2); - crceeprom = (buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 1] + \ - buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 2] * 256); - if (crc != crceeprom) { - if (block == 0) - printf("Error CRC Block: %d EEprom: calculated: \ - %lx EEprom: %lx\n", block, crc, crceeprom); - return -1; - } - return 0; -} - -static int ivm_analyze_block2(unsigned char *buf, int len) -{ - unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; - unsigned long count; - - /* IVM_MacAddress */ - sprintf((char *)valbuf, "%pM", buf); - ivm_set_value("IVM_MacAddress", (char *)valbuf); - /* if an offset is defined, add it */ -#if defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET) - if (CONFIG_PIGGY_MAC_ADRESS_OFFSET > 0) { - unsigned long val = (buf[4] << 16) + (buf[5] << 8) + buf[6]; - - val += CONFIG_PIGGY_MAC_ADRESS_OFFSET; - buf[4] = (val >> 16) & 0xff; - buf[5] = (val >> 8) & 0xff; - buf[6] = val & 0xff; - sprintf((char *)valbuf, "%pM", buf); - } -#endif - if (getenv("ethaddr") == NULL) - setenv((char *)"ethaddr", (char *)valbuf); - - /* IVM_MacCount */ - count = (buf[10] << 24) + - (buf[11] << 16) + - (buf[12] << 8) + - buf[13]; - if (count == 0xffffffff) - count = 1; - sprintf((char *)valbuf, "%lx", count); - ivm_set_value("IVM_MacCount", (char *)valbuf); - return 0; -} - -int ivm_analyze_eeprom(unsigned char *buf, int len) -{ - unsigned short val; - unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; - unsigned char *tmp; - - if (ivm_check_crc(buf, 0) != 0) - return -1; - - ivm_get_value(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, - "IVM_BoardId", 0, 1); - val = ivm_get_value(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, - "IVM_HWKey", 6, 1); - if (val != 0xffff) { - sprintf((char *)valbuf, "%x", ((val / 100) % 10)); - ivm_set_value("IVM_HWVariant", (char *)valbuf); - sprintf((char *)valbuf, "%x", (val % 100)); - ivm_set_value("IVM_HWVersion", (char *)valbuf); - } - ivm_get_value(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, - "IVM_Functions", 12, 0); - - GET_STRING("IVM_Symbol", IVM_POS_SYMBOL_ONLY, 8) - GET_STRING("IVM_DeviceName", IVM_POS_SHORT_TEXT, 64) - tmp = (unsigned char *) getenv("IVM_DeviceName"); - if (tmp) { - int len = strlen((char *)tmp); - int i = 0; - - while (i < len) { - if (tmp[i] == ';') { - ivm_set_value("IVM_ShortText", - (char *)&tmp[i + 1]); - break; - } - i++; - } - if (i >= len) - ivm_set_value("IVM_ShortText", NULL); - } else { - ivm_set_value("IVM_ShortText", NULL); - } - GET_STRING("IVM_ManufacturerID", IVM_POS_MANU_ID, 32) - GET_STRING("IVM_ManufacturerSerialNumber", IVM_POS_MANU_SERIAL, 20) - GET_STRING("IVM_ManufacturerPartNumber", IVM_POS_PART_NUMBER, 32) - GET_STRING("IVM_ManufacturerBuildState", IVM_POS_BUILD_STATE, 32) - GET_STRING("IVM_SupplierPartNumber", IVM_POS_SUPPLIER_PART_NUMBER, 32) - GET_STRING("IVM_DelieveryDate", IVM_POS_DELIVERY_DATE, 32) - GET_STRING("IVM_SupplierBuildState", IVM_POS_SUPPLIER_BUILD_STATE, 32) - GET_STRING("IVM_CustomerID", IVM_POS_CUSTOMER_ID, 32) - GET_STRING("IVM_CustomerProductID", IVM_POS_CUSTOMER_PROD_ID, 32) - - if (ivm_check_crc(&buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2], 2) != 0) - return 0; - ivm_analyze_block2(&buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2], - CONFIG_SYS_IVM_EEPROM_PAGE_LEN); - - return 0; -} - -int ivm_read_eeprom(void) -{ -#if defined(CONFIG_I2C_MUX) - I2C_MUX_DEVICE *dev = NULL; -#endif - uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; - uchar *buf; - unsigned dev_addr = CONFIG_SYS_IVM_EEPROM_ADR; - int ret; - -#if defined(CONFIG_I2C_MUX) - /* First init the Bus, select the Bus */ -#if defined(CONFIG_SYS_I2C_IVM_BUS) - dev = i2c_mux_ident_muxstring((uchar *)CONFIG_SYS_I2C_IVM_BUS); -#else - buf = (unsigned char *) getenv("EEprom_ivm"); - if (buf != NULL) - dev = i2c_mux_ident_muxstring(buf); -#endif - if (dev == NULL) { - printf("Error couldnt add Bus for IVM\n"); - return -1; - } - i2c_set_bus_num(dev->busid); -#endif - - buf = (unsigned char *) getenv("EEprom_ivm_addr"); - if (buf != NULL) - dev_addr = simple_strtoul((char *)buf, NULL, 16); - - /* add deblocking here */ - i2c_make_abort(); - - ret = i2c_read(dev_addr, 0, 1, i2c_buffer, - CONFIG_SYS_IVM_EEPROM_MAX_LEN); - if (ret != 0) { - printf ("Error reading EEprom\n"); - return -2; - } - - return ivm_analyze_eeprom(i2c_buffer, CONFIG_SYS_IVM_EEPROM_MAX_LEN); -} - -#if defined(CONFIG_SYS_I2C_INIT_BOARD) #define DELAY_ABORT_SEQ 62 /* @200kHz 9 clocks = 44us, 62us is ok */ #define DELAY_HALF_PERIOD (500 / (CONFIG_SYS_I2C_SPEED / 1000)) -#if defined(CONFIG_KM_82XX) -#define SDA_MASK 0x00010000 -#define SCL_MASK 0x00020000 -void set_pin(int state, unsigned long mask) -{ - ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3); - - if (state) - setbits_be32(&iop->pdat, mask); - else - clrbits_be32(&iop->pdat, mask); - - setbits_be32(&iop->pdir, mask); -} - -static int get_pin(unsigned long mask) -{ - ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3); - - clrbits_be32(&iop->pdir, mask); - return 0 != (in_be32(&iop->pdat) & mask); -} - -static void set_sda(int state) -{ - set_pin(state, SDA_MASK); -} - -static void set_scl(int state) -{ - set_pin(state, SCL_MASK); -} - -static int get_sda(void) -{ - return get_pin(SDA_MASK); -} - -static int get_scl(void) -{ - return get_pin(SCL_MASK); -} - -#if defined(CONFIG_HARD_I2C) -static void setports(int gpio) -{ - ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3); - - if (gpio) { - clrbits_be32(&iop->ppar, (SDA_MASK | SCL_MASK)); - clrbits_be32(&iop->podr, (SDA_MASK | SCL_MASK)); - } else { - setbits_be32(&iop->ppar, (SDA_MASK | SCL_MASK)); - clrbits_be32(&iop->pdir, (SDA_MASK | SCL_MASK)); - setbits_be32(&iop->podr, (SDA_MASK | SCL_MASK)); - } -} -#endif -#endif - #if !defined(CONFIG_MPC83xx) static void i2c_write_start_seq(void) { @@ -481,7 +105,7 @@ static void i2c_write_start_seq(void) * This I2C Deblocking mechanism was developed by Keymile in association * with Anatech and Atmel in 1998. */ -static int i2c_make_abort(void) +int i2c_make_abort(void) { #if defined(CONFIG_HARD_I2C) && !defined(MACH_TYPE_KM_KIRKWOOD) @@ -515,6 +139,7 @@ static int i2c_make_abort(void) sda_state = get_sda(); if (scl_state && sda_state) { ret = 0; + printf("[INFO] i2c abort after %d clocks\n", i); break; } } @@ -522,6 +147,8 @@ static int i2c_make_abort(void) if (ret == 0) for (i = 0; i < 5; i++) i2c_write_start_seq(); + else + printf("[ERROR] i2c abort failed\n"); /* respect stop setup time */ udelay(DELAY_ABORT_SEQ); @@ -536,7 +163,7 @@ static int i2c_make_abort(void) #endif return ret; } -#endif +#endif /* !MPC83xx */ #if defined(CONFIG_MPC83xx) static void i2c_write_start_seq(void) @@ -549,7 +176,7 @@ static void i2c_write_start_seq(void) out_8(&dev->cr, (I2C_CR_MEN)); } -static int i2c_make_abort(void) +int i2c_make_abort(void) { struct fsl_i2c *dev; dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET); @@ -609,63 +236,6 @@ void i2c_init_board(void) /* Now run the AbortSequence() */ i2c_make_abort(); } -#endif -#endif - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -int fdt_set_node_and_value(void *blob, - char *nodename, - char *regname, - void *var, - int size) -{ - int ret = 0; - int nodeoffset = 0; - - nodeoffset = fdt_path_offset(blob, nodename); - if (nodeoffset >= 0) { - ret = fdt_setprop(blob, nodeoffset, regname, var, - size); - if (ret < 0) - printf("ft_blob_update(): cannot set %s/%s " - "property err:%s\n", nodename, regname, - fdt_strerror(ret)); - } else { - printf("ft_blob_update(): cannot find %s node " - "err:%s\n", nodename, fdt_strerror(nodeoffset)); - } - return ret; -} - -int fdt_get_node_and_value(void *blob, - char *nodename, - char *propname, - void **var) -{ - int len; - int nodeoffset = 0; - - nodeoffset = fdt_path_offset(blob, nodename); - if (nodeoffset >= 0) { - *var = (void *)fdt_getprop(blob, nodeoffset, propname, &len); - if (len == 0) { - /* no value */ - printf("%s no value\n", __func__); - return -1; - } else if (len > 0) { - return len; - } else { - printf("libfdt fdt_getprop(): %s\n", - fdt_strerror(len)); - return -2; - } - } else { - printf("%s: cannot find %s node err:%s\n", __func__, - nodename, fdt_strerror(nodeoffset)); - return -3; - } -} -#endif #if !defined(MACH_TYPE_KM_KIRKWOOD) int ethernet_present(void) @@ -703,6 +273,7 @@ static int do_setboardid(cmd_tbl_t *cmdtp, int flag, int argc, } sprintf((char *)buf, "%s", p); setenv("boardid", (char *)buf); + printf("set boardid=%s\n", buf); p = get_local_var("IVM_HWKey"); if (p == NULL) { @@ -711,6 +282,8 @@ static int do_setboardid(cmd_tbl_t *cmdtp, int flag, int argc, } sprintf((char *)buf, "%s", p); setenv("hwkey", (char *)buf); + printf("set hwkey=%s\n", buf); + printf("Execute manually saveenv for persistent storage.\n"); return 0; } @@ -832,11 +405,7 @@ int do_checkboardidhwk(cmd_tbl_t *cmdtp, int flag, int argc, * Compare the values of the found entry in the * list with the valid values which are stored * in the inventory eeprom. If they are equal - * store the values in environment variables - * and save the environment. - * This can only happen once for the lifetime - * of a board, because once saved the function - * will never reach the while loop. + * set the values in environment variables. */ if ((bid == ivmbid) && (hwkey == ivmhwkey)) { char buf[10]; @@ -848,7 +417,6 @@ int do_checkboardidhwk(cmd_tbl_t *cmdtp, int flag, int argc, setenv("boardid", buf); sprintf(buf, "%lx", hwkey); setenv("hwkey", buf); - saveenv(); } } /* end while( ! found ) */ } @@ -859,7 +427,8 @@ int do_checkboardidhwk(cmd_tbl_t *cmdtp, int flag, int argc, printf("boardid=0x%3lX, hwkey=%ld\n", envbid, envhwkey); rc = 0; /* match */ } else { - printf("Error: env bId=0x%3lX, hwKey=%ld\n", envbid, envhwkey); + printf("Error: env boardid=0x%3lX, hwkey=%ld\n", envbid, + envhwkey); printf(" IVM bId=0x%3lX, hwKey=%ld\n", ivmbid, ivmhwkey); rc = 1; /* don't match */ } diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h index cee24d4..0fb19cf 100644 --- a/board/keymile/common/common.h +++ b/board/keymile/common/common.h @@ -124,7 +124,6 @@ struct bfticu_iomap { int ethernet_present(void); int ivm_read_eeprom(void); -void set_pin(int state, unsigned long mask); int set_km_env(void); int fdt_set_node_and_value(void *blob, @@ -138,4 +137,5 @@ int fdt_get_node_and_value(void *blob, void **var); int i2c_soft_read_pin(void); +int i2c_make_abort(void); #endif /* __KEYMILE_COMMON_H */ diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c new file mode 100644 index 0000000..d0cb0d2 --- /dev/null +++ b/board/keymile/common/ivm.c @@ -0,0 +1,342 @@ +/* + * (C) Copyright 2011 + * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <hush.h> +#include <i2c.h> +#include "common.h" + +int ivm_calc_crc(unsigned char *buf, int len) +{ + const unsigned short crc_tab[16] = { + 0x0000, 0xCC01, 0xD801, 0x1400, + 0xF001, 0x3C00, 0x2800, 0xE401, + 0xA001, 0x6C00, 0x7800, 0xB401, + 0x5000, 0x9C01, 0x8801, 0x4400}; + + unsigned short crc = 0; /* final result */ + unsigned short r1 = 0; /* temp */ + unsigned char byte = 0; /* input buffer */ + int i; + + /* calculate CRC from array data */ + for (i = 0; i < len; i++) { + byte = buf[i]; + + /* lower 4 bits */ + r1 = crc_tab[crc & 0xF]; + crc = ((crc) >> 4) & 0x0FFF; + crc = crc ^ r1 ^ crc_tab[byte & 0xF]; + + /* upper 4 bits */ + r1 = crc_tab[crc & 0xF]; + crc = (crc >> 4) & 0x0FFF; + crc = crc ^ r1 ^ crc_tab[(byte >> 4) & 0xF]; + } + return crc; +} + +static int ivm_set_value(char *name, char *value) +{ + char tempbuf[256]; + + if (value != NULL) { + sprintf(tempbuf, "%s=%s", name, value); + return set_local_var(tempbuf, 0); + } else { + unset_local_var(name); + } + return 0; +} + +static int ivm_get_value(unsigned char *buf, int len, char *name, int off, + int check) +{ + unsigned short val; + unsigned char valbuf[30]; + + if ((buf[off + 0] != buf[off + 2]) && + (buf[off + 2] != buf[off + 4])) { + printf("%s Error corrupted %s\n", __func__, name); + val = -1; + } else { + val = buf[off + 0] + (buf[off + 1] << 8); + if ((val == 0) && (check == 1)) + val = -1; + } + sprintf((char *)valbuf, "%x", val); + ivm_set_value(name, (char *)valbuf); + return val; +} + +#define INV_BLOCKSIZE 0x100 +#define INV_DATAADDRESS 0x21 +#define INVENTORYDATASIZE (INV_BLOCKSIZE - INV_DATAADDRESS - 3) + +#define IVM_POS_SHORT_TEXT 0 +#define IVM_POS_MANU_ID 1 +#define IVM_POS_MANU_SERIAL 2 +#define IVM_POS_PART_NUMBER 3 +#define IVM_POS_BUILD_STATE 4 +#define IVM_POS_SUPPLIER_PART_NUMBER 5 +#define IVM_POS_DELIVERY_DATE 6 +#define IVM_POS_SUPPLIER_BUILD_STATE 7 +#define IVM_POS_CUSTOMER_ID 8 +#define IVM_POS_CUSTOMER_PROD_ID 9 +#define IVM_POS_HISTORY 10 +#define IVM_POS_SYMBOL_ONLY 11 + +static char convert_char(char c) +{ + return (c < ' ' || c > '~') ? '.' : c; +} + +static int ivm_findinventorystring(int type, + unsigned char *const string, + unsigned long maxlen, + unsigned char *buf) +{ + int xcode = 0; + unsigned long cr = 0; + unsigned long addr = INV_DATAADDRESS; + unsigned long size = 0; + unsigned long nr = type; + int stop = 0; /* stop on semicolon */ + + memset(string, '\0', maxlen); + switch (type) { + case IVM_POS_SYMBOL_ONLY: + nr = 0; + stop = 1; + break; + default: + nr = type; + stop = 0; + } + + /* Look for the requested number of CR. */ + while ((cr != nr) && (addr < INVENTORYDATASIZE)) { + if ((buf[addr] == '\r')) + cr++; + addr++; + } + + /* + * the expected number of CR was found until the end of the IVM + * content --> fill string + */ + if (addr < INVENTORYDATASIZE) { + /* Copy the IVM string in the corresponding string */ + for (; (buf[addr] != '\r') && + ((buf[addr] != ';') || (!stop)) && + (size < (maxlen - 1) && + (addr < INVENTORYDATASIZE)); addr++) { + size += sprintf((char *)string + size, "%c", + convert_char (buf[addr])); + } + + /* + * copy phase is done: check if everything is ok. If not, + * the inventory data is most probably corrupted: tell + * the world there is a problem! + */ + if (addr == INVENTORYDATASIZE) { + xcode = -1; + printf("Error end of string not found\n"); + } else if ((size >= (maxlen - 1)) && + (buf[addr] != '\r')) { + xcode = -1; + printf("string too long till next CR\n"); + } + } else { + /* + * some CR are missing... + * the inventory data is most probably corrupted + */ + xcode = -1; + printf("not enough cr found\n"); + } + return xcode; +} + +#define GET_STRING(name, which, len) \ + if (ivm_findinventorystring(which, valbuf, len, buf) == 0) { \ + ivm_set_value(name, (char *)valbuf); \ + } + +static int ivm_check_crc(unsigned char *buf, int block) +{ + unsigned long crc; + unsigned long crceeprom; + + crc = ivm_calc_crc(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 2); + crceeprom = (buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 1] + \ + buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 2] * 256); + if (crc != crceeprom) { + if (block == 0) + printf("Error CRC Block: %d EEprom: calculated: \ + %lx EEprom: %lx\n", block, crc, crceeprom); + return -1; + } + return 0; +} + +static int ivm_analyze_block2(unsigned char *buf, int len) +{ + unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; + unsigned long count; + + /* IVM_MacAddress */ + sprintf((char *)valbuf, "%pM", buf); + ivm_set_value("IVM_MacAddress", (char *)valbuf); + /* if an offset is defined, add it */ +#if defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET) + if (CONFIG_PIGGY_MAC_ADRESS_OFFSET > 0) { + unsigned long val = (buf[4] << 16) + (buf[5] << 8) + buf[6]; + + val += CONFIG_PIGGY_MAC_ADRESS_OFFSET; + buf[4] = (val >> 16) & 0xff; + buf[5] = (val >> 8) & 0xff; + buf[6] = val & 0xff; + sprintf((char *)valbuf, "%pM", buf); + } +#endif + setenv((char *)"ethaddr", (char *)valbuf); + + /* IVM_MacCount */ + count = (buf[10] << 24) + + (buf[11] << 16) + + (buf[12] << 8) + + buf[13]; + if (count == 0xffffffff) + count = 1; + sprintf((char *)valbuf, "%lx", count); + ivm_set_value("IVM_MacCount", (char *)valbuf); + return 0; +} + +int ivm_analyze_eeprom(unsigned char *buf, int len) +{ + unsigned short val; + unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; + unsigned char *tmp; + + if (ivm_check_crc(buf, 0) != 0) + return -1; + + ivm_get_value(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, + "IVM_BoardId", 0, 1); + val = ivm_get_value(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, + "IVM_HWKey", 6, 1); + if (val != 0xffff) { + sprintf((char *)valbuf, "%x", ((val / 100) % 10)); + ivm_set_value("IVM_HWVariant", (char *)valbuf); + sprintf((char *)valbuf, "%x", (val % 100)); + ivm_set_value("IVM_HWVersion", (char *)valbuf); + } + ivm_get_value(buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, + "IVM_Functions", 12, 0); + + GET_STRING("IVM_Symbol", IVM_POS_SYMBOL_ONLY, 8) + GET_STRING("IVM_DeviceName", IVM_POS_SHORT_TEXT, 64) + tmp = (unsigned char *) getenv("IVM_DeviceName"); + if (tmp) { + int len = strlen((char *)tmp); + int i = 0; + + while (i < len) { + if (tmp[i] == ';') { + ivm_set_value("IVM_ShortText", + (char *)&tmp[i + 1]); + break; + } + i++; + } + if (i >= len) + ivm_set_value("IVM_ShortText", NULL); + } else { + ivm_set_value("IVM_ShortText", NULL); + } + GET_STRING("IVM_ManufacturerID", IVM_POS_MANU_ID, 32) + GET_STRING("IVM_ManufacturerSerialNumber", IVM_POS_MANU_SERIAL, 20) + GET_STRING("IVM_ManufacturerPartNumber", IVM_POS_PART_NUMBER, 32) + GET_STRING("IVM_ManufacturerBuildState", IVM_POS_BUILD_STATE, 32) + GET_STRING("IVM_SupplierPartNumber", IVM_POS_SUPPLIER_PART_NUMBER, 32) + GET_STRING("IVM_DelieveryDate", IVM_POS_DELIVERY_DATE, 32) + GET_STRING("IVM_SupplierBuildState", IVM_POS_SUPPLIER_BUILD_STATE, 32) + GET_STRING("IVM_CustomerID", IVM_POS_CUSTOMER_ID, 32) + GET_STRING("IVM_CustomerProductID", IVM_POS_CUSTOMER_PROD_ID, 32) + + if (ivm_check_crc(&buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2], 2) != 0) + return 0; + ivm_analyze_block2(&buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2], + CONFIG_SYS_IVM_EEPROM_PAGE_LEN); + + return 0; +} + +int ivm_read_eeprom(void) +{ +#if defined(CONFIG_I2C_MUX) + I2C_MUX_DEVICE *dev = NULL; +#endif + uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; + uchar *buf; + unsigned long dev_addr = CONFIG_SYS_IVM_EEPROM_ADR; + int ret; + +#if defined(CONFIG_I2C_MUX) + /* First init the Bus, select the Bus */ +#if defined(CONFIG_SYS_I2C_IVM_BUS) + dev = i2c_mux_ident_muxstring((uchar *)CONFIG_SYS_I2C_IVM_BUS); +#else + buf = (unsigned char *) getenv("EEprom_ivm"); + if (buf != NULL) + dev = i2c_mux_ident_muxstring(buf); +#endif + if (dev == NULL) { + printf("Error couldnt add Bus for IVM\n"); + return -1; + } + i2c_set_bus_num(dev->busid); +#endif + + buf = (unsigned char *) getenv("EEprom_ivm_addr"); + if (buf != NULL) { + ret = strict_strtoul((char *)buf, 16, &dev_addr); + if (ret != 0) + return -3; + } + + /* add deblocking here */ + i2c_make_abort(); + + ret = i2c_read(dev_addr, 0, 1, i2c_buffer, + CONFIG_SYS_IVM_EEPROM_MAX_LEN); + if (ret != 0) { + printf("Error reading EEprom\n"); + return -2; + } + + return ivm_analyze_eeprom(i2c_buffer, CONFIG_SYS_IVM_EEPROM_MAX_LEN); +} diff --git a/board/keymile/common/keymile_hdlc_enet.h b/board/keymile/common/keymile_hdlc_enet.h deleted file mode 100644 index db1560f..0000000 --- a/board/keymile/common/keymile_hdlc_enet.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * (C) Copyright 2008 - * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _KEYMILE_HDLC_ENET_H_ -#define _KEYMILE_HDLC_ENET_H_ - -/* Unfortuantely, we have do this to get the flag defines in the cbd_t */ -#ifdef CONFIG_KM8XX -#include <commproc.h> -#endif -#ifdef CONFIG_MGCOGE -#include <mpc8260.h> -#include <asm/cpm_8260.h> -#endif - -/* - * Defines for the ICN protocol used for communication over HDLC - * on the backplane between MGSUVDs and MGCOGEs. - */ - -/* - * MAC which is reserved for communication (0x00 - 0xff in the last byte, - * which is the slot number) - */ - -/* - * A DLL frame looks like this: - * 8 bit | 8 bit | 8 bit | 8 bit | n * 8 bit| 16 bit| 8 bit - * opening| destination| source | application| data | FCS | closing - * flag | address | address| | | | flag - * (HW) (APP) (APP) (APP) (APP) (HW) (HW) - */ - -/* - * The opening flag, the FCS and the closing flag are set by the hardware so - * they are not reflected in this struct. - */ -struct icn_hdr { - unsigned char dest_addr; - unsigned char src_addr; - unsigned char application; -} __attribute__((packed)); - -#define ICNHDR_LEN (sizeof(struct icn_hdr)) -#define CRC_LEN (sizeof(short)) -/* bytes to remove from packet before sending it upstream */ -#define REMOVE (ICNHDR_LEN + CRC_LEN) - -struct icn_frame { - struct icn_hdr hdr; - unsigned char data[0]; /* a place holder */ -} __attribute__((packed)); - -/* Address field */ -#define HDLC_UUA 0x00 /* Unicast Unit Address */ -#define HDLC_UUA_MASK 0x3f /* the last 6 bits contain the slot number */ -#define SET_HDLC_UUA(x) ((HDLC_UUA | ((x) & HDLC_UUA_MASK))) -#define HDLC_UACUA 0x7f /* Unicast Active Control Unit Address */ -#define HDLC_BCAST 0xff /* broadcast */ - -/* Application field */ -#define MGS_UUSP 0x00 -#define MGS_UREP 0x01 -#define MGS_IUP 0x02 -#define MGS_UTA 0x03 -#define MGS_MDS 0x04 -#define MGS_ITIME 0x05 -/* added by DENX */ -#define MGS_NETCONS 0x06 /* netconsole */ -#define MGS_TFTP 0x07 - -/* Useful defines for buffer sizes, etc. */ -#define HDLC_PKTBUFSRX 32 -#define MAX_FRAME_LENGTH 1500 /* ethernet frame size */ - /* 14 + 28 */ -#define INET_HDR_SIZE (ETHER_HDR_SIZE + IP_HDR_SIZE) -#define INET_HDR_ALIGN (((INET_HDR_SIZE + PKTALIGN - 1) / PKTALIGN) * PKTALIGN) -/* INET_HDR_SIZE is stripped off */ -#define PKT_MAXBLR_SIZE (MAX_FRAME_LENGTH + INET_HDR_ALIGN) - -/* - * It is too slow to read always the port numbers and IP addresses from the - * string variables. - * cachedNumbers is meant to cache it. - * THIS IS ONLY A SPEED IMPROVEMENT! - */ -enum { - IP_ADDR = 0, /* getenv_IPaddr("serverip"); */ - IP_SERVER, /* getenv_IPaddr("ipaddr"); */ - TFTP_SRC_PORT, /* simple_strtol(getenv("tftpsrcp"), NULL, 10); */ - TFTP_DST_PORT, /* simple_strtol(getenv("tftpdstp"), NULL, 10); */ - NETCONS_PORT, /* simple_strtol(getenv("ncip"), NULL, 10); */ - CACHEDNUMBERS -}; - -#define WELL_KNOWN_PORT 69 /* Well known TFTP port # */ - -/* define this to create a test commend (htest) */ -#undef TEST_IT -#ifdef TEST_IT -/* have to save a copy of the eth_device for the test command's use */ -struct eth_device *seth; -#endif -/* define this for outputting of received packets */ -#undef TEST_RX -/* define this for outputting of packets being sent */ -#undef TEST_TX - -#endif /* _KEYMILE_HDLC_ENET_H_ */ diff --git a/board/keymile/km82xx/Makefile b/board/keymile/km82xx/Makefile index a2b9da4..b9709d9 100644 --- a/board/keymile/km82xx/Makefile +++ b/board/keymile/km82xx/Makefile @@ -28,7 +28,7 @@ endif LIB = $(obj)lib$(BOARD).o -COBJS := $(BOARD).o ../common/common.o +COBJS := $(BOARD).o ../common/common.o ../common/ivm.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c index d453d25..0e50b0b 100644 --- a/board/keymile/km82xx/km82xx.c +++ b/board/keymile/km82xx/km82xx.c @@ -315,6 +315,8 @@ int last_stage_init(void) } #ifdef CONFIG_MGCOGE3NE +static void set_pin(int state, unsigned long mask); + /* * For mgcoge3ne boards, the mgcoge3un control is controlled from * a GPIO line on the PPC CPU. If bobcatreset is set the line @@ -363,6 +365,64 @@ int hush_init_var(void) return 0; } +#define SDA_MASK 0x00010000 +#define SCL_MASK 0x00020000 + +static void set_pin(int state, unsigned long mask) +{ + ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3); + + if (state) + setbits_be32(&iop->pdat, mask); + else + clrbits_be32(&iop->pdat, mask); + + setbits_be32(&iop->pdir, mask); +} + +static int get_pin(unsigned long mask) +{ + ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3); + + clrbits_be32(&iop->pdir, mask); + return 0 != (in_be32(&iop->pdat) & mask); +} + +void set_sda(int state) +{ + set_pin(state, SDA_MASK); +} + +void set_scl(int state) +{ + set_pin(state, SCL_MASK); +} + +int get_sda(void) +{ + return get_pin(SDA_MASK); +} + +int get_scl(void) +{ + return get_pin(SCL_MASK); +} + +#if defined(CONFIG_HARD_I2C) +static void setports(int gpio) +{ + ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3); + + if (gpio) { + clrbits_be32(&iop->ppar, (SDA_MASK | SCL_MASK)); + clrbits_be32(&iop->podr, (SDA_MASK | SCL_MASK)); + } else { + setbits_be32(&iop->ppar, (SDA_MASK | SCL_MASK)); + clrbits_be32(&iop->pdir, (SDA_MASK | SCL_MASK)); + setbits_be32(&iop->podr, (SDA_MASK | SCL_MASK)); + } +} +#endif #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) void ft_board_setup(void *blob, bd_t *bd) { diff --git a/board/keymile/km83xx/Makefile b/board/keymile/km83xx/Makefile index 2fa84f3..7bf64b4 100644 --- a/board/keymile/km83xx/Makefile +++ b/board/keymile/km83xx/Makefile @@ -28,7 +28,7 @@ endif LIB = $(obj)lib$(BOARD).o -COBJS += $(BOARD).o ../common/common.o +COBJS += $(BOARD).o ../common/common.o ../common/ivm.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/keymile/km_arm/Makefile b/board/keymile/km_arm/Makefile index 6bcfb25..4907030 100644 --- a/board/keymile/km_arm/Makefile +++ b/board/keymile/km_arm/Makefile @@ -29,7 +29,7 @@ endif LIB = $(obj)lib$(BOARD).o -COBJS := $(BOARD).o ../common/common.o +COBJS := $(BOARD).o ../common/common.o ../common/ivm.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 5da856f..a8f2b23 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -321,7 +321,7 @@ int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ /* Fix this */ - gd->ram_size = get_ram_size((volatile void *)kw_sdram_bar(0), + gd->ram_size = get_ram_size((void *)kw_sdram_bar(0), kw_sdram_bs(0)); return 0; } diff --git a/board/keymile/scripts/README b/board/keymile/scripts/README index 86c2b5a..7fbcf74 100644 --- a/board/keymile/scripts/README +++ b/board/keymile/scripts/README @@ -1,23 +1,31 @@ -debug-common-env.txt +These scripts are needed for our development usecases. Copy this directory +into your tftp root directory to be able to use this scripts. +cp -r <u-boot-repo>/board/keymile/scripts <your_tftp_root>/ + +To load and configure these usecase, two environment variables in the u-boot +default environment must be parsed: +run develop : setup environment to configure for rootfs via nfs +run ramfs : setup environment to configure for rootfs in ram + +Last change: 20.05.2011 + +develop-common.txt +============================ +This file defines variables for working with rootfs via nfs for powerpc and +arm. + +develop-<arch>.txt ============================ -This file defines environment variables which are valid for powerpc boards -and for arm boards. +This file defines architecture specific variables for working with rootfs via +nfs arm. -addramfs: add phram device for the rootfilesysten in ram -develop: for development, laod kernel via tftp and mount rootfs via NFS -nfsargs: default arguments for nfs boot -ramfs: load rootfilesystem in RAM kernel -rootfsfile: loacation of the rootfs file for ramfs -setramfspram: compute PRAM size for ramfs target -setrootfsaddr: compute rootfilesystem address for phram -tftpkernel: load a kernel with tftp into ram -tftpramfs: load rootfs with tftp into ram -debug-ppc-env.txt +ramfs-common.txt ============================ -fdt_file: location of the dtb file on the tftp server -tftpfdt: load dtb file and set fdt address +This file defines variables for working with rootfs inside the ram for powerpc +and arm. -debug-arm-env.txt +ramfs-<arch>.txt ============================ -tftpfdt: for arm only a dummy variable, because we have no fdt on arm +This file defines architecture specific variables for working with rootfs inside +ram. diff --git a/board/keymile/scripts/debug-arm-env.txt b/board/keymile/scripts/debug-arm-env.txt deleted file mode 100644 index 84498af..0000000 --- a/board/keymile/scripts/debug-arm-env.txt +++ /dev/null @@ -1,2 +0,0 @@ -debug_env_common=tftpboot 0x200000 scripts/debug-common-env.txt && env import -t 0x200000 ${filesize} -tftpfdt=true diff --git a/board/keymile/scripts/debug-common-env.txt b/board/keymile/scripts/debug-common-env.txt deleted file mode 100644 index 1fd4b0c..0000000 --- a/board/keymile/scripts/debug-common-env.txt +++ /dev/null @@ -1,9 +0,0 @@ -addramfs=setenv bootargs "${bootargs} phram.phram=rootfs${boot_bank},${rootfsaddr},${rootfssize}" -develop=setenv subbootcmds "tftpfdt tftpkernel nfsargs ${commonargs} boot " && setenv bootcmd 'run bootrunner' && setenv altbootcmd 'run bootcmd' && km_setboardid && saveenv && reset -nfsargs=setenv bootargs ubi.mtd=ubi0 root=/dev/nfs rw nfsroot=${serverip}:${rootpath} -ramfs=setenv actual_bank -1 && setenv subbootcmds "tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs ${commonargs} addpanic addramfs boot " && setenv bootcmd 'run bootrunner' && setenv altbootcmd 'run bootcmd' && run setboardid && run setramfspram && run setpnvramaddr && saveenv && reset -rootfsfile=${hostname}/rootfsImage -setramfspram=setexpr value 0 + ${reservedpram} && setexpr value 0x${value} + ${rootfssize} && setexpr value 0x${value} + ${varsize} && setexpr value 0x${value} + ${pnvramsize} && setexpr value 0x${value} / 0x400 && setenv pram 0x${value} -tftpkernel=tftpboot ${kernel_addr_r} ${hostname}/uImage && setenv actual_kernel_addr ${kernel_addr_r} -tftpramfs=tftpboot ${rootfsaddr} ${hostname}/rootfsImage && setenv loadaddr -setrootfsaddr=setexpr value ${pnvramsize} - ${rootfssize} && setenv rootfsaddr 0x${value} diff --git a/board/keymile/scripts/debug-ppc-env.txt b/board/keymile/scripts/debug-ppc-env.txt deleted file mode 100644 index 3c06ff1..0000000 --- a/board/keymile/scripts/debug-ppc-env.txt +++ /dev/null @@ -1,2 +0,0 @@ -debug_env_common=tftpboot 0x200000 scripts/debug-common-env.txt && env import -t 0x200000 ${filesize} -tftpfdt=tftpboot ${fdt_addr_r} ${hostname}/${hostname}.dtb && setenv actual_fdt_addr ${fdt_addr_r} diff --git a/board/keymile/scripts/develop-arm.txt b/board/keymile/scripts/develop-arm.txt new file mode 100644 index 0000000..922afea --- /dev/null +++ b/board/keymile/scripts/develop-arm.txt @@ -0,0 +1,2 @@ +setup_debug_env=tftpboot 0x200000 scripts/develop-common.txt && env import -t 0x200000 ${filesize} && run configure +tftpfdt=true diff --git a/board/keymile/scripts/develop-common.txt b/board/keymile/scripts/develop-common.txt new file mode 100644 index 0000000..3ccd039 --- /dev/null +++ b/board/keymile/scripts/develop-common.txt @@ -0,0 +1,6 @@ +altbootcmd=run ${subbootcmds} +bootcmd=run ${subbootcmds} +configure=km_setboardid && saveenv && reset +subbootcmds=tftpfdt tftpkernel nfsargs add_default boot +nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:/opt/eldk/${arch} +tftpkernel=tftpboot ${load_addr_r} ${hostname}/uImage diff --git a/board/keymile/scripts/develop-ppc_82xx.txt b/board/keymile/scripts/develop-ppc_82xx.txt new file mode 100644 index 0000000..909f6a3 --- /dev/null +++ b/board/keymile/scripts/develop-ppc_82xx.txt @@ -0,0 +1,2 @@ +setup_debug_env=tftpboot 0x200000 scripts/develop-common.txt && env import -t 0x200000 ${filesize} && run configure +tftpfdt=tftpboot ${fdt_addr_r} ${hostname}/${hostname}.dtb diff --git a/board/keymile/scripts/develop-ppc_8xx.txt b/board/keymile/scripts/develop-ppc_8xx.txt new file mode 100644 index 0000000..909f6a3 --- /dev/null +++ b/board/keymile/scripts/develop-ppc_8xx.txt @@ -0,0 +1,2 @@ +setup_debug_env=tftpboot 0x200000 scripts/develop-common.txt && env import -t 0x200000 ${filesize} && run configure +tftpfdt=tftpboot ${fdt_addr_r} ${hostname}/${hostname}.dtb diff --git a/board/keymile/scripts/ramfs-arm.txt b/board/keymile/scripts/ramfs-arm.txt new file mode 100644 index 0000000..79974f1 --- /dev/null +++ b/board/keymile/scripts/ramfs-arm.txt @@ -0,0 +1,2 @@ +setup_debug_env=tftpboot 0x200000 scripts/ramfs-common.txt && env import -t 0x200000 ${filesize} && run configure +tftpfdt=true diff --git a/board/keymile/scripts/ramfs-common.txt b/board/keymile/scripts/ramfs-common.txt new file mode 100644 index 0000000..9315500 --- /dev/null +++ b/board/keymile/scripts/ramfs-common.txt @@ -0,0 +1,12 @@ +addramfs=setenv bootargs "${bootargs} mem=${rootfsaddr} phram.phram=rootfs${boot_bank},${rootfsaddr},${rootfssize}" +actual_bank=-1 +altbootcmd=run ${subbootcmds} +bootcmd=run ${subbootcmds} +subbootcmds=tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default addpanic addramfs boot +nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} +configure=km_setboardid && run setramfspram && saveenv && reset +setramfspram=setexpr value 0 + ${rootfssize} && setexpr value 0x${value} / 0x400 && setexpr value 0x${value} + ${pram} && setenv pram 0x${value} +rootfsfile=${hostname}/rootfsImage +setrootfsaddr=setexpr value ${pnvramaddr} - ${rootfssize} && setenv rootfsaddr 0x${value} +tftpkernel=tftpboot ${load_addr_r} ${hostname}/uImage +tftpramfs=tftpboot ${rootfsaddr} ${hostname}/rootfsImage diff --git a/board/keymile/scripts/ramfs-ppc_82xx.txt b/board/keymile/scripts/ramfs-ppc_82xx.txt new file mode 100644 index 0000000..970927a --- /dev/null +++ b/board/keymile/scripts/ramfs-ppc_82xx.txt @@ -0,0 +1,2 @@ +setup_debug_env=tftpboot 0x200000 scripts/ramfs-common.txt && env import -t 0x200000 ${filesize} && run configure +tftpfdt=tftpboot ${fdt_addr_r} ${hostname}/${hostname}.dtb diff --git a/board/keymile/scripts/ramfs-ppc_8xx.txt b/board/keymile/scripts/ramfs-ppc_8xx.txt new file mode 100644 index 0000000..970927a --- /dev/null +++ b/board/keymile/scripts/ramfs-ppc_8xx.txt @@ -0,0 +1,2 @@ +setup_debug_env=tftpboot 0x200000 scripts/ramfs-common.txt && env import -t 0x200000 ${filesize} && run configure +tftpfdt=tftpboot ${fdt_addr_r} ${hostname}/${hostname}.dtb diff --git a/board/lart/flash.c b/board/lart/flash.c index 29a331e..408c884 100644 --- a/board/lart/flash.c +++ b/board/lart/flash.c @@ -250,6 +250,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) ulong result; int iflag, cflag, prot, sect; int rc = ERR_OK; + ulong start; /* first look for protection bits */ @@ -291,7 +292,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ @@ -305,7 +306,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) do { /* check timeout */ - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = PUZZLE_TO_FLASH(CMD_SUSPEND); result = BIT_TIMEOUT; @@ -354,6 +355,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) ulong result; int rc = ERR_OK; int cflag, iflag; + ulong start; /* Check if Flash is (sufficiently) erased */ @@ -377,13 +379,13 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); /* wait until flash is ready */ do { /* check timeout */ - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = PUZZLE_TO_FLASH(CMD_SUSPEND); result = BIT_TIMEOUT; diff --git a/board/logicpd/imx27lite/imx27lite.c b/board/logicpd/imx27lite/imx27lite.c index 6eb5cc2..2b273ac 100644 --- a/board/logicpd/imx27lite/imx27lite.c +++ b/board/logicpd/imx27lite/imx27lite.c @@ -38,7 +38,7 @@ int board_init (void) gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; #ifdef CONFIG_MXC_UART - mx27_uart_init_pins(); + mx27_uart1_init_pins(); #endif #ifdef CONFIG_FEC_MXC mx27_fec_init_pins(); @@ -67,7 +67,7 @@ int board_init (void) int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); return 0; } @@ -75,11 +75,11 @@ int dram_init (void) void dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE, + gd->bd->bi_dram[0].size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE); #if CONFIG_NR_DRAM_BANKS > 1 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2, + gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); #endif } diff --git a/board/logicpd/imx31_litekit/imx31_litekit.c b/board/logicpd/imx31_litekit/imx31_litekit.c index bf635c3..09cc9c5 100644 --- a/board/logicpd/imx31_litekit/imx31_litekit.c +++ b/board/logicpd/imx31_litekit/imx31_litekit.c @@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/logicpd/zoom2/zoom2_serial.c b/board/logicpd/zoom2/zoom2_serial.c index fcfe624..74f165f 100644 --- a/board/logicpd/zoom2/zoom2_serial.c +++ b/board/logicpd/zoom2/zoom2_serial.c @@ -132,3 +132,8 @@ QUAD_INIT (0) QUAD_INIT (1) QUAD_INIT (2) QUAD_INIT (3) + +struct serial_device *default_serial_console(void) +{ + return ZOOM2_DEFAULT_SERIAL_DEVICE; +} diff --git a/board/logicpd/zoom2/zoom2_serial.h b/board/logicpd/zoom2/zoom2_serial.h index a6d2427..4e30587 100644 --- a/board/logicpd/zoom2/zoom2_serial.h +++ b/board/logicpd/zoom2/zoom2_serial.h @@ -33,7 +33,6 @@ extern int zoom2_debug_board_connected (void); #define S(a) #a #define N(a) S(quad##a) -#define U(a) S(UART##a) #define QUAD_INIT(n) \ int quad_init_##n(void) \ @@ -63,7 +62,6 @@ int quad_tstc_##n(void) \ struct serial_device zoom2_serial_device##n = \ { \ N(n), \ - U(n), \ quad_init_##n, \ NULL, \ quad_setbrg_##n, \ diff --git a/board/lpd7a40x/flash.c b/board/lpd7a40x/flash.c index a3ba75b..f5c0713 100644 --- a/board/lpd7a40x/flash.c +++ b/board/lpd7a40x/flash.c @@ -229,6 +229,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) ulong result, result1; int iflag, prot, sect; int rc = ERR_OK; + ulong start; #ifdef USE_920T_MMU int cflag; @@ -284,7 +285,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) sect, info->start[sect]); /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ vu_long *addr = (vu_long *) (info->start[sect]); @@ -297,7 +298,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) /* wait until flash is ready */ do { /* check timeout */ - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = CMD_STATUS_RESET; result = BIT_TIMEOUT; break; @@ -357,6 +358,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) ulong result; int rc = ERR_OK; int iflag; + ulong start; #ifdef USE_920T_MMU int cflag; @@ -387,12 +389,12 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait until flash is ready */ do { /* check timeout */ - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = CMD_SUSPEND; result = BIT_TIMEOUT; break; diff --git a/board/lubbock/flash.c b/board/lubbock/flash.c index a4b201e..1ea2893 100644 --- a/board/lubbock/flash.c +++ b/board/lubbock/flash.c @@ -221,7 +221,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -254,9 +254,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -269,14 +266,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050; /* clear status register */ *addr = (FPW) 0x00200020; /* erase setup */ *addr = (FPW) 0x00D000D0; /* erase confirm */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW) 0x00B000B0; /* suspend erase */ *addr = (FPW) 0x00FF00FF; /* reset to read mode */ @@ -393,6 +390,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -406,11 +404,11 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start)) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/matrix_vision/common/mv_common.c b/board/matrix_vision/common/mv_common.c index 0afc535..404c8b4 100644 --- a/board/matrix_vision/common/mv_common.c +++ b/board/matrix_vision/common/mv_common.c @@ -38,6 +38,7 @@ static char* entries_to_keep[] = { #define MV_MAX_ENV_ENTRY_LENGTH 64 #define MV_KEEP_ENTRIES ARRAY_SIZE(entries_to_keep) +#ifndef CONFIG_ENV_IS_NOWHERE void mv_reset_environment(void) { int i; @@ -67,6 +68,7 @@ void mv_reset_environment(void) saveenv(); } +#endif int mv_load_fpga(void) { diff --git a/board/matrix_vision/mergerbox/fpga.c b/board/matrix_vision/mergerbox/fpga.c index 673bc2c..021e9c4 100644 --- a/board/matrix_vision/mergerbox/fpga.c +++ b/board/matrix_vision/mergerbox/fpga.c @@ -161,7 +161,7 @@ static inline int _write_fpga(u8 val, int dump) return 0; } -int fpga_wr_fn(void *buf, size_t len, int flush, int cookie) +int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie) { unsigned char *data = (unsigned char *) buf; int i; diff --git a/board/matrix_vision/mergerbox/fpga.h b/board/matrix_vision/mergerbox/fpga.h index fccff9f..89f879a 100644 --- a/board/matrix_vision/mergerbox/fpga.h +++ b/board/matrix_vision/mergerbox/fpga.h @@ -26,5 +26,5 @@ extern int fpga_status_fn(int cookie); extern int fpga_config_fn(int assert, int flush, int cookie); extern int fpga_done_fn(int cookie); extern int fpga_clk_fn(int assert_clk, int flush, int cookie); -extern int fpga_wr_fn(void *buf, size_t len, int flush, int cookie); +extern int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie); extern int fpga_null_fn(int cookie); diff --git a/board/matrix_vision/mvbc_p/fpga.c b/board/matrix_vision/mvbc_p/fpga.c index 3ed46fe..6ce96ba 100644 --- a/board/matrix_vision/mvbc_p/fpga.c +++ b/board/matrix_vision/mvbc_p/fpga.c @@ -160,7 +160,7 @@ static inline int _write_fpga(u8 val) return 0; } -int fpga_wr_fn(void *buf, size_t len, int flush, int cookie) +int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie) { unsigned char *data = (unsigned char *) buf; int i; diff --git a/board/matrix_vision/mvbc_p/fpga.h b/board/matrix_vision/mvbc_p/fpga.h index 3723073..8f74a00 100644 --- a/board/matrix_vision/mvbc_p/fpga.h +++ b/board/matrix_vision/mvbc_p/fpga.h @@ -30,5 +30,5 @@ extern int fpga_status_fn(int cookie); extern int fpga_config_fn(int assert, int flush, int cookie); extern int fpga_done_fn(int cookie); extern int fpga_clk_fn(int assert_clk, int flush, int cookie); -extern int fpga_wr_fn(void *buf, size_t len, int flush, int cookie); +extern int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie); extern int fpga_null_fn(int cookie); diff --git a/board/matrix_vision/mvblm7/fpga.c b/board/matrix_vision/mvblm7/fpga.c index 7b03d6f..dc5a738 100644 --- a/board/matrix_vision/mvblm7/fpga.c +++ b/board/matrix_vision/mvblm7/fpga.c @@ -172,7 +172,7 @@ static inline int _write_fpga(u8 val, int dump) return 0; } -int fpga_wr_fn(void *buf, size_t len, int flush, int cookie) +int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie) { unsigned char *data = (unsigned char *) buf; int i; diff --git a/board/matrix_vision/mvblm7/fpga.h b/board/matrix_vision/mvblm7/fpga.h index 19277eb..f422f20 100644 --- a/board/matrix_vision/mvblm7/fpga.h +++ b/board/matrix_vision/mvblm7/fpga.h @@ -30,5 +30,5 @@ extern int fpga_status_fn(int cookie); extern int fpga_config_fn(int assert, int flush, int cookie); extern int fpga_done_fn(int cookie); extern int fpga_clk_fn(int assert_clk, int flush, int cookie); -extern int fpga_wr_fn(void *buf, size_t len, int flush, int cookie); +extern int fpga_wr_fn(const void *buf, size_t len, int flush, int cookie); extern int fpga_null_fn(int cookie); diff --git a/board/modnet50/flash.c b/board/modnet50/flash.c index 4c31143..4834e21 100644 --- a/board/modnet50/flash.c +++ b/board/modnet50/flash.c @@ -291,6 +291,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, sect, setup_offset = 0; int rc = ERR_OK; + ulong start; if (info->flash_id == FLASH_UNKNOWN) { printf ("- missing\n"); @@ -338,14 +339,14 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) (__u16) SECERASE_CMD; /* wait some time */ - reset_timer_masked (); - while (get_timer_masked () < 1000) { + start = get_timer(0); + while (get_timer(start) < 1000) { } /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); while (flash_check_erase_amd (info->start[sect])) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("timeout!\n"); /* OOPS: reach timeout, * try to reset chip @@ -411,6 +412,7 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) { int rc = ERR_OK; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*(__u16 *) (dest) & data) != data) @@ -446,10 +448,10 @@ static int write_word (flash_info_t * info, ulong dest, ushort data) } /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); while (flash_check_write_amd (dest)) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { printf ("timeout! @ %08lX\n", dest); /* OOPS: reach timeout, * try to reset chip */ diff --git a/board/mpl/common/usb_uhci.c b/board/mpl/common/usb_uhci.c index a009437..89d2e0a 100644 --- a/board/mpl/common/usb_uhci.c +++ b/board/mpl/common/usb_uhci.c @@ -67,7 +67,7 @@ * * Interrupt Transfers. * -------------------- - * For Interupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They + * For Interrupt transfers USB_MAX_TEMP_INT_TD Transfer descriptor are available. They * will be inserted after the appropriate (depending the interval setting) skeleton TD. * If an interrupt has been detected the dev->irqhandler is called. The status and number * of transfered bytes is stored in dev->irq_status resp. dev->irq_act_len. If the diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c index c11c0fe..86b49fb 100644 --- a/board/mx1ads/mx1ads.c +++ b/board/mx1ads/mx1ads.c @@ -169,7 +169,7 @@ int board_late_init (void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); return 0; } diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c index 47f613c..7331efa 100644 --- a/board/mx1ads/syncflash.c +++ b/board/mx1ads/syncflash.c @@ -276,7 +276,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) { /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + get_timer(0); SF_NvmodeErase(); SF_NvmodeWrite(); diff --git a/board/netstal/common/fixed_sdram.c b/board/netstal/common/fixed_sdram.c deleted file mode 100644 index 51b34b2..0000000 --- a/board/netstal/common/fixed_sdram.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - *(C) Copyright 2005-2008 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * This source code is free software; you can redistribute it - * and/or modify it in source code form under the terms of the GNU - * General Public License as published by the Free Software - * Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ - -#include <common.h> -#include <asm/ppc4xx.h> -#include <asm/processor.h> -#include "nm.h" - -#if defined(DEBUG) -void show_sdram_registers(void) -{ - u32 value; - - printf("SDRAM Controller Registers --\n"); - mfsdram(SDRAM0_CFG, value); - printf(" SDRAM0_CFG : 0x%08x\n", value); - mfsdram(SDRAM0_STATUS, value); - printf(" SDRAM0_STATUS: 0x%08x\n", value); - mfsdram(SDRAM0_B0CR, value); - printf(" SDRAM0_B0CR : 0x%08x\n", value); - mfsdram(SDRAM0_B1CR, value); - printf(" SDRAM0_B1CR : 0x%08x\n", value); - mfsdram(SDRAM0_TR, value); - printf(" SDRAM0_TR : 0x%08x\n", value); - mfsdram(SDRAM0_RTR, value); - printf(" SDRAM0_RTR : 0x%08x\n", value); -} -#endif - -long int init_ppc405_sdram(unsigned int dram_size) -{ -#ifdef DEBUG - printf(__FUNCTION__); -#endif - /* disable memory controller */ - mtsdram(SDRAM0_CFG, 0x00000000); - - udelay (500); - - /* Clear SDRAM0_BESR0 (Bus Error Syndrome Register) */ - mtsdram(SDRAM0_BESR0, 0xffffffff); - - /* Clear SDRAM0_BESR1 (Bus Error Syndrome Register) */ - mtsdram(SDRAM0_BESR1, 0xffffffff); - - /* Clear SDRAM0_ECCCFG (disable ECC) */ - mtsdram(SDRAM0_ECCCFG, 0x00000000); - - /* Clear SDRAM0_ECCESR (ECC Error Syndrome Register) */ - mtsdram(SDRAM0_ECCESR, 0xffffffff); - - /* Timing register: CASL=2, PTA=2, CTP=2, LDF=1, RFTA=5, RCD=2 - */ - mtsdram(SDRAM0_TR, 0x008a4015); - - /* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1 - * and refresh timer - */ - switch (dram_size >> 20) { - case 32: - mtsdram(SDRAM0_B0CR, 0x00062001); - mtsdram(SDRAM0_RTR, 0x07F00000); - break; - case 64: - mtsdram(SDRAM0_B0CR, 0x00084001); - mtsdram(SDRAM0_RTR, 0x04100000); - break; - case 128: - mtsdram(SDRAM0_B0CR, 0x000A4001); - mtsdram(SDRAM0_RTR, 0x04100000); - break; - default: - printf("Invalid memory size of %d MB given\n", dram_size >> 20); - } - - /* Power management idle timer set to the default. */ - mtsdram(SDRAM0_PMIT, 0x07c00000); - - udelay (500); - - /* Enable banks (DCE=1, BPRF=1, ECCDD=1, EMDUL=1) TODO */ - mtsdram(SDRAM0_CFG, 0x90800000); - -#ifdef DEBUG - printf("%s: done\n", __FUNCTION__); -#endif - return dram_size; -} diff --git a/board/netstal/common/nm.h b/board/netstal/common/nm.h deleted file mode 100644 index 3dff1d6..0000000 --- a/board/netstal/common/nm.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - *(C) Copyright 2005-2007 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * This source code is free software; you can redistribute it - * and/or modify it in source code form under the terms of the GNU - * General Public License as published by the Free Software - * Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ - -extern void hcu_led_set(u32 value); -extern u32 get_serial_number(void); -extern u32 hcu_get_slot(void); -extern int board_with_pci(void); -extern void nm_show_print(int generation, int index, int hw_capabilities); -extern void set_params_for_sw_install(int install_requested, char *board_name ); -extern void common_misc_init_r(void); - -enum { - /* HW_GENERATION_HCU1/2 is no longer supported */ - HW_GENERATION_HCU3 = 0x10, - HW_GENERATION_HCU4 = 0x20, - HW_GENERATION_HCU5 = 0x30, - HW_GENERATION_MCU = 0x08, - HW_GENERATION_MCU20 = 0x0a, - HW_GENERATION_MCU25 = 0x09, -}; - -#ifdef CONFIG_405GP -#if defined(DEBUG) -void show_sdram_registers(void); -#endif -long int init_ppc405_sdram(unsigned int dram_size); -#endif diff --git a/board/netstal/common/nm_bsp.c b/board/netstal/common/nm_bsp.c deleted file mode 100644 index 237f4ed..0000000 --- a/board/netstal/common/nm_bsp.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - *(C) Copyright 2005-2008 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * This source code is free software; you can redistribute it - * and/or modify it in source code form under the terms of the GNU - * General Public License as published by the Free Software - * Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ - -#include <common.h> -#include <command.h> -#include <net.h> -#include "nm.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define DEFAULT_ETH_ADDR "ethaddr" - -typedef struct {u8 id; char *name;} generation_info; - -generation_info generations[6] = { - {HW_GENERATION_HCU3, "HCU3"}, - {HW_GENERATION_HCU4, "HCU4"}, - {HW_GENERATION_HCU5, "HCU5"}, - {HW_GENERATION_MCU, "MCU"}, - {HW_GENERATION_MCU20, "MCU20"}, - {HW_GENERATION_MCU25, "MCU25"}, -}; - -void nm_show_print(int generation, int index, int hw_capabilities) -{ - int j; - char *generationName=0; - - /* reset ANSI terminal color mode */ - printf("\x1B""[0m""Netstal Maschinen AG: "); - for (j=0; j < (sizeof(generations)/sizeof(generations[0])); j++) { - if (generations[j].id == generation) { - generationName = generations[j].name; - break; - } - } - printf("%s: index %d HW 0x%x\n", generationName, index, hw_capabilities); - for (j = 0;j < 6; j++) { - hcu_led_set(1 << j); - udelay(200 * 1000); - } -} - -void set_params_for_sw_install(int install_requested, char *board_name ) -{ - if (install_requested) { - char string[128]; - - printf("\n\n%s SW-Installation: %d patching boot parameters\n", - board_name, install_requested); - setenv("bootdelay", "0"); - setenv("loadaddr", "0x01000000"); - setenv("serverip", "172.25.1.1"); - setenv("bootcmd", "run install"); - sprintf(string, "tftp ${loadaddr} admin/sw_on_hd; " - "tftp ${loadaddr} installer/%s_sw_inst; " - "run boot_sw_inst", board_name); - setenv("install", string); - sprintf(string, "setenv bootargs emac(0,0)c:%s/%s_sw_inst " - "e=${ipaddr} h=${serverip} f=0x1000; " - "bootvx ${loadaddr}%c", - board_name, board_name, 0); - setenv("boot_sw_inst", string); - } -} - -void common_misc_init_r(void) -{ - IPaddr_t ipaddr; - char *ipstring; - uchar ethaddr[6]; - - if (!eth_getenv_enetaddr(DEFAULT_ETH_ADDR, ethaddr)) { - /* Must be in sync with CONFIG_ETHADDR */ - u32 serial = get_serial_number(); - ethaddr[0] = 0x00; - ethaddr[1] = 0x60; - ethaddr[2] = 0x13; - ethaddr[3] = (serial >> 16) & 0xff; - ethaddr[4] = (serial >> 8) & 0xff; - ethaddr[5] = hcu_get_slot(); - eth_setenv_enetaddr(DEFAULT_ETH_ADDR, ethaddr); - } - - /* IP-Adress update */ - ipstring = getenv("ipaddr"); - if (ipstring == 0) - ipaddr = string_to_ip("172.25.1.99"); - else - ipaddr = string_to_ip(ipstring); - if ((ipaddr & 0xff) != (32 + hcu_get_slot())) { - char tmp[22]; - - ipaddr = (ipaddr & 0xffffff00) + 32 + hcu_get_slot(); - ip_to_string (ipaddr, tmp); - printf("%s: enforce %s\n", __FUNCTION__, tmp); - setenv("ipaddr", tmp); - saveenv(); - } -} diff --git a/board/netstal/hcu4/README.txt b/board/netstal/hcu4/README.txt deleted file mode 100644 index 1e9c64a..0000000 --- a/board/netstal/hcu4/README.txt +++ /dev/null @@ -1,59 +0,0 @@ -HCU4 Configuration Details - -Memory Bank 0 -- Flash chip ---------------------------- - -0xfff00000 - 0xffffffff - -The flash chip is really only 512Kbytes, but the high address bit of -the 1Meg region is ignored, so the flash is replicated through the -region. Thus, this is consistent with a flash base address 0xfff80000. - -The placement at the end is to be consistent with reset behavior, -where the processor itself initially uses this bus to load the branch -vector and start running. - -On-Chip Memory --------------- - -0xf4000000 - 0xf4000fff - -The 405GPr includes a 4K on-chip memory that can be placed however -software chooses. I choose to place the memory at this address, to -keep it out of the cachable areas. - - -Internal Peripherals --------------------- - -0xef600300 - 0xef6008ff - -These are scattered various peripherals internal to the PPC405GPr -chip. - -Chip-Select 2: Flash Memory ---------------------------- - -0x70000000 - -Chip-Select 3: CAN Interface ----------------------------- -0x7800000 - - -Chip-Select 4: IMC-bus standard -------------------------------- - -Our IO-Bus (slow version) - - -Chip-Select 5: IMC-bus fast (inactive) --------------------------------------- - -Our IO-Bus (fast, but not yet use) - - -Memory Bank 1 -- SDRAM -------------------------------------- - -0x00000000 - 0x1ffffff # Default 32 MB diff --git a/board/netstal/hcu4/config.mk b/board/netstal/hcu4/config.mk deleted file mode 100644 index fd3e889..0000000 --- a/board/netstal/hcu4/config.mk +++ /dev/null @@ -1,25 +0,0 @@ -# -# (C) Copyright 2005 Netstal Maschinen AG -# Niklaus Giger (ng@netstal.com) -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Netstal Maschinen AG: HCU4 boards -# -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -g -endif diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c deleted file mode 100644 index aaf3616..0000000 --- a/board/netstal/hcu4/hcu4.c +++ /dev/null @@ -1,198 +0,0 @@ -/* - *(C) Copyright 2005-2008 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * This source code is free software; you can redistribute it - * and/or modify it in source code form under the terms of the GNU - * General Public License as published by the Free Software - * Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ - -#include <common.h> -#include <asm/ppc4xx.h> -#include <asm/processor.h> -#include <asm/io.h> -#include <asm/u-boot.h> -#include "../common/nm.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000) -#define HCU_SLOT_ADDRESS (0x7C000000 + 0x400000) -#define HCU_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000) -#define HCU_SW_INSTALL_REQUESTED 0x10 - -/* - * This function is run very early, out of flash, and before devices are - * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue - * of being in the init_sequence array. - * - * The SDRAM has been initialized already -- start.S:start called - * init.S:init_sdram early on -- but it is not yet being used for - * anything, not even stack. So be careful. - */ - -/* Attention: If you want 1 microsecs times from the external oscillator - * 0x00004051 is okay for u-boot/linux, but different from old vxworks values - * 0x00804051 causes problems with u-boot and linux! - */ -#define CPC0_CR0_VALUE 0x0030103c -#define CPC0_CR1_VALUE 0x00004051 - -int board_early_init_f (void) -{ - /* - * Interrupt controller setup for the HCU4 board. - * Note: IRQ 0-15 405GP internally generated; high; level sensitive - * IRQ 16 405GP internally generated; low; level sensitive - * IRQ 17-24 RESERVED/UNUSED - * IRQ 31 (EXT IRQ 6) (unused) - */ - mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ - mtdcr(UIC0ER, 0x00000000); /* disable all ints */ - mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */ - mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */ - mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */ - mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ - - mtdcr(CPC0_CR1, CPC0_CR1_VALUE); - mtdcr(CPC0_ECR, 0x60606000); - mtdcr(CPC0_EIRR, 0x7C000000); - - return 0; -} - -#ifdef CONFIG_BOARD_PRE_INIT -int board_pre_init (void) -{ - return board_early_init_f (); -} -#endif - -int sys_install_requested(void) -{ - u16 ioValue = in_be16((u16 *)HCU_DIGITAL_IO_REGISTER); - return (ioValue & HCU_SW_INSTALL_REQUESTED) != 0; -} - -int checkboard (void) -{ - u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER); - u16 generation = boardVersReg & 0xf0; - u16 index = boardVersReg & 0x0f; - - /* Cannot be done in board_early_init */ - mtdcr(CPC0_CR0, CPC0_CR0_VALUE); - - /* Force /RTS to active. The board it not wired quite - * correctly to use cts/rtc flow control, so just force the - * /RST active and forget about it. - */ - writeb (readb (0xef600404) | 0x03, 0xef600404); - nm_show_print(generation, index, 0); - - return 0; -} - -u32 hcu_led_get(void) -{ - return (~(in_be32((u32 *)GPIO0_OR)) >> 23) & 0xff; -} - -/* - * hcu_led_set value to be placed into the LEDs (max 6 bit) - */ -void hcu_led_set(u32 value) -{ - u32 tmp = ~value; - - tmp = (tmp << 23) | 0x7FFFFF; - out_be32((u32 *)GPIO0_OR, tmp); -} - -/* - * hcu_get_slot - */ -u32 hcu_get_slot(void) -{ - u16 slot = in_be16((u16 *)HCU_SLOT_ADDRESS); - return slot & 0x7f; -} - -/* - * get_serial_number - */ -u32 get_serial_number(void) -{ - u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE); - - if (serial == 0xffffffff) - return 0; - - return serial; -} - - -/* - * misc_init_r. - */ - -int misc_init_r(void) -{ - common_misc_init_r(); - set_params_for_sw_install( sys_install_requested(), "hcu4" ); - return 0; -} - -phys_size_t initdram(int board_type) -{ - long dram_size = 0; - u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER); - u16 generation = boardVersReg & 0xf0; - u16 index = boardVersReg & 0x0f; - - if (generation == HW_GENERATION_HCU3 && index < 0xf) - dram_size = 32 << 20; /* 32 MB - RAM */ - else - dram_size = 64 << 20; /* 64 MB - RAM */ - init_ppc405_sdram(dram_size); - -#ifdef DEBUG - show_sdram_registers(); -#endif - - return dram_size; -} - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup(blob, bd); - -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ - -/* - * Hardcoded flash setup: - * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus. - */ -ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) -{ - if (banknum == 0) { /* non-CFI boot flash */ - info->portwidth = 1; - info->chipwidth = 1; - info->interface = FLASH_CFI_X8; - return 1; - } else - return 0; -} diff --git a/board/netstal/hcu5/README.txt b/board/netstal/hcu5/README.txt deleted file mode 100644 index c5737d0..0000000 --- a/board/netstal/hcu5/README.txt +++ /dev/null @@ -1,171 +0,0 @@ -HCU5 configuration details and startup sequence - -(C) Copyright 2007 Netstal Maschinen AG - Niklaus Giger (Niklaus.Giger@netstal.com) - -TODO: ------ -- Fix error: Waiting for PHY auto negotiation to complete..... TIMEOUT ! - - Does not occur if both EMAC are connected -- Fix RTS/CTS problem (HW?) - CONFIG_SERIAL_MULTI/CONFIG_SERIAL_SOFTWARE_FIFO hangs after - Switching to interrupt driven serial input mode - -Caveats: --------- -Errata CHIP_8: Incorrect Write to DDR SDRAM. (was not applied to sequoia.c) -see hcu5.c. - - -Memory Bank 0 -- Flash chip ---------------------------- - -0xfff00000 - 0xffffffff - -The flash chip is really only 512Kbytes, but the high address bit of -the 1Meg region is ignored, so the flash is replicated through the -region. Thus, this is consistent with a flash base address 0xfff80000. - -The placement at the end is to be consistent with reset behavior, -where the processor itself initially uses this bus to load the branch -vector and start running. - -On-Chip Memory --------------- - -0xe0010000- 0xe0013fff CONFIG_SYS_OCM_BASE -The 440EPx includes a 16K on-chip memory that can be placed however -software chooses. - -Internal Peripherals --------------------- - -0xef600300 - 0xef6008ff - -These are scattered various peripherals internal to the PPC440EPX -chip. - -Chip-Select 2: Flash Memory ---------------------------- - -Not used - -Chip-Select 3: CAN Interface ----------------------------- -0xc800000: 2 Intel 82527 CAN-Controller - - -Chip-Select 4: IMC-bus standard -------------------------------- - -0xcc00000: Netstal specific IO-Bus - - -Chip-Select 5: IMC-bus fast (inactive) --------------------------------------- - -0xce00000: Netstal specific IO-Bus (fast, but not yet used) - - -Memory Bank 1 -- DDR2 -------------------------------------- - -0x00000000 - 0xfffffff # Default 256 MB - -PCI ?? - -USB ?? -Only USB_STORAGE is enabled to load vxWorks -from a memory stick. - -System-LEDs ??? (Analog zu HCU4 ???) - -Startup sequence ----------------- - -(arch/powerpc/cpu/ppc4xx/resetvec.S) -depending on configs option -call _start_440 _start_pci oder _start - -(arch/powerpc/cpu/ppc4xx/start.S) - -_start_440: - initialize register like - CCR0 - debug - setup interrupt vectors - configure cache regions - clear and setup TLB - enable internal RAM - jump start_ram - which in turn will jump to start -_start: - Clear and set up some registers. - Debug setup - Setup the internal SRAM - Setup the stack in internal SRAM - setup stack pointer (r1) - setup GOT - call cpu_init_f /* run low-level CPU init code (from Flash) */ - - call cpu_init_f - board_init_f: (arch/powerpc/lib\board.c) - init_sequence defines a list of function to be called - board_early_init_f: (board/netstal/hcu5/hcu5.c) - We are using Bootstrap-Option A - if CPR0_ICFG_RLI_MASK == 0 then set some registers and reboot - Setup the GPIO pins - Setup the interrupt controller polarities, triggers, etc. - Ethernet, PCI, USB enable - setup BOOT FLASH (Chip timing) - init_baudrate, - serial_init - checkcpu - misc_init_f #ifdef - init_func_i2c #ifdef - post_init_f #ifdef - init_func_ram -> calls init_dram board/netstal/hcu5/sdram.c - (EYE function removed!!) - test_dram call - - * Reserve memory at end of RAM for (top down in that order): - * - kernel log buffer - * - protected RAM - * - LCD framebuffer - * - monitor code - * - board info struct - Save local variables to board info struct - call relocate_code() does not return - relocate_code: (arch/powerpc/cpu/ppc4xx/start.S) -------------------------------------------------------- -From now on our copy is in RAM and we will run from there, - starting with board_init_r -------------------------------------------------------- - board_init_r: (arch/powerpc/lib\board.c) - setup bd function pointers - trap_init - flash_init: (board/netstal/hcu5/flash.c) - /* setup for u-boot erase, update */ - setup bd flash info - cpu_init_r: (arch/powerpc/cpu/ppc4xx/cpu_init.c) - peripheral chip select in using defines like - CONFIG_SYS_EBC_PB0A, CONFIG_SYS_EBC_PB0C from hcu5.h - mem_malloc_init - malloc_bin_reloc - spi_init (r or f)??? (CONFIG_ENV_IS_IN_EEPROM) - env_relocated - misc_init_r(bd): (board/netstal/hcu5.c) - ethaddr mit serial number ergänzen - Then we will somehow go into the command loop - -Most of the HW specific code for the HCU5 may be found in -include/configs/hcu5.h -board/netstal/hcu5/* -arch/powerpc/cpu/ppc4xx/* -arch/powerpc/lib/* -include/ppc440.h - -Drivers for serial etc are found under drivers/ - -Don't ask question if you did not look at the README !! -Most CONFIG_SYS_* and CONFIG_* switches are mentioned/explained there. diff --git a/board/netstal/hcu5/config.mk b/board/netstal/hcu5/config.mk deleted file mode 100644 index f641d54..0000000 --- a/board/netstal/hcu5/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# (C) Copyright 2005 Netstal Maschinen AG -# Niklaus Giger (ng@netstal.com) -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Netstal Maschinen AG: HCU5 boards -# -PLATFORM_CPPFLAGS += -DCONFIG_440=1 - -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -g -endif diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c deleted file mode 100644 index f94d05b..0000000 --- a/board/netstal/hcu5/hcu5.c +++ /dev/null @@ -1,414 +0,0 @@ -/* - *(C) Copyright 2005-2008 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * This source code is free software; you can redistribute it - * and/or modify it in source code form under the terms of the GNU - * General Public License as published by the Free Software - * Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ - -#include <common.h> -#include <asm/processor.h> -#include <asm/ppc440.h> -#include <asm/io.h> -#include <asm/4xx_pci.h> - -#include "../common/nm.h" - -DECLARE_GLOBAL_DATA_PTR; - -extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -#undef BOOTSTRAP_OPTION_A_ACTIVE - -#define SDR0_CP440 0x0180 - -#define SYSTEM_RESET 0x30000000 -#define CHIP_RESET 0x20000000 - -#define SDR0_ECID0 0x0080 -#define SDR0_ECID1 0x0081 -#define SDR0_ECID2 0x0082 -#define SDR0_ECID3 0x0083 - -#define SYS_IO_ADDRESS (CONFIG_SYS_CS_2 + 0x00e00000) -#define SYS_SLOT_ADDRESS (CONFIG_SYS_CPLD + 0x00400000) -#define HCU_DIGITAL_IO_REGISTER (CONFIG_SYS_CPLD + 0x0500000) -#define HCU_SW_INSTALL_REQUESTED 0x10 - -/* - * This function is run very early, out of flash, and before devices are - * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue - * of being in the init_sequence array. - * - * The SDRAM has been initialized already -- start.S:start called - * init.S:init_sdram early on -- but it is not yet being used for - * anything, not even stack. So be careful. - */ - -int board_early_init_f(void) -{ - -#ifdef BOOTSTRAP_OPTION_A_ACTIVE - /* Booting with Bootstrap Option A - * First boot, with CPR0_ICFG_RLI_MASK == 0 - * no we setup varios boot strapping register, - * then we do reset the PPC440 using a chip reset - * Unfortunately, we cannot use this option, as Nto1 is not set - * with Bootstrap Option A and cannot be changed later on by SW - * There are no other possible boostrap options with a 8 bit ROM - * See Errata (Version 1.04) CHIP_9 - */ - - u32 cpr0icfg; - u32 dbcr; - - mfcpr(CPR0_ICFG, cpr0icfg); - if (!(cpr0icfg & CPR0_ICFG_RLI_MASK)) { - mtcpr(CPR0_MALD, 0x02000000); - mtcpr(CPR0_OPBD, 0x02000000); - mtcpr(CPR0_PERD, 0x05000000); /* 1:5 */ - mtcpr(CPR0_PLLC, 0x40000238); - mtcpr(CPR0_PLLD, 0x01010414); - mtcpr(CPR0_PRIMAD, 0x01000000); - mtcpr(CPR0_PRIMBD, 0x01000000); - mtcpr(CPR0_SPCID, 0x03000000); - mtsdr(SDR0_PFC0, 0x00003E00); /* [CTE] = 0 */ - mtsdr(SDR0_CP440, 0x0EAAEA02); /* [Nto1] = 1*/ - mtcpr(CPR0_ICFG, cpr0icfg | CPR0_ICFG_RLI_MASK); - - /* - * Initiate system reset in debug control register DBCR - */ - dbcr = mfspr(SPRN_DBCR0); - mtspr(SPRN_DBCR0, dbcr | CHIP_RESET); - } - mtsdr(SDR0_CP440, 0x0EAAEA02); /* [Nto1] = 1*/ -#endif - mtdcr(EBC0_CFGADDR, EBC0_CFG); - mtdcr(EBC0_CFGDATA, 0xb8400000); - - /* - * Setup the GPIO pins - */ - out32(GPIO0_OR, 0x00000000); - out32(GPIO0_TCR, 0x7C2FF1CF); - out32(GPIO0_OSRL, 0x40055000); - out32(GPIO0_OSRH, 0x00000000); - out32(GPIO0_TSRL, 0x40055000); - out32(GPIO0_TSRH, 0x00000400); - out32(GPIO0_ISR1L, 0x40000000); - out32(GPIO0_ISR1H, 0x00000000); - out32(GPIO0_ISR2L, 0x00000000); - out32(GPIO0_ISR2H, 0x00000000); - out32(GPIO0_ISR3L, 0x00000000); - out32(GPIO0_ISR3H, 0x00000000); - - out32(GPIO1_OR, 0x00000000); - out32(GPIO1_TCR, 0xC6007FFF); - out32(GPIO1_OSRL, 0x00140000); - out32(GPIO1_OSRH, 0x00000000); - out32(GPIO1_TSRL, 0x00000000); - out32(GPIO1_TSRH, 0x00000000); - out32(GPIO1_ISR1L, 0x05415555); - out32(GPIO1_ISR1H, 0x40000000); - out32(GPIO1_ISR2L, 0x00000000); - out32(GPIO1_ISR2H, 0x00000000); - out32(GPIO1_ISR3L, 0x00000000); - out32(GPIO1_ISR3H, 0x00000000); - - /* - * Setup the interrupt controller polarities, triggers, etc. - */ - mtdcr(UIC0SR, 0xffffffff); /* clear all */ - mtdcr(UIC0ER, 0x00000000); /* disable all */ - mtdcr(UIC0CR, 0x00000005); /* ATI & UIC1 crit are critical */ - mtdcr(UIC0PR, 0xfffff7ff); /* per ref-board manual */ - mtdcr(UIC0TR, 0x00000000); /* per ref-board manual */ - mtdcr(UIC0VR, 0x00000000); /* int31 highest, base=0x000 */ - mtdcr(UIC0SR, 0xffffffff); /* clear all */ - - mtdcr(UIC1SR, 0xffffffff); /* clear all */ - mtdcr(UIC1ER, 0x00000000); /* disable all */ - mtdcr(UIC1CR, 0x00000000); /* all non-critical */ - mtdcr(UIC1PR, 0xffffffff); /* per ref-board manual */ - mtdcr(UIC1TR, 0x00000000); /* per ref-board manual */ - mtdcr(UIC1VR, 0x00000000); /* int31 highest, base=0x000 */ - mtdcr(UIC1SR, 0xffffffff); /* clear all */ - - mtdcr(UIC2SR, 0xffffffff); /* clear all */ - mtdcr(UIC2ER, 0x00000000); /* disable all */ - mtdcr(UIC2CR, 0x00000000); /* all non-critical */ - mtdcr(UIC2PR, 0xffffffff); /* per ref-board manual */ - mtdcr(UIC2TR, 0x00000000); /* per ref-board manual */ - mtdcr(UIC2VR, 0x00000000); /* int31 highest, base=0x000 */ - mtdcr(UIC2SR, 0xffffffff); /* clear all */ - mtsdr(SDR0_PFC0, 0x00003E00); /* Pin function: */ - mtsdr(SDR0_PFC1, 0x00848000); /* Pin function: UART0 has 4 pins */ - - /* setup BOOT FLASH */ - mtsdr(SDR0_CUST0, 0xC0082350); - - return 0; -} - -#ifdef CONFIG_BOARD_PRE_INIT -int board_pre_init(void) -{ - return board_early_init_f(); -} - -#endif - -int sys_install_requested(void) -{ - u16 *ioValuePtr = (u16 *)HCU_DIGITAL_IO_REGISTER; - return (in_be16(ioValuePtr) & HCU_SW_INSTALL_REQUESTED) != 0; -} - -int checkboard(void) -{ - u16 *hwVersReg = (u16 *) HCU_HW_VERSION_REGISTER; - u16 *boardVersReg = (u16 *) HCU_CPLD_VERSION_REGISTER; - u16 generation = in_be16(boardVersReg) & 0xf0; - u16 index = in_be16(boardVersReg) & 0x0f; - u32 ecid0, ecid1, ecid2, ecid3; - - nm_show_print(generation, index, in_be16(hwVersReg) & 0xff); - mfsdr(SDR0_ECID0, ecid0); - mfsdr(SDR0_ECID1, ecid1); - mfsdr(SDR0_ECID2, ecid2); - mfsdr(SDR0_ECID3, ecid3); - - printf("Chip ID 0x%x 0x%x 0x%x 0x%x\n", ecid0, ecid1, ecid2, ecid3); - - return 0; -} - -u32 hcu_led_get(void) -{ - return in16(SYS_IO_ADDRESS) & 0x3f; -} - -/* - * hcu_led_set value to be placed into the LEDs (max 6 bit) - */ -void hcu_led_set(u32 value) -{ - out16(SYS_IO_ADDRESS, value); -} - -/* - * get_serial_number - */ -u32 get_serial_number(void) -{ - u32 *serial = (u32 *)CONFIG_SYS_FLASH_BASE; - - if (in_be32(serial) == 0xffffffff) - return 0; - - return in_be32(serial); -} - - -/* - * hcu_get_slot - */ -u32 hcu_get_slot(void) -{ - u16 *slot = (u16 *)SYS_SLOT_ADDRESS; - return in_be16(slot) & 0x7f; -} - - -/* - * misc_init_r. - */ -int misc_init_r(void) -{ - unsigned long usb2d0cr = 0; - unsigned long usb2phy0cr, usb2h0cr = 0; - unsigned long sdr0_pfc1; - -#ifdef CONFIG_ENV_IS_IN_FLASH - /* Monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - -CONFIG_SYS_MONITOR_LEN, - 0xffffffff, - &flash_info[0]); - -#ifdef CONFIG_ENV_ADDR_REDUND - /* Env protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR_REDUND, - CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1, - &flash_info[0]); -#endif -#endif - - /* - * USB stuff... - */ - - /* SDR Setting */ - mfsdr(SDR0_PFC1, sdr0_pfc1); - mfsdr(SDR0_USB2D0CR, usb2d0cr); - mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); - mfsdr(SDR0_USB2H0CR, usb2h0cr); - - usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; - usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/ - usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK; - usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; /*1*/ - usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; - usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/ - usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; - usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/ - usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; - usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/ - - /* An 8-bit/60MHz interface is the only possible alternative - * when connecting the Device to the PHY - */ - usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK; - usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /*1*/ - - /* To enable the USB 2.0 Device function through the UTMI interface */ - usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK; - usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION; /*1*/ - - sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK; - sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; /*0*/ - - mtsdr(SDR0_PFC1, sdr0_pfc1); - mtsdr(SDR0_USB2D0CR, usb2d0cr); - mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); - mtsdr(SDR0_USB2H0CR, usb2h0cr); - - /*clear resets*/ - udelay(1000); - mtsdr(SDR0_SRST1, 0x00000000); - udelay(1000); - mtsdr(SDR0_SRST0, 0x00000000); - printf("USB: Host(int phy) Device(ext phy)\n"); - - common_misc_init_r(); - set_params_for_sw_install( sys_install_requested(), "hcu5" ); - /* We cannot easily enable trace before, as there are other - * routines messing around with sdr0_pfc1. And I do not need it. - */ - if (mfspr(SPRN_DBCR0) & 0x80000000) { - /* External debugger alive - * enable trace facilty for Lauterbach - * CCR0[DTB]=0 Enable broadcast of trace information - * SDR0_PFC0[TRE] Trace signals are enabled instead of - * GPIO49-63 - */ - mtspr(SPRN_CCR0, mfspr(SPRN_CCR0) &~ (CCR0_DTB)); - mtsdr(SDR0_PFC0, sdr0_pfc1 | SDR0_PFC0_TRE_ENABLE); - } - return 0; -} -#ifdef CONFIG_PCI -int board_with_pci(void) -{ - u32 reg; - - mfsdr(SDR0_PCI0, reg); - return (reg & SDR0_PCI0_PAE_MASK); -} - -/* - * pci_pre_init - * - * This routine is called just prior to registering the hose and gives - * the board the opportunity to check things. Returning a value of zero - * indicates that things are bad & PCI initialization should be aborted. - * - * Different boards may wish to customize the pci controller structure - * (add regions, override default access routines, etc) or perform - * certain pre-initialization actions. - * - */ -int pci_pre_init(struct pci_controller *hose) -{ - unsigned long addr; - - if (!board_with_pci()) { return 0; } - - /* - * Set priority for all PLB3 devices to 0. - * Set PLB3 arbiter to fair mode. - */ - mfsdr(SDR0_AMP1, addr); - mtsdr(SDR0_AMP1, (addr & 0x000000FF) | 0x0000FF00); - addr = mfdcr(PLB3A0_ACR); - mtdcr(PLB3A0_ACR, addr | 0x80000000); /* Sequoia */ - - /* - * Set priority for all PLB4 devices to 0. - */ - mfsdr(SDR0_AMP0, addr); - mtsdr(SDR0_AMP0, (addr & 0x000000FF) | 0x0000FF00); - addr = mfdcr(PLB4A0_ACR) | 0xa0000000; /* Was 0x8---- */ - mtdcr(PLB4A0_ACR, addr); /* Sequoia */ - - /* - * As of errata version 0.4, CHIP_8: Incorrect Write to DDR SDRAM. - * Workaround: Disable write pipelining to DDR SDRAM by setting - * PLB4A0_ACR[WRP] = 0. - */ - mtdcr(PLB4A0_ACR, 0); /* PATCH HAB: WRITE PIPELINING OFF */ - - /* Segment1 */ - mtdcr(PLB4A1_ACR, 0); /* PATCH HAB: WRITE PIPELINING OFF */ - - return board_with_pci(); -} - -/* - * Override weak default pci_master_init() - */ -void pci_master_init(struct pci_controller *hose) -{ - if (!board_with_pci()) - return; - - __pci_master_init(hose); -} -#endif /* defined(CONFIG_PCI) */ - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup(blob, bd); - -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ - -/* - * Hardcoded flash setup: - * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus. - */ -ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) -{ - if (banknum == 0) { /* non-CFI boot flash */ - info->portwidth = 1; - info->chipwidth = 1; - info->interface = FLASH_CFI_X8; - return 1; - } else - return 0; -} diff --git a/board/netstal/hcu5/init.S b/board/netstal/hcu5/init.S deleted file mode 100644 index 45e63dd..0000000 --- a/board/netstal/hcu5/init.S +++ /dev/null @@ -1,106 +0,0 @@ -/* - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <ppc_asm.tmpl> -#include <config.h> -#include <asm/mmu.h> - -/************************************************************************** - * TLB TABLE - * - * This table is used by the cpu boot code to setup the initial tlb - * entries. Rather than make broad assumptions in the cpu source tree, - * this table lets each board set things up however they like. - * - * Pointer to the table is returned in r1 - * - *************************************************************************/ - .section .bootpg,"ax" - .globl tlbtab - -tlbtab: - tlbtab_start - - /* TLB#0: vxWorks needs this entry for the Machine Check interrupt, */ - tlbentry( 0x40000000, SZ_256M, 0, 0, AC_RWX | SA_IG ) - /* TLB#1: TLB-entry for DDR SDRAM (Up to 2GB) */ - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, - AC_RWX | SA_IG ) - - /* TLB#2: TLB-entry for EBC */ - tlbentry( 0x80000000, SZ_256M, 0x80000000, 1, AC_RWX | SA_IG) - - /* - * TLB#3: BOOT_CS (FLASH) must be forth. Before relocation SA_I can be - * off to use the speed up boot process. It is patched after relocation - * to enable SA_I - */ - tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_1M, CONFIG_SYS_BOOT_BASE_ADDR, 1, - AC_RWX | SA_G) - - /* - * TLB entries for SDRAM are not needed on this platform. - * They are dynamically generated in the SPD DDR(2) detection - * routine. - */ - - /* TLB#4: */ - tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, - AC_RW | SA_IG ) - /* TLB#5: */ - tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, - AC_RW | SA_IG ) - /* TLB#6: */ - tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, - AC_RW | SA_IG ) - - /* TLB-entry for Internal Registers & OCM */ - /* TLB#7: */ - tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, - AC_RWX | SA_IG ) - - /*TLB-entry PCI registers*/ - /* TLB#8: */ - tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG ) - - /* TLB-entry for peripherals */ - /* TLB#9: */ - tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG) - - /* CAN */ - /* TLB#10: */ - tlbentry( CONFIG_SYS_CS_1, SZ_1K, CONFIG_SYS_CS_1, 1, AC_RWX | SA_IG ) - - /* TLB#11: CPLD and IMC-Standard 32 MB */ - tlbentry( CONFIG_SYS_CS_2, SZ_16M, CONFIG_SYS_CS_2, 1, AC_RWX | SA_IG ) - - /* TLB#12: */ - tlbentry( CONFIG_SYS_CS_2 + 0x1000000, SZ_16M, CONFIG_SYS_CS_2 + 0x1000000, 1, - AC_RWX | SA_IG ) - - /* IMC-Fast 32 MB */ - /* TLB#13: */ - tlbentry( CONFIG_SYS_CS_3, SZ_16M, CONFIG_SYS_CS_3, 1, AC_RWX | SA_IG ) - /* TLB#14: */ - tlbentry( CONFIG_SYS_CS_3 + 0x1000000, SZ_16M, CONFIG_SYS_CS_3, 1, - AC_RWX | SA_IG ) - - tlbtab_end diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c deleted file mode 100644 index e5ac46b..0000000 --- a/board/netstal/hcu5/sdram.c +++ /dev/null @@ -1,283 +0,0 @@ -/* - * (C) Copyright 2007 - * Niklaus Giger (Niklaus.Giger@netstal.com) - * (C) Copyright 2006 - * Sylvie Gohl, AMCC/IBM, gohl.sylvie@fr.ibm.com - * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com - * Thierry Roman, AMCC/IBM, thierry_roman@fr.ibm.com - * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com - * Robert Snyder, AMCC/IBM, rob.snyder@fr.ibm.com - * - * (C) Copyright 2006 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* define DEBUG for debug output */ -#undef DEBUG - -#include <common.h> -#include <asm/processor.h> -#include <asm/io.h> -#include <asm/mmu.h> -#include <asm/cache.h> -#include <asm/ppc440.h> - -void hcu_led_set(u32 value); -void dcbz_area(u32 start_address, u32 num_bytes); - -#define ECC_RAM 0x03267F0B -#define NO_ECC_RAM 0x00267F0B - -#define HCU_HW_SDRAM_CONFIG_MASK 0x7 - -#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE - /* disable caching on DDR2 */ - -void board_add_ram_info(int use_default) -{ - PPC4xx_SYS_INFO board_cfg; - u32 val; - - mfsdram(DDR0_22, val); - val &= DDR0_22_CTRL_RAW_MASK; - switch (val) { - case DDR0_22_CTRL_RAW_ECC_DISABLE: - puts(" (ECC disabled"); - break; - case DDR0_22_CTRL_RAW_ECC_CHECK_ONLY: - puts(" (ECC check only"); - break; - case DDR0_22_CTRL_RAW_NO_ECC_RAM: - puts(" (no ECC ram"); - break; - case DDR0_22_CTRL_RAW_ECC_ENABLE: - puts(" (ECC enabled"); - break; - } - - get_sys_info(&board_cfg); - printf(", %lu MHz", (board_cfg.freqPLB * 2) / 1000000); - - mfsdram(DDR0_03, val); - val = DDR0_03_CASLAT_DECODE(val); - printf(", CL%d)", val); -} - -/*-------------------------------------------------------------------- - * wait_for_dlllock. - *--------------------------------------------------------------------*/ -static int wait_for_dlllock(void) -{ - unsigned long val; - int wait = 0; - - /* -----------------------------------------------------------+ - * Wait for the DCC master delay line to finish calibration - * ----------------------------------------------------------*/ - mtdcr(SDRAM0_CFGADDR, DDR0_17); - val = DDR0_17_DLLLOCKREG_UNLOCKED; - - while (wait != 0xffff) { - val = mfdcr(SDRAM0_CFGDATA); - if ((val & DDR0_17_DLLLOCKREG_MASK) == - DDR0_17_DLLLOCKREG_LOCKED) - /* dlllockreg bit on */ - return 0; - else - wait++; - } - debug("0x%04x: DDR0_17 Value (dlllockreg bit): 0x%08x\n", wait, val); - debug("Waiting for dlllockreg bit to raise\n"); - - return -1; -} - -/*********************************************************************** - * - * sdram_panic -- Panic if we cannot configure the sdram correctly - * - ************************************************************************/ -void sdram_panic(const char *reason) -{ - printf("\n%s: reason %s", __FUNCTION__, reason); - hcu_led_set(0xff); - while (1) { - } - /* Never return */ -} - -#ifdef CONFIG_DDR_ECC -void blank_string(int size) -{ - int i; - - for (i=0; i<size; i++) - putc('\b'); - for (i=0; i<size; i++) - putc(' '); - for (i=0; i<size; i++) - putc('\b'); -} -/*---------------------------------------------------------------------------+ - * program_ecc. - *---------------------------------------------------------------------------*/ -static void program_ecc(unsigned long start_address, unsigned long num_bytes) -{ - u32 val; - char str[] = "ECC generation -"; -#if defined(CONFIG_PRAM) - u32 *magicPtr; - u32 magic; - - if ((mfspr(SPRN_DBCR0) & 0x80000000) == 0) { - /* only if no external debugger is alive! - * Check whether vxWorks is using EDR logging, if yes zero - * also PostMortem and user reserved memory - */ - magicPtr = (u32 *)(start_address + num_bytes - - (CONFIG_PRAM*1024) + sizeof(u32)); - magic = in_be32(magicPtr); - debug("%s: CONFIG_PRAM %d kB magic 0x%x 0x%p\n", - __FUNCTION__, CONFIG_PRAM, - magicPtr, magic); - if (magic == 0xbeefbabe) { - printf("%s: preserving at %p\n", __FUNCTION__, magicPtr); - num_bytes -= (CONFIG_PRAM*1024) - PM_RESERVED_MEM; - } - } -#endif - - sync(); - - puts(str); - - /* ECC bit set method for cached memory */ - /* Fast method, no noticeable delay */ - dcbz_area(start_address, num_bytes); - /* Write modified dcache lines back to memory */ - clean_dcache_range(start_address, start_address + num_bytes); - blank_string(strlen(str)); - - /* Clear error status */ - mfsdram(DDR0_00, val); - mtsdram(DDR0_00, val | DDR0_00_INT_ACK_ALL); - - /* - * Clear possible ECC errors - * If not done, then we could get an interrupt later on when - * exceptions are enabled. - */ - mtspr(SPRN_MCSR, mfspr(SPRN_MCSR)); - - /* Set 'int_mask' parameter to functionnal value */ - mfsdram(DDR0_01, val); - mtsdram(DDR0_01, ((val &~ DDR0_01_INT_MASK_MASK) | - DDR0_01_INT_MASK_ALL_OFF)); - - return; -} -#endif - - -/*********************************************************************** - * - * initdram -- 440EPx's DDR controller is a DENALI Core - * - ************************************************************************/ -phys_size_t initdram (int board_type) -{ - unsigned int dram_size = 0; - - mtsdram(DDR0_02, 0x00000000); - - /* Values must be kept in sync with Excel-table <<A0001492.>> ! */ - mtsdram(DDR0_00, 0x0000190A); - mtsdram(DDR0_01, 0x01000000); - mtsdram(DDR0_03, 0x02030602); - mtsdram(DDR0_04, 0x0A020200); - mtsdram(DDR0_05, 0x02020307); - switch (in_be16((u16 *)HCU_HW_VERSION_REGISTER) & HCU_HW_SDRAM_CONFIG_MASK) { - case 1: - dram_size = 256 * 1024 * 1024 ; - mtsdram(DDR0_06, 0x0102C812); /* 256MB RAM */ - mtsdram(DDR0_11, 0x0014C800); /* 256MB RAM */ - mtsdram(DDR0_43, 0x030A0200); /* 256MB RAM */ - break; - case 0: - default: - dram_size = 128 * 1024 * 1024 ; - mtsdram(DDR0_06, 0x0102C80D); /* 128MB RAM */ - mtsdram(DDR0_11, 0x000FC800); /* 128MB RAM */ - mtsdram(DDR0_43, 0x030A0300); /* 128MB RAM */ - break; - } - mtsdram(DDR0_07, 0x00090100); - - /* - * TCPD=200 cycles of clock input is required to lock the DLL. - * CKE must be HIGH the entire time.mtsdram(DDR0_08, 0x02C80001); - */ - mtsdram(DDR0_08, 0x02C80001); - mtsdram(DDR0_09, 0x00011D5F); - mtsdram(DDR0_10, 0x00000100); - mtsdram(DDR0_12, 0x00000003); - mtsdram(DDR0_14, 0x00000000); - mtsdram(DDR0_17, 0x1D000000); - mtsdram(DDR0_18, 0x1D1D1D1D); - mtsdram(DDR0_19, 0x1D1D1D1D); - mtsdram(DDR0_20, 0x0B0B0B0B); - mtsdram(DDR0_21, 0x0B0B0B0B); -#ifdef CONFIG_DDR_ECC - mtsdram(DDR0_22, ECC_RAM); -#else - mtsdram(DDR0_22, NO_ECC_RAM); -#endif - - mtsdram(DDR0_23, 0x00000000); - mtsdram(DDR0_24, 0x01020001); - mtsdram(DDR0_26, 0x2D930517); - mtsdram(DDR0_27, 0x00008236); - mtsdram(DDR0_28, 0x00000000); - mtsdram(DDR0_31, 0x00000000); - mtsdram(DDR0_42, 0x01000006); - mtsdram(DDR0_44, 0x00000003); - mtsdram(DDR0_02, 0x00000001); - wait_for_dlllock(); - mtsdram(DDR0_00, 0x40000000); /* Zero init bit */ - - /* - * Program tlb entries for this size (dynamic) - */ - remove_tlb(CONFIG_SYS_SDRAM_BASE, 256 << 20); - program_tlb(0, 0, dram_size, TLB_WORD2_W_ENABLE | TLB_WORD2_I_ENABLE); - - /* - * Setup 2nd TLB with same physical address but different virtual - * address with cache enabled. This is done for fast ECC generation. - */ - program_tlb(0, CONFIG_SYS_DDR_CACHED_ADDR, dram_size, 0); - -#ifdef CONFIG_DDR_ECC - /* - * If ECC is enabled, initialize the parity bits. - */ - program_ecc(CONFIG_SYS_DDR_CACHED_ADDR, dram_size); -#endif - - return (dram_size); -} diff --git a/board/netstal/mcu25/Makefile b/board/netstal/mcu25/Makefile deleted file mode 100644 index a983de9..0000000 --- a/board/netstal/mcu25/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2007-2008 Netstal Maschinen AG -# Niklaus Giger (ng@netstal.com) -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -endif - -LIB = $(obj)lib$(BOARD).o - -COBJS = $(BOARD).o \ - ../common/fixed_sdram.o \ - ../common/nm_bsp.o - -SRCS := $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) - -$(LIB): $(OBJS) - $(call cmd_link_o_target, $^) - -clean: - rm -f $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/netstal/mcu25/README.txt b/board/netstal/mcu25/README.txt deleted file mode 100644 index d25fddd..0000000 --- a/board/netstal/mcu25/README.txt +++ /dev/null @@ -1,59 +0,0 @@ -MCU25 Configuration Details - -Memory Bank 0 -- Flash chip ---------------------------- - -0xfff00000 - 0xffffffff - -The flash chip is really only 512Kbytes, but the high address bit of -the 1Meg region is ignored, so the flash is replicated through the -region. Thus, this is consistent with a flash base address 0xfff80000. - -The placement at the end is to be consistent with reset behavior, -where the processor itself initially uses this bus to load the branch -vector and start running. - -On-Chip Memory --------------- - -0xf4000000 - 0xf4000fff - -The 405GPr includes a 4K on-chip memory that can be placed however -software chooses. I choose to place the memory at this address, to -keep it out of the cachable areas. - - -Internal Peripherals --------------------- - -0xef600300 - 0xef6008ff - -These are scattered various peripherals internal to the PPC405GPr -chip. - -Chip-Select 2: Flash Memory ---------------------------- - -0x70000000 - -Chip-Select 3: CAN Interface ----------------------------- -0x7800000 - - -Chip-Select 4: IMC-bus standard -------------------------------- - -Our IO-Bus (slow version) - - -Chip-Select 5: IMC-bus fast (inactive) --------------------------------------- - -Our IO-Bus (fast, but not yet use) - - -Memory Bank 1 -- SDRAM -------------------------------------- - -0x00000000 - 0x2ffffff # Default 64 MB diff --git a/board/netstal/mcu25/config.mk b/board/netstal/mcu25/config.mk deleted file mode 100644 index 61dc091..0000000 --- a/board/netstal/mcu25/config.mk +++ /dev/null @@ -1,25 +0,0 @@ -# -# (C) Copyright 2005 Netstal Maschinen AG -# Niklaus Giger (ng@netstal.com) -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -# -# Netstal Maschinen AG: MCU25 board -# -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -g -endif diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c deleted file mode 100644 index 36fb388..0000000 --- a/board/netstal/mcu25/mcu25.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - *(C) Copyright 2005-2008 Netstal Maschinen AG - * Niklaus Giger (Niklaus.Giger@netstal.com) - * - * This source code is free software; you can redistribute it - * and/or modify it in source code form under the terms of the GNU - * General Public License as published by the Free Software - * Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ - -#include <common.h> -#include <asm/ppc4xx.h> -#include <asm/processor.h> -#include <asm/io.h> -#include <asm/u-boot.h> -#include "../common/nm.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A) -#define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0) - -#define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10) -#define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C) -#define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e) -#define MCU_SW_INSTALL_REQUESTED 0x08 - -#define SDRAM_LEN (32 << 20) /* 32 MB - RAM */ - -/* - * This function is run very early, out of flash, and before devices are - * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue - * of being in the init_sequence array. - * - * The SDRAM has been initialized already -- start.S:start called - * init.S:init_sdram early on -- but it is not yet being used for - * anything, not even stack. So be careful. - */ - -/* Attention: If you want 1 microsecs times from the external oscillator - * 0x00004051 is okay for u-boot/linux, but different from old vxworks values - * 0x00804051 causes problems with u-boot and linux! - */ -#define CPC0_CR0_VALUE 0x0007F03C -#define CPC0_CR1_VALUE 0x00004051 - -int board_early_init_f (void) -{ - /* Documented in A-1171 - * - * Interrupt controller setup for the MCU25 board. - * Note: IRQ 0-15 405GP internally generated; high; level sensitive - * IRQ 16 405GP internally generated; low; level sensitive - * IRQ 17-24 RESERVED/UNUSED - * IRQ 31 (EXT IRQ 6) (unused) - */ - mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ - mtdcr(UIC0ER, 0x00000000); /* disable all ints */ - mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */ - mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */ - mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */ - mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ - - mtdcr(CPC0_CR1, CPC0_CR1_VALUE); - mtdcr(CPC0_ECR, 0x60606000); - mtdcr(CPC0_EIRR, 0x7C000000); - out32(GPIO0_OR, CONFIG_SYS_GPIO0_OR ); - out32(GPIO0_TCR, CONFIG_SYS_GPIO0_TCR); - out32(GPIO0_ODR, CONFIG_SYS_GPIO0_ODR); - mtspr(SPRN_CCR0, 0x00700000); - - return 0; -} - -#ifdef CONFIG_BOARD_PRE_INIT -int board_pre_init (void) -{ - return board_early_init_f (); -} -#endif - -int sys_install_requested(void) -{ - u16 ioValue = in_be16((u16 *)MCU25_DIGITAL_IO_REGISTER); - return (ioValue & MCU_SW_INSTALL_REQUESTED) != 0; -} - -int checkboard (void) -{ - u16 boardVersReg = in_be16((u16 *)MCU25_VERSIONS_REGISTER); - u16 hwConfig = in_be16((u16 *)MCU25_IO_CONFIGURATION); - u16 generation = boardVersReg & 0x0f; - u16 index = boardVersReg & 0xf0; - - /* Cannot be done in board_early_init */ - mtdcr(CPC0_CR0, CPC0_CR0_VALUE); - - /* Force /RTS to active. The board it not wired quite - * correctly to use cts/rtc flow control, so just force the - * /RST active and forget about it. - */ - writeb (readb (0xef600404) | 0x03, 0xef600404); - nm_show_print(generation, index, hwConfig); - return 0; -} - -u32 hcu_led_get(void) -{ - return in_be16((u16 *)MCU25_LED_REGISTER_ADDRESS) & 0x3ff; -} - -/* - * hcu_led_set value to be placed into the LEDs (max 6 bit) - */ -void hcu_led_set(u32 value) -{ - out_be16((u16 *)MCU25_LED_REGISTER_ADDRESS, value); -} - -/* - * hcu_get_slot - */ -u32 hcu_get_slot(void) -{ - u16 slot = in_be16((u16 *)MCU25_SLOT_ADDRESS); - return slot & 0x7f; -} - -/* - * get_serial_number - */ -u32 get_serial_number(void) -{ - u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE); - - if (serial == 0xffffffff) - return 0; - - return serial; -} - - -/* - * misc_init_r. - */ - -int misc_init_r(void) -{ - common_misc_init_r(); - set_params_for_sw_install( sys_install_requested(), "mcu25" ); - return 0; -} - -phys_size_t initdram(int board_type) -{ - unsigned int dram_size = 64*1024*1024; - init_ppc405_sdram(dram_size); - -#ifdef DEBUG - show_sdram_registers(); -#endif - - return dram_size; -} - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup(blob, bd); - -} -#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ - -/* - * Hardcoded flash setup: - * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus. - */ -ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) -{ - if (banknum == 0) { /* non-CFI boot flash */ - info->portwidth = 1; - info->chipwidth = 1; - info->interface = FLASH_CFI_X8; - return 1; - } else - return 0; -} diff --git a/board/ns9750dev/flash.c b/board/ns9750dev/flash.c index 5b56b98..185bc2d 100644 --- a/board/ns9750dev/flash.c +++ b/board/ns9750dev/flash.c @@ -261,7 +261,7 @@ void flash_unprotect_sectors (FPWV * addr) int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -294,10 +294,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("\n"); } - - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -312,7 +308,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) flash_unprotect_sectors (addr); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050;/* clear status register */ *addr = (FPW) 0x00200020;/* erase setup */ @@ -321,7 +317,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); /* suspend erase */ @@ -441,6 +437,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -454,11 +451,11 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 3d6c248..8ab9440 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -32,6 +32,10 @@ #include <asm/arch/uart.h> #include "board.h" +#ifdef CONFIG_TEGRA2_MMC +#include <mmc.h> +#endif + DECLARE_GLOBAL_DATA_PTR; const struct tegra2_sysinfo sysinfo = { @@ -62,7 +66,6 @@ int board_early_init_f(void) */ int timer_init(void) { - reset_timer(); return 0; } @@ -171,6 +174,116 @@ static void pin_mux_uart(void) } /* + * Routine: clock_init_mmc + * Description: init the PLL and clocks for the SDMMC controllers + */ +static void clock_init_mmc(void) +{ + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 reg; + + /* Do the SDMMC resets/clock enables */ + + /* Assert Reset to SDMMC4 */ + reg = readl(&clkrst->crc_rst_dev_l); + reg |= SWR_SDMMC4_RST; /* SWR_SDMMC4_RST = 1 */ + writel(reg, &clkrst->crc_rst_dev_l); + + /* Enable clk to SDMMC4 */ + reg = readl(&clkrst->crc_clk_out_enb_l); + reg |= CLK_ENB_SDMMC4; /* CLK_ENB_SDMMC4 = 1 */ + writel(reg, &clkrst->crc_clk_out_enb_l); + + /* Enable pllp_out0 to SDMMC4 */ + reg = readl(&clkrst->crc_clk_src_sdmmc4); + reg &= 0x3FFFFF00; /* SDMMC4_CLK_SRC = 00, PLLP_OUT0 */ + reg |= (10 << 1); /* n-1, 11-1 shl 1 */ + writel(reg, &clkrst->crc_clk_src_sdmmc4); + + /* + * As per the Tegra2 TRM, section 5.3.4: + * 'Wait 2 us for the clock to flush through the pipe/logic' + */ + udelay(2); + + /* De-assert reset to SDMMC4 */ + reg = readl(&clkrst->crc_rst_dev_l); + reg &= ~SWR_SDMMC4_RST; /* SWR_SDMMC4_RST = 0 */ + writel(reg, &clkrst->crc_rst_dev_l); + + /* Assert Reset to SDMMC3 */ + reg = readl(&clkrst->crc_rst_dev_u); + reg |= SWR_SDMMC3_RST; /* SWR_SDMMC3_RST = 1 */ + writel(reg, &clkrst->crc_rst_dev_u); + + /* Enable clk to SDMMC3 */ + reg = readl(&clkrst->crc_clk_out_enb_u); + reg |= CLK_ENB_SDMMC3; /* CLK_ENB_SDMMC3 = 1 */ + writel(reg, &clkrst->crc_clk_out_enb_u); + + /* Enable pllp_out0 to SDMMC4, set divisor to 11 for 20MHz */ + reg = readl(&clkrst->crc_clk_src_sdmmc3); + reg &= 0x3FFFFF00; /* SDMMC3_CLK_SRC = 00, PLLP_OUT0 */ + reg |= (10 << 1); /* n-1, 11-1 shl 1 */ + writel(reg, &clkrst->crc_clk_src_sdmmc3); + + /* wait for 2us */ + udelay(2); + + /* De-assert reset to SDMMC3 */ + reg = readl(&clkrst->crc_rst_dev_u); + reg &= ~SWR_SDMMC3_RST; /* SWR_SDMMC3_RST = 0 */ + writel(reg, &clkrst->crc_rst_dev_u); +} + +/* + * Routine: pin_mux_mmc + * Description: setup the pin muxes/tristate values for the SDMMC(s) + */ +static void pin_mux_mmc(void) +{ + struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; + u32 reg; + + /* SDMMC4 */ + /* config 2, x8 on 2nd set of pins */ + reg = readl(&pmt->pmt_ctl_a); + reg |= (3 << 16); /* ATB_SEL [17:16] = 11 SDIO4 */ + writel(reg, &pmt->pmt_ctl_a); + reg = readl(&pmt->pmt_ctl_b); + reg |= (3 << 0); /* GMA_SEL [1:0] = 11 SDIO4 */ + writel(reg, &pmt->pmt_ctl_b); + reg = readl(&pmt->pmt_ctl_d); + reg |= (3 << 0); /* GME_SEL [1:0] = 11 SDIO4 */ + writel(reg, &pmt->pmt_ctl_d); + + reg = readl(&pmt->pmt_tri_a); + reg &= ~Z_ATB; /* Z_ATB = normal (0) */ + reg &= ~Z_GMA; /* Z_GMA = normal (0) */ + writel(reg, &pmt->pmt_tri_a); + reg = readl(&pmt->pmt_tri_b); + reg &= ~Z_GME; /* Z_GME = normal (0) */ + writel(reg, &pmt->pmt_tri_b); + + /* SDMMC3 */ + /* SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */ + reg = readl(&pmt->pmt_ctl_d); + reg &= 0xFFFF03FF; + reg |= (2 << 10); /* SDB_SEL [11:10] = 01 SDIO3 */ + reg |= (2 << 12); /* SDC_SEL [13:12] = 01 SDIO3 */ + reg |= (2 << 14); /* SDD_SEL [15:14] = 01 SDIO3 */ + writel(reg, &pmt->pmt_ctl_d); + + reg = readl(&pmt->pmt_tri_b); + reg &= ~Z_SDC; /* Z_SDC = normal (0) */ + reg &= ~Z_SDD; /* Z_SDD = normal (0) */ + writel(reg, &pmt->pmt_tri_b); + reg = readl(&pmt->pmt_tri_d); + reg &= ~Z_SDB; /* Z_SDB = normal (0) */ + writel(reg, &pmt->pmt_tri_d); +} + +/* * Routine: clock_init * Description: Do individual peripheral clock reset/enables */ @@ -210,3 +323,36 @@ int board_init(void) return 0; } + +#ifdef CONFIG_TEGRA2_MMC +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("board_mmc_init called\n"); + /* Enable clocks, muxes, etc. for SDMMC controllers */ + clock_init_mmc(); + pin_mux_mmc(); + + debug("board_mmc_init: init eMMC\n"); + /* init dev 0, eMMC chip, with 4-bit bus */ + tegra2_mmc_init(0, 4); + + debug("board_mmc_init: init SD slot\n"); + /* init dev 1, SD slot, with 4-bit bus */ + tegra2_mmc_init(1, 4); + + return 0; +} + +/* this is a weak define that we are overriding */ +int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{ + debug("board_mmc_getcd called\n"); + /* + * Hard-code CD presence for now. Need to add GPIO inputs + * for Seaboard & Harmony (& Kaen/Aebl/Wario?) + */ + *cd = 1; + return 0; +} +#endif diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h index 350bc57..4334c02 100644 --- a/board/nvidia/common/board.h +++ b/board/nvidia/common/board.h @@ -29,5 +29,6 @@ void clock_init(void); void pinmux_init(void); void gpio_init(void); void gpio_config_uart(void); +int tegra2_mmc_init(int dev_index, int bus_width); #endif /* BOARD_H */ diff --git a/board/pcs440ep/config.mk b/board/pcs440ep/config.mk index 23631c5..f560ec6 100644 --- a/board/pcs440ep/config.mk +++ b/board/pcs440ep/config.mk @@ -26,7 +26,7 @@ # # Check the U-Boot Image with a SHA1 checksum -ALL += $(obj)u-boot.sha1 +ALL-y += $(obj)u-boot.sha1 PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/board/pleb2/flash.c b/board/pleb2/flash.c index a8897dc..2406c5f 100644 --- a/board/pleb2/flash.c +++ b/board/pleb2/flash.c @@ -472,7 +472,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) FPWV *addr; int flag, prot, sect; int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL; - ulong now, last; + ulong start, now, last; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -516,8 +516,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("\n"); } - reset_timer_masked (); - /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last && rcode == 0; sect++) { @@ -527,7 +525,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); - reset_timer_masked (); + start = get_timer(0); last = 0; addr = (FPWV *) (info->start[sect]); @@ -559,7 +557,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) while ((*addr & (FPW) 0x00800080) != (FPW) 0x00800080) { if ((now = - get_timer_masked ()) > CONFIG_SYS_FLASH_ERASE_TOUT) { + get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); if (intel) { @@ -661,6 +659,7 @@ static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data) int flag; int res = 0; /* result, assume success */ FPWV *base; /* first address in flash bank */ + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*dest & data) != data) { @@ -683,12 +682,12 @@ static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data) if (flag) enable_interrupts (); - reset_timer_masked (); + start = get_timer(0); /* data polling for D7 */ while (res == 0 && (*dest & (FPW) 0x00800080) != (data & (FPW) 0x00800080)) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *dest = (FPW) 0x00F000F0; /* reset bank */ res = 1; } @@ -711,6 +710,7 @@ static int write_word_intel (flash_info_t * info, FPWV * dest, FPW data) { int flag; int res = 0; /* result, assume success */ + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*dest & data) != data) { @@ -730,10 +730,10 @@ static int write_word_intel (flash_info_t * info, FPWV * dest, FPW data) if (flag) enable_interrupts (); - reset_timer_masked (); + start = get_timer(0); while (res == 0 && (*dest & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *dest = (FPW) 0x00B000B0; /* Suspend program */ res = 1; } diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index e0f44dd..2c50fe8 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -282,7 +282,7 @@ int board_eth_init(bd_t *bis) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); return 0; } diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index ec9f865..8071600 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -379,7 +379,7 @@ int board_init(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); return 0; } diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c index 79b7c9d..fa69599 100644 --- a/board/ronetix/pm9g45/pm9g45.c +++ b/board/ronetix/pm9g45/pm9g45.c @@ -160,7 +160,7 @@ int board_init(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); return 0; } diff --git a/board/samsung/smdk2400/flash.c b/board/samsung/smdk2400/flash.c index fb69c21..47382fe 100644 --- a/board/samsung/smdk2400/flash.c +++ b/board/samsung/smdk2400/flash.c @@ -231,6 +231,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) ulong result, result1; int iflag, prot, sect; int rc = ERR_OK; + ulong start; #ifdef USE_920T_MMU int cflag; @@ -286,7 +287,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) sect, info->start[sect]); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ vu_long *addr = (vu_long *) (info->start[sect]); @@ -299,7 +300,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) /* wait until flash is ready */ do { /* check timeout */ - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = CMD_STATUS_RESET; result = BIT_TIMEOUT; break; @@ -359,6 +360,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) ulong result; int rc = ERR_OK; int iflag; + ulong start; #ifdef USE_920T_MMU int cflag; @@ -389,12 +391,12 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait until flash is ready */ do { /* check timeout */ - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = CMD_SUSPEND; result = BIT_TIMEOUT; break; diff --git a/board/sbc2410x/flash.c b/board/sbc2410x/flash.c index abb0935..d209a6f 100644 --- a/board/sbc2410x/flash.c +++ b/board/sbc2410x/flash.c @@ -173,6 +173,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) int iflag, cflag, prot, sect; int rc = ERR_OK; int chip; + ulong start; /* first look for protection bits */ @@ -213,7 +214,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ vu_short *addr = (vu_short *) (info->start[sect]); @@ -233,7 +234,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) result = *addr; /* check timeout */ - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; chip = TMO; @@ -295,6 +296,7 @@ static int write_hword (flash_info_t * info, ulong dest, ushort data) int rc = ERR_OK; int cflag, iflag; int chip; + ulong start; /* * Check if Flash is (sufficiently) erased @@ -322,7 +324,7 @@ static int write_hword (flash_info_t * info, ulong dest, ushort data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + get_timer(start); /* wait until flash is ready */ chip = 0; @@ -330,7 +332,7 @@ static int write_hword (flash_info_t * info, ulong dest, ushort data) result = *addr; /* check timeout */ - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { chip = ERR | TMO; break; } diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index dd58541..bed8f53 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -63,7 +63,7 @@ phys_size_t initdram (int board_type) dram_size = fixed_sdram (); #endif - puts (" DDR: "); + debug (" DDR: "); return dram_size; } diff --git a/board/scb9328/config.mk b/board/scb9328/config.mk deleted file mode 100644 index 7c5e067..0000000 --- a/board/scb9328/config.mk +++ /dev/null @@ -1,10 +0,0 @@ -# -# This config file is used for compilation of scb93328 sources -# -# You might change location of U-Boot in memory by setting right CONFIG_SYS_TEXT_BASE. -# This allows for example having one copy located at the end of ram and stored -# in flash device and later on while developing use other location to test -# the code in RAM device only. -# - -CONFIG_SYS_TEXT_BASE = 0x08f00000 diff --git a/board/scb9328/flash.c b/board/scb9328/flash.c index c6f94ae..00c660a 100644 --- a/board/scb9328/flash.c +++ b/board/scb9328/flash.c @@ -97,11 +97,12 @@ static FLASH_BUS_RET flash_status_reg (void) static int flash_ready (ulong timeout) { int ok = 1; + ulong start; - reset_timer_masked (); + start = get_timer(0); while ((flash_status_reg () & FLASH_CMD (CFI_INTEL_SR_READY)) != FLASH_CMD (CFI_INTEL_SR_READY)) { - if (get_timer_masked () > timeout && timeout != 0) { + if (get_timer(start) > timeout && timeout != 0) { ok = 0; break; } diff --git a/board/scb9328/scb9328.c b/board/scb9328/scb9328.c index 428e8c9..2e31e8c 100644 --- a/board/scb9328/scb9328.c +++ b/board/scb9328/scb9328.c @@ -39,23 +39,17 @@ int board_init (void) int dram_init (void) { -#if ( CONFIG_NR_DRAM_BANKS > 0 ) + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((volatile void *)SCB9328_SDRAM_1, + SCB9328_SDRAM_1_SIZE); + + return 0; +} + +void dram_init_banksize(void) +{ gd->bd->bi_dram[0].start = SCB9328_SDRAM_1; gd->bd->bi_dram[0].size = SCB9328_SDRAM_1_SIZE; -#endif -#if ( CONFIG_NR_DRAM_BANKS > 1 ) - gd->bd->bi_dram[1].start = SCB9328_SDRAM_2; - gd->bd->bi_dram[1].size = SCB9328_SDRAM_2_SIZE; -#endif -#if ( CONFIG_NR_DRAM_BANKS > 2 ) - gd->bd->bi_dram[2].start = SCB9328_SDRAM_3; - gd->bd->bi_dram[2].size = SCB9328_SDRAM_3_SIZE; -#endif -#if ( CONFIG_NR_DRAM_BANKS > 3 ) - gd->bd->bi_dram[3].start = SCB9328_SDRAM_4; - gd->bd->bi_dram[3].size = SCB9328_SDRAM_4_SIZE; -#endif - return 0; } /** diff --git a/board/shannon/flash.c b/board/shannon/flash.c index 0455afa..179ec5f 100644 --- a/board/shannon/flash.c +++ b/board/shannon/flash.c @@ -190,6 +190,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) int iflag, cflag, prot, sect; int rc = ERR_OK; int chip1, chip2; + ulong start; /* first look for protection bits */ @@ -231,7 +232,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); if (info->protect[sect] == 0) { /* not protected */ @@ -253,7 +254,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) result = *addr; /* check timeout */ - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { MEM_FLASH_ADDR1 = CMD_READ_ARRAY; chip1 = TMO; @@ -322,6 +323,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) int rc = ERR_OK; int cflag, iflag; int chip1, chip2; + ulong start; /* * Check if Flash is (sufficiently) erased @@ -349,7 +351,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); + start = get_timer(0); /* wait until flash is ready */ chip1 = chip2 = 0; @@ -358,7 +360,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) result = *addr; /* check timeout */ - if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { chip1 = ERR | TMO; break; diff --git a/board/spear/spear300/config.mk b/board/spear/spear300/config.mk index 11da2c3..5848ef8 100644 --- a/board/spear/spear300/config.mk +++ b/board/spear/spear300/config.mk @@ -25,7 +25,7 @@ CONFIG_SYS_TEXT_BASE = 0x00700000 -ALL += $(obj)u-boot.img +ALL-y += $(obj)u-boot.img # Environment variables in NAND ifeq ($(ENV),NAND) diff --git a/board/spear/spear310/config.mk b/board/spear/spear310/config.mk index 2b59c39..f8a6bdb 100644 --- a/board/spear/spear310/config.mk +++ b/board/spear/spear310/config.mk @@ -25,7 +25,7 @@ CONFIG_SYS_TEXT_BASE = 0x00700000 -ALL += $(obj)u-boot.img +ALL-y += $(obj)u-boot.img # Environment variables in NAND ifeq ($(ENV),NAND) diff --git a/board/spear/spear320/config.mk b/board/spear/spear320/config.mk index 2b59c39..f8a6bdb 100644 --- a/board/spear/spear320/config.mk +++ b/board/spear/spear320/config.mk @@ -25,7 +25,7 @@ CONFIG_SYS_TEXT_BASE = 0x00700000 -ALL += $(obj)u-boot.img +ALL-y += $(obj)u-boot.img # Environment variables in NAND ifeq ($(ENV),NAND) diff --git a/board/spear/spear600/config.mk b/board/spear/spear600/config.mk index 11da2c3..5848ef8 100644 --- a/board/spear/spear600/config.mk +++ b/board/spear/spear600/config.mk @@ -25,7 +25,7 @@ CONFIG_SYS_TEXT_BASE = 0x00700000 -ALL += $(obj)u-boot.img +ALL-y += $(obj)u-boot.img # Environment variables in NAND ifeq ($(ENV),NAND) diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c index 83ffcd2..3077eb3 100644 --- a/board/stx/stxssa/stxssa.c +++ b/board/stx/stxssa/stxssa.c @@ -34,6 +34,7 @@ #include <asm/processor.h> #include <asm/mmu.h> #include <asm/immap_85xx.h> +#include <asm/fsl_pci.h> #include <asm/fsl_ddr_sdram.h> #include <ioports.h> #include <asm/io.h> @@ -247,6 +248,13 @@ reset_phy(void) #endif } +#ifdef CONFIG_OF_BOARD_SETUP +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup (blob, bd); +} +#endif /* CONFIG_OF_BOARD_SETUP */ + int board_early_init_f(void) { diff --git a/board/syteco/jadecpu/jadecpu.c b/board/syteco/jadecpu/jadecpu.c index a7b6e70..63a0d33 100644 --- a/board/syteco/jadecpu/jadecpu.c +++ b/board/syteco/jadecpu/jadecpu.c @@ -152,7 +152,7 @@ int misc_init_r(void) int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); return 0; diff --git a/board/netstal/hcu5/Makefile b/board/syteco/zmx25/Makefile index 280c2f6..5a0e5b3 100644 --- a/board/netstal/hcu5/Makefile +++ b/board/syteco/zmx25/Makefile @@ -1,6 +1,9 @@ # -# (C) Copyright 2007-2008 Netstal Maschinen AG -# Niklaus Giger (ng@netstal.com) +# (c) 2010 Graf-Syteco, Matthias Weisser +# <weisserm@arcor.de> +# +# See file CREDITS for list of people who contributed to this +# project. # # This program is free software; you can redistribute it and/or # modify it under the terms of the GNU General Public License as @@ -19,25 +22,18 @@ # include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -endif LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o \ - sdram.o \ - ../common/nm_bsp.o -SOBJS = init.o +COBJS-y += zmx25.o +SOBJS := lowlevel_init.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) SOBJS := $(addprefix $(obj),$(SOBJS)) -all: $(LIB) $(SOBJS) - -$(LIB): $(OBJS) - $(call cmd_link_o_target, $^) +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/syteco/zmx25/lowlevel_init.S b/board/syteco/zmx25/lowlevel_init.S new file mode 100644 index 0000000..8e63de0 --- /dev/null +++ b/board/syteco/zmx25/lowlevel_init.S @@ -0,0 +1,110 @@ +/* + * (C) Copyright 2011 + * Matthias Weisser <weisserm@arcor.de> + * + * (C) Copyright 2009 DENX Software Engineering + * Author: John Rigby <jrigby@gmail.com> + * + * Based on U-Boot and RedBoot sources for several different i.mx + * platforms. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/macro.h> +#include <asm/arch/macro.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/asm-offsets.h> + +/* + * clocks + */ +.macro init_clocks + + /* disable clock output */ + write32 IMX_CCM_BASE + CCM_MCR, 0x00000000 + write32 IMX_CCM_BASE + CCM_CCTL, 0x50030000 + + /* + * enable all implemented clocks in all three + * clock control registers + */ + write32 IMX_CCM_BASE + CCM_CGCR0, 0x1fffffff + write32 IMX_CCM_BASE + CCM_CGCR1, 0xffffffff + write32 IMX_CCM_BASE + CCM_CGCR2, 0xfffff + + /* Devide NAND clock by 32 */ + write32 IMX_CCM_BASE + CCM_PCDR2, 0x0101011F +.endm + +/* + * sdram controller init + */ +.macro init_lpddr + ldr r0, =IMX_ESDRAMC_BASE + ldr r2, =IMX_SDRAM_BANK0_BASE + + /* + * reset SDRAM controller + * then wait for initialization to complete + */ + ldr r1, =(1 << 1) | (1 << 2) + str r1, [r0, #ESDRAMC_ESDMISC] +1: ldr r3, [r0, #ESDRAMC_ESDMISC] + tst r3, #(1 << 31) + beq 1b + ldr r1, =(1 << 2) + str r1, [r0, #ESDRAMC_ESDMISC] + + ldr r1, =0x002a7420 + str r1, [r0, #ESDRAMC_ESDCFG0] + + /* control | precharge */ + ldr r1, =0x92216008 + str r1, [r0, #ESDRAMC_ESDCTL0] + /* dram command encoded in address */ + str r1, [r2, #0x400] + + /* auto refresh */ + ldr r1, =0xa2216008 + str r1, [r0, #ESDRAMC_ESDCTL0] + /* read dram twice to auto refresh */ + ldr r3, [r2] + ldr r3, [r2] + + /* control | load mode */ + ldr r1, =0xb2216008 + str r1, [r0, #ESDRAMC_ESDCTL0] + + /* mode register of lpddram */ + strb r1, [r2, #0x33] + + /* extended mode register of lpddrram */ + ldr r2, =0x81000000 + strb r1, [r2] + + /* control | normal */ + ldr r1, =0x82216008 + str r1, [r0, #ESDRAMC_ESDCTL0] +.endm + +.globl lowlevel_init +lowlevel_init: + init_aips + init_max + init_clocks + init_lpddr + mov pc, lr diff --git a/board/syteco/zmx25/zmx25.c b/board/syteco/zmx25/zmx25.c new file mode 100644 index 0000000..f055038 --- /dev/null +++ b/board/syteco/zmx25/zmx25.c @@ -0,0 +1,203 @@ +/* + * (c) 2011 Graf-Syteco, Matthias Weisser + * <weisserm@arcor.de> + * + * Based on tx25.c: + * (C) Copyright 2009 DENX Software Engineering + * Author: John Rigby <jrigby@gmail.com> + * + * Based on imx27lite.c: + * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net> + * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com> + * And: + * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <mxc_gpio.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/imx25-pinmux.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init() +{ + struct iomuxc_mux_ctl *muxctl; + struct iomuxc_pad_ctl *padctl; + struct iomuxc_pad_input_select *inputselect; + u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION; + u32 gpio_mux_mode1 = MX25_PIN_MUX_MODE(1); + u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5); + u32 gpio_mux_mode6 = MX25_PIN_MUX_MODE(6); + u32 input_select1 = MX25_PAD_INPUT_SELECT_DAISY(1); + u32 input_select2 = MX25_PAD_INPUT_SELECT_DAISY(2); + + icache_enable(); + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; + inputselect = (struct iomuxc_pad_input_select *)IMX_IOPADINPUTSEL_BASE; + + /* Setup of core volatage selection pin to run at 1.4V */ + writel(gpio_mux_mode5, &muxctl->pad_ext_armclk); /* VCORE GPIO3[15] */ + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(3, 15), MXC_GPIO_DIRECTION_OUT); + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(3, 15), 1); + + /* Setup of input daisy chains for SD card pins*/ + writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_cmd); + writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_clk); + writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data0); + writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data1); + writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data2); + writel(gpio_mux_mode0_sion, &muxctl->pad_sd1_data3); + + /* Setup of digital output for USB power and OC */ + writel(gpio_mux_mode5, &muxctl->pad_csi_d3); /* USB Power GPIO1[28] */ + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 28), MXC_GPIO_DIRECTION_OUT); + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 28), 1); + + writel(gpio_mux_mode5, &muxctl->pad_csi_d2); /* USB OC GPIO1[27] */ + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 18), MXC_GPIO_DIRECTION_IN); + + /* Setup of digital output control pins */ + writel(gpio_mux_mode5, &muxctl->pad_csi_d8); /* Ouput 1 Ctrl GPIO1[7] */ + writel(gpio_mux_mode5, &muxctl->pad_csi_d7); /* Ouput 2 Ctrl GPIO1[6] */ + writel(gpio_mux_mode5, &muxctl->pad_csi_d6); /* Ouput 1 Stat GPIO1[31]*/ + writel(gpio_mux_mode5, &muxctl->pad_csi_d5); /* Ouput 2 Stat GPIO1[30]*/ + + writel(0, &padctl->pad_csi_d6); /* Ouput 1 Stat pull up off */ + writel(0, &padctl->pad_csi_d5); /* Ouput 2 Stat pull up off */ + + /* Switch both output drivers off */ + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 7), 0); + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 7), MXC_GPIO_DIRECTION_OUT); + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 6), 0); + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 6), MXC_GPIO_DIRECTION_OUT); + + /* Setup of key input pin GPIO2[29]*/ + writel(gpio_mux_mode5 | MX25_PIN_MUX_SION, &muxctl->pad_kpp_row0); + writel(0, &padctl->pad_kpp_row0); /* Key pull up off */ + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(2, 29), MXC_GPIO_DIRECTION_IN); + + /* Setup of status LED outputs */ + writel(gpio_mux_mode5, &muxctl->pad_csi_d9); /* GPIO4[21] */ + writel(gpio_mux_mode5, &muxctl->pad_csi_d4); /* GPIO1[29] */ + + /* Switch both LEDs off */ + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(4, 21), 0); + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(4, 21), MXC_GPIO_DIRECTION_OUT); + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 29), 0); + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(1, 29), MXC_GPIO_DIRECTION_OUT); + + /* Setup of CAN1 and CAN2 signals */ + writel(gpio_mux_mode6, &muxctl->pad_gpio_a); /* CAN1 TX */ + writel(gpio_mux_mode6, &muxctl->pad_gpio_b); /* CAN1 RX */ + writel(gpio_mux_mode6, &muxctl->pad_gpio_c); /* CAN2 TX */ + writel(gpio_mux_mode6, &muxctl->pad_gpio_d); /* CAN2 RX */ + + /* Setup of input daisy chains for CAN signals*/ + writel(input_select1, &inputselect->can1_ipp_ind_canrx); /* CAN1 RX */ + writel(input_select1, &inputselect->can2_ipp_ind_canrx); /* CAN2 RX */ + + /* Setup of I2C3 signals */ + writel(gpio_mux_mode1, &muxctl->pad_cspi1_ss1); /* I2C3 SDA */ + writel(gpio_mux_mode1, &muxctl->pad_gpio_e); /* I2C3 SCL */ + + /* Setup of input daisy chains for I2C3 signals*/ + writel(input_select1, &inputselect->i2c3_ipp_sda_in); /* I2C3 SDA */ + writel(input_select2, &inputselect->i2c3_ipp_scl_in); /* I2C3 SCL */ + + /* board id for linux */ + gd->bd->bi_arch_number = MACH_TYPE_ZMX25; + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int board_late_init(void) +{ + const char *e; + +#ifdef CONFIG_FEC_MXC + struct iomuxc_mux_ctl *muxctl; + struct iomuxc_pad_ctl *padctl; + u32 gpio_mux_mode2 = MX25_PIN_MUX_MODE(2); + u32 gpio_mux_mode5 = MX25_PIN_MUX_MODE(5); + + /* + * fec pin init is generic + */ + mx25_fec_init_pins(); + + /* + * Set up LAN-RESET and FEC_RX_ERR + * + * LAN-RESET: GPIO3[16] is ALT 5 mode of pin U20 + * FEC_RX_ERR: FEC_RX_ERR is ALT 2 mode of pin R2 + */ + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; + + writel(gpio_mux_mode5, &muxctl->pad_upll_bypclk); + writel(gpio_mux_mode2, &muxctl->pad_uart2_cts); + + /* assert PHY reset (low) */ + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(3, 16), 0); + mxc_gpio_direction(MXC_GPIO_PORT_TO_NUM(3, 16), MXC_GPIO_DIRECTION_OUT); + + udelay(5000); + + /* deassert PHY reset */ + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(3, 16), 1); + + udelay(5000); +#endif + + e = getenv("gs_base_board"); + if (e != NULL) { + if (strcmp(e, "G283") == 0) { + int key = mxc_gpio_get(MXC_GPIO_PORT_TO_NUM(2, 29)); + + if (key) { + /* Switch on both LEDs to inidcate boot mode */ + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(1, 29), 0); + mxc_gpio_set(MXC_GPIO_PORT_TO_NUM(4, 21), 0); + + setenv("preboot", "run gs_slow_boot"); + } else + setenv("preboot", "run gs_fast_boot"); + } + } + + return 0; +} + +int dram_init(void) +{ + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, + PHYS_SDRAM_SIZE); + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = gd->ram_size; +} diff --git a/board/ti/omap1610inn/flash.c b/board/ti/omap1610inn/flash.c index 36200ad..1b67d08 100644 --- a/board/ti/omap1610inn/flash.c +++ b/board/ti/omap1610inn/flash.c @@ -278,7 +278,7 @@ void flash_unprotect_sectors (FPWV * addr) int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -311,10 +311,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("\n"); } - - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -329,7 +325,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) flash_unprotect_sectors (addr); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050;/* clear status register */ *addr = (FPW) 0x00200020;/* erase setup */ @@ -338,7 +334,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); /* suspend erase */ @@ -458,6 +454,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -470,11 +467,11 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/ti/omap730p2/flash.c b/board/ti/omap730p2/flash.c index 5b56b98..185bc2d 100644 --- a/board/ti/omap730p2/flash.c +++ b/board/ti/omap730p2/flash.c @@ -261,7 +261,7 @@ void flash_unprotect_sectors (FPWV * addr) int flash_erase (flash_info_t * info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -294,10 +294,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) printf ("\n"); } - - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -312,7 +308,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) flash_unprotect_sectors (addr); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050;/* clear status register */ *addr = (FPW) 0x00200020;/* erase setup */ @@ -321,7 +317,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); /* suspend erase */ @@ -441,6 +437,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -454,11 +451,11 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c index 2aa97f2..260e392 100644 --- a/board/tqc/tqm834x/tqm834x.c +++ b/board/tqc/tqm834x/tqm834x.c @@ -59,7 +59,7 @@ ulong flash_get_size (ulong base, int banknum); /* Local functions */ static int detect_num_flash_banks(void); -static long int get_ddr_bank_size(short cs, volatile long *base); +static long int get_ddr_bank_size(short cs, long *base); static void set_cs_bounds(short cs, long base, long size); static void set_cs_config(short cs, long config); static void set_ddr_config(void); @@ -120,7 +120,7 @@ phys_size_t initdram (int board_type) debug("\nDetecting Bank%d\n", cs); bank_size = get_ddr_bank_size(cs, - (volatile long*)(CONFIG_SYS_DDR_BASE + size)); + (long *)(CONFIG_SYS_DDR_BASE + size)); size += bank_size; debug("DDR Bank%d size: %d MiB\n\n", cs, bank_size >> 20); @@ -262,7 +262,7 @@ static int detect_num_flash_banks(void) /************************************************************************* * Detect the size of a ddr bank. Sets CS bounds and CS config accordingly. */ -static long int get_ddr_bank_size(short cs, volatile long *base) +static long int get_ddr_bank_size(short cs, long *base) { /* This array lists all valid DDR SDRAM configurations, with * Bank sizes in bytes. (Refer to Table 9-27 in the MPC8349E RM). diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c index 39a9e21..baf073e 100644 --- a/board/tqc/tqm85xx/sdram.c +++ b/board/tqc/tqm85xx/sdram.c @@ -363,6 +363,12 @@ static phys_size_t sdram_setup(int casl) udelay (1000); #endif /* CONFIG_TQM8548 */ + /* + * get_ram_size() depends on having tlbs for the DDR, but they are + * not yet setup because we don't know the size. Set up a temp + * mapping and delete it when done. + */ + setup_ddr_tlbs(CONFIG_SYS_DDR_EARLY_SIZE_MB); for (i = 0; i < N_DDR_CS_CONF; i++) { ddr->cs0_config = ddr_cs_conf[i].reg; @@ -376,6 +382,7 @@ static phys_size_t sdram_setup(int casl) break; } } + clear_ddr_tlbs(CONFIG_SYS_DDR_EARLY_SIZE_MB); #ifdef CONFIG_TQM8548 if (i < N_DDR_CS_CONF) { diff --git a/board/xaeniax/flash.c b/board/xaeniax/flash.c index b051c89..6cb0aca 100644 --- a/board/xaeniax/flash.c +++ b/board/xaeniax/flash.c @@ -221,7 +221,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -254,9 +254,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -269,14 +266,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050; /* clear status register */ *addr = (FPW) 0x00200020; /* erase setup */ *addr = (FPW) 0x00D000D0; /* erase confirm */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW) 0x00B000B0; /* suspend erase */ *addr = (FPW) 0x00FF00FF; /* reset to read mode */ @@ -393,6 +390,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -406,11 +404,11 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/xm250/flash.c b/board/xm250/flash.c index b02149c..e825aba 100644 --- a/board/xm250/flash.c +++ b/board/xm250/flash.c @@ -250,7 +250,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -283,9 +283,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -298,14 +295,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050; /* clear status register */ *addr = (FPW) 0x00200020; /* erase setup */ *addr = (FPW) 0x00D000D0; /* erase confirm */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW) 0x00B000B0; /* suspend erase */ *addr = (FPW) 0x00FF00FF; /* reset to read mode */ @@ -422,6 +419,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -435,11 +433,11 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } @@ -470,6 +468,7 @@ int flash_real_protect(flash_info_t *info, long sector, int prot) int rc = 0; vu_long *addr = (vu_long *)(info->start[sector]); int flag = disable_interrupts(); + ulong start; *addr = INTEL_CLEAR; /* Clear status register */ if (prot) { /* Set sector lock bit */ @@ -481,10 +480,10 @@ int flash_real_protect(flash_info_t *info, long sector, int prot) *addr = INTEL_CONFIRM; /* clear */ } - reset_timer_masked (); + start = get_timer(0); while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) { - if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) { printf("Flash lock bit operation timed out\n"); rc = 1; break; @@ -510,13 +509,13 @@ int flash_real_protect(flash_info_t *info, long sector, int prot) { if (info->protect[i]) { - reset_timer_masked (); + start = get_timer(0); addr = (vu_long *)(info->start[i]); *addr = INTEL_LOCKBIT; /* Sector lock bit */ *addr = INTEL_PROTECT; /* set */ while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) { - if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT) + if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) { printf("Flash lock bit operation timed out\n"); rc = 1; diff --git a/board/zylonite/flash.c b/board/zylonite/flash.c index 5ba84c6..3ee0ab8 100644 --- a/board/zylonite/flash.c +++ b/board/zylonite/flash.c @@ -224,7 +224,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info) int flash_erase (flash_info_t *info, int s_first, int s_last) { int flag, prot, sect; - ulong type, start, last; + ulong type, start; int rcode = 0; if ((s_first < 0) || (s_first > s_last)) { @@ -257,9 +257,6 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("\n"); } - start = get_timer (0); - last = start; - /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); @@ -272,14 +269,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) printf ("Erasing sector %2d ... ", sect); /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); *addr = (FPW) 0x00500050; /* clear status register */ *addr = (FPW) 0x00200020; /* erase setup */ *addr = (FPW) 0x00D000D0; /* erase confirm */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW) 0x00B000B0; /* suspend erase */ *addr = (FPW) 0x00FF00FF; /* reset to read mode */ @@ -396,6 +393,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) FPWV *addr = (FPWV *) dest; ulong status; int flag; + ulong start; /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { @@ -409,11 +407,11 @@ static int write_data (flash_info_t *info, ulong dest, FPW data) *addr = data; /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); + start = get_timer(0); /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } |