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-rw-r--r--board/evb64260/eth.c6
-rw-r--r--board/prodrive/p3mx/mv_eth.c8
2 files changed, 7 insertions, 7 deletions
diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c
index 8d1b606..a96e655 100644
--- a/board/evb64260/eth.c
+++ b/board/evb64260/eth.c
@@ -89,7 +89,7 @@ static const char ether_port_phy_addr[3]={4,5,6};
/* MII PHY access routines are common for all i/f, use gal_ent0 */
#define GT6426x_MII_DEVNAME "gal_enet0"
-int gt6426x_miiphy_read(char *devname, unsigned char phy,
+int gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val);
static inline unsigned short
@@ -345,7 +345,7 @@ gt6426x_eth_disable(void *v)
MII utilities - write: write to an MII register via SMI
***************************************************************************/
int
-gt6426x_miiphy_write(char *devname, unsigned char phy,
+gt6426x_miiphy_write(const char *devname, unsigned char phy,
unsigned char reg, unsigned short data)
{
unsigned int temp= (reg<<21) | (phy<<16) | data;
@@ -360,7 +360,7 @@ gt6426x_miiphy_write(char *devname, unsigned char phy,
MII utilities - read: read from an MII register via SMI
***************************************************************************/
int
-gt6426x_miiphy_read(char *devname, unsigned char phy,
+gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val)
{
unsigned int temp= (reg<<21) | (phy<<16) | 1<<26;
diff --git a/board/prodrive/p3mx/mv_eth.c b/board/prodrive/p3mx/mv_eth.c
index e67596b..567ae99 100644
--- a/board/prodrive/p3mx/mv_eth.c
+++ b/board/prodrive/p3mx/mv_eth.c
@@ -99,9 +99,9 @@ int mv64460_eth_receive (struct eth_device *dev);
int mv64460_eth_xmit (struct eth_device *, volatile void *packet, int length);
-int mv_miiphy_read(char *devname, unsigned char phy_addr,
+int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value);
-int mv_miiphy_write(char *devname, unsigned char phy_addr,
+int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value);
int phy_setup_aneg (char *devname, unsigned char addr);
@@ -2544,7 +2544,7 @@ static bool eth_port_read_smi_reg (ETH_PORT eth_port_num,
return true;
}
-int mv_miiphy_read(char *devname, unsigned char phy_addr,
+int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value)
{
unsigned int reg_value;
@@ -2629,7 +2629,7 @@ static bool eth_port_write_smi_reg (ETH_PORT eth_port_num,
return true;
}
-int mv_miiphy_write(char *devname, unsigned char phy_addr,
+int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value)
{
unsigned int reg_value;