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-rw-r--r--board/atum8548/atum8548.c10
-rw-r--r--board/freescale/mpc8536ds/mpc8536ds.c16
-rw-r--r--board/freescale/mpc8544ds/mpc8544ds.c10
-rw-r--r--board/freescale/mpc8548cds/mpc8548cds.c25
-rw-r--r--board/freescale/mpc8568mds/mpc8568mds.c12
-rw-r--r--board/freescale/mpc8572ds/mpc8572ds.c16
-rw-r--r--board/sbc8548/sbc8548.c19
-rw-r--r--board/socrates/tlb.c2
-rw-r--r--board/tqc/tqm85xx/tqm85xx.c2
9 files changed, 9 insertions, 103 deletions
diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index 226ef57..6ef663e 100644
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -37,10 +37,6 @@
#include <libfdt.h>
#include <fdt_support.h>
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
long int fixed_sdram(void);
int board_early_init_f (void)
@@ -117,12 +113,6 @@ initdram(int board_type)
dram_size = fixed_sdram ();
#endif
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
puts(" DDR: ");
return dram_size;
}
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 6fed4ea..2b17612 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -41,10 +41,6 @@
#include "../common/pixis.h"
#include "../common/sgmii_riser.h"
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
phys_size_t fixed_sdram(void);
int checkboard (void)
@@ -65,20 +61,12 @@ initdram(int board_type)
#ifdef CONFIG_SPD_EEPROM
dram_size = fsl_ddr_sdram();
-
- dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-
- dram_size *= 0x100000;
#else
dram_size = fixed_sdram();
#endif
+ dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+ dram_size *= 0x100000;
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
puts(" DDR: ");
return dram_size;
}
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 545d869..14581ab 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -38,10 +38,6 @@
#include "../common/pixis.h"
#include "../common/sgmii_riser.h"
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
int checkboard (void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -77,12 +73,6 @@ initdram(int board_type)
dram_size *= 0x100000;
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
puts(" DDR: ");
return dram_size;
}
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index af5ff42..c562fc9 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -38,10 +38,6 @@
#include "../common/eeprom.h"
#include "../common/via.h"
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
void local_bus_init(void);
@@ -56,7 +52,6 @@ int checkboard (void)
uint pci_slot = get_pci_slot ();
uint cpu_board_rev = get_cpu_board_revision ();
- uint svr;
printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
get_board_version (), pci_slot);
@@ -69,17 +64,6 @@ int checkboard (void)
*/
local_bus_init ();
- svr = get_svr();
-
- /*
- * Fix CPU2 errata: A core hang possible while executing a
- * msync instruction and a snoopable transaction from an I/O
- * master tagged to make quick forward progress is present.
- * Fixed in Silicon Rev.2.1
- */
- if (!(SVR_MAJ(svr) >= 2 && SVR_MIN(svr) >= 1))
- ecm->eebpcr |= (1 << 16);
-
/*
* Hack TSEC 3 and 4 IO voltages.
*/
@@ -118,13 +102,6 @@ initdram(int board_type)
dram_size = setup_ddr_tlbs(dram_size / 0x100000);
dram_size *= 0x100000;
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
/*
* SDRAM Initialization
*/
@@ -355,7 +332,7 @@ pci_init_board(void)
first_free_busno=hose->last_busno+1;
printf ("PCI on bus %02x - %02x\n",hose->first_busno,hose->last_busno);
#ifdef CONFIG_PCIX_CHECK
- if (!(gur->pordevsr & PORDEVSR_PCI)) {
+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) {
/* PCI-X init */
if (CONFIG_SYS_CLK_FREQ < 66000000)
printf("PCI-X will only work at 66 MHz\n");
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index 688d8c3..bc93be8 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -99,11 +99,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
{0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
};
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
void local_bus_init(void);
void sdram_init(void);
@@ -170,13 +165,6 @@ initdram(int board_type)
dram_size = setup_ddr_tlbs(dram_size / 0x100000);
dram_size *= 0x100000;
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
/*
* SDRAM Initialization
*/
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 3a78c98..a14db5a 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -38,10 +38,6 @@
#include "../common/pixis.h"
#include "../common/sgmii_riser.h"
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
long int fixed_sdram(void);
int checkboard (void)
@@ -61,20 +57,12 @@ phys_size_t initdram(int board_type)
#ifdef CONFIG_SPD_EEPROM
dram_size = fsl_ddr_sdram();
-
- dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-
- dram_size *= 0x100000;
#else
dram_size = fixed_sdram();
#endif
+ dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+ dram_size *= 0x100000;
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
puts(" DDR: ");
return dram_size;
}
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 9548ac6..8c073cb 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -36,10 +36,6 @@
#include <libfdt.h>
#include <fdt_support.h>
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
void local_bus_init(void);
@@ -66,13 +62,6 @@ int checkboard (void)
local_bus_init ();
/*
- * Fix CPU2 errata: A core hang possible while executing a
- * msync instruction and a snoopable transaction from an I/O
- * master tagged to make quick forward progress is present.
- */
- ecm->eebpcr |= (1 << 16);
-
- /*
* Hack TSEC 3 and 4 IO voltages.
*/
gur->tsec34ioovcr = 0xe7e0; /* 1110 0111 1110 0xxx */
@@ -114,12 +103,6 @@ initdram(int board_type)
dram_size = fixed_sdram ();
#endif
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
/*
* SDRAM Initialization
*/
@@ -429,7 +412,7 @@ pci_init_board(void)
first_free_busno=hose->last_busno+1;
printf ("PCI on bus %02x - %02x\n",hose->first_busno,hose->last_busno);
#ifdef CONFIG_PCIX_CHECK
- if (!(gur->pordevsr & PORDEVSR_PCI)) {
+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) {
/* PCI-X init */
if (CONFIG_SYS_CLK_FREQ < 66000000)
printf("PCI-X will only work at 66 MHz\n");
diff --git a/board/socrates/tlb.c b/board/socrates/tlb.c
index b91b1ea..4591e46 100644
--- a/board/socrates/tlb.c
+++ b/board/socrates/tlb.c
@@ -100,6 +100,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_64M, 1),
+#if !defined(CONFIG_SPD_EEPROM)
/*
* TLB 7+8: 512M DDR, cache disabled (needed for memory test)
* 0x00000000 512M DDR System memory
@@ -114,6 +115,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 8, BOOKE_PAGESZ_256M, 1),
+#endif
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c
index 3a828ed..73f1d01 100644
--- a/board/tqc/tqm85xx/tqm85xx.c
+++ b/board/tqc/tqm85xx/tqm85xx.c
@@ -610,7 +610,7 @@ static inline void init_pci1(void)
first_free_busno = hose->last_busno + 1;
#ifdef CONFIG_PCIX_CHECK
- if (!(gur->pordevsr & PORDEVSR_PCI)) {
+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) {
ushort reg16 =
PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ |
PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
generated by cgit v1.1 at 2024-12-28 11:53:02 +0000