summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
Diffstat (limited to 'board')
-rw-r--r--board/davinci/common/psc.c65
-rw-r--r--board/davinci/common/psc.h4
-rw-r--r--board/davinci/dvevm/dvevm.c35
-rw-r--r--board/davinci/schmoogie/schmoogie.c37
-rw-r--r--board/davinci/sffsdr/sffsdr.c31
-rw-r--r--board/davinci/sonata/sonata.c35
-rw-r--r--board/omap3/beagle/beagle.c41
-rw-r--r--board/omap3/beagle/beagle.h3
-rw-r--r--board/omap3/evm/evm.h1
-rw-r--r--board/omap3/overo/Makefile1
-rw-r--r--board/omap3/overo/overo.c13
-rw-r--r--board/omap3/overo/overo.h19
-rw-r--r--board/omap3/pandora/pandora.h13
-rw-r--r--board/omap3/zoom1/zoom1.h1
-rw-r--r--board/st/nmdk8815/nmdk8815.c5
15 files changed, 166 insertions, 138 deletions
diff --git a/board/davinci/common/psc.c b/board/davinci/common/psc.c
index d538d51..28e2a4b 100644
--- a/board/davinci/common/psc.c
+++ b/board/davinci/common/psc.c
@@ -26,6 +26,14 @@
#include <common.h>
#include <asm/arch/hardware.h>
+#define PINMUX0_EMACEN (1 << 31)
+#define PINMUX0_AECS5 (1 << 11)
+#define PINMUX0_AECS4 (1 << 10)
+
+#define PINMUX1_I2C (1 << 7)
+#define PINMUX1_UART1 (1 << 1)
+#define PINMUX1_UART0 (1 << 0)
+
/*
* The DM6446 includes two separate power domains: "Always On" and "DSP". The
* "Always On" power domain is always on when the chip is on. The "Always On"
@@ -115,3 +123,60 @@ void dsp_on(void)
REG(PSC_GBLCTL) &= ~0x1f;
}
#endif /* CONFIG_SYS_USE_DSPLINK */
+
+void davinci_enable_uart0(void)
+{
+ lpsc_on(DAVINCI_LPSC_UART0);
+
+ /* Bringup UART0 out of reset */
+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+ /* Enable UART0 MUX lines */
+ REG(PINMUX1) |= PINMUX1_UART0;
+}
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+void davinci_enable_emac(void)
+{
+ lpsc_on(DAVINCI_LPSC_EMAC);
+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+ lpsc_on(DAVINCI_LPSC_MDIO);
+
+ /* Enable GIO3.3V cells used for EMAC */
+ REG(VDD3P3V_PWDN) = 0;
+
+ /* Enable EMAC. */
+ REG(PINMUX0) |= PINMUX0_EMACEN;
+}
+#endif
+
+void davinci_enable_i2c(void)
+{
+ lpsc_on(DAVINCI_LPSC_I2C);
+
+ /* Enable I2C pin Mux */
+ REG(PINMUX1) |= PINMUX1_I2C;
+}
+
+void davinci_errata_workarounds(void)
+{
+ /*
+ * Workaround for TMS320DM6446 errata 1.3.22:
+ * PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset
+ * Revision(s) Affected: 1.3 and earlier
+ */
+ REG(PSC_SILVER_BULLET) = 0;
+
+ /*
+ * Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR)
+ * as suggested in TMS320DM6446 errata 2.1.2:
+ *
+ * On DM6446 Silicon Revision 2.1 and earlier, under certain conditions
+ * low priority modules can occupy the bus and prevent high priority
+ * modules like the VPSS from getting the required DDR2 throughput.
+ * A hex value of 0x20 should provide a good ARM (cache enabled)
+ * performance and still allow good utilization by the VPSS or other
+ * modules.
+ */
+ REG(VBPR) = 0x20;
+}
diff --git a/board/davinci/common/psc.h b/board/davinci/common/psc.h
index 6ab2575..b2dd7b5 100644
--- a/board/davinci/common/psc.h
+++ b/board/davinci/common/psc.h
@@ -24,5 +24,9 @@
void lpsc_on(unsigned int id);
void dsp_on(void);
+void davinci_enable_uart0(void);
+void davinci_enable_emac(void);
+void davinci_enable_i2c(void);
+void davinci_errata_workarounds(void);
#endif /* __PSC_H */
diff --git a/board/davinci/dvevm/dvevm.c b/board/davinci/dvevm/dvevm.c
index 3fe8858..22308de 100644
--- a/board/davinci/dvevm/dvevm.c
+++ b/board/davinci/dvevm/dvevm.c
@@ -27,7 +27,6 @@
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -41,16 +40,13 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ /* Configure AEMIF pins (although this should be configured at boot time
+ * with pull-up/pull-down resistors) */
+ REG(PINMUX0) = 0x00000c1f;
+
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
lpsc_on(DAVINCI_LPSC_USB);
@@ -59,24 +55,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);
diff --git a/board/davinci/schmoogie/schmoogie.c b/board/davinci/schmoogie/schmoogie.c
index 3504a2e..433769a 100644
--- a/board/davinci/schmoogie/schmoogie.c
+++ b/board/davinci/schmoogie/schmoogie.c
@@ -27,7 +27,6 @@
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -41,16 +40,13 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ /* Configure AEMIF pins (although this should be configured at boot time
+ * with pull-up/pull-down resistors) */
+ REG(PINMUX0) = 0x00000c1f;
+
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
#if !defined(CONFIG_SYS_USE_DSPLINK)
@@ -58,24 +54,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);
@@ -87,7 +70,7 @@ int misc_init_r(void)
int i = 0;
/* Set serial number from UID chip */
- u_int8_t crc_tbl[256] = {
+ const u_int8_t crc_tbl[256] = {
0x00, 0x5e, 0xbc, 0xe2, 0x61, 0x3f, 0xdd, 0x83,
0xc2, 0x9c, 0x7e, 0x20, 0xa3, 0xfd, 0x1f, 0x41,
0x9d, 0xc3, 0x21, 0x7f, 0xfc, 0xa2, 0x40, 0x1e,
diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
index 9296d7b..e76f86d 100644
--- a/board/davinci/sffsdr/sffsdr.c
+++ b/board/davinci/sffsdr/sffsdr.c
@@ -30,7 +30,6 @@
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -51,16 +50,9 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
#if !defined(CONFIG_SYS_USE_DSPLINK)
@@ -68,24 +60,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);
diff --git a/board/davinci/sonata/sonata.c b/board/davinci/sonata/sonata.c
index 6de9356..d56b443 100644
--- a/board/davinci/sonata/sonata.c
+++ b/board/davinci/sonata/sonata.c
@@ -26,7 +26,6 @@
#include <common.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -40,16 +39,13 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ /* Configure AEMIF pins (although this should be configured at boot time
+ * with pull-up/pull-down resistors) */
+ REG(PINMUX0) = 0x00000c1f;
+
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
#if !defined(CONFIG_SYS_USE_DSPLINK)
@@ -57,24 +53,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);
diff --git a/board/omap3/beagle/beagle.c b/board/omap3/beagle/beagle.c
index ecdea09..7377058 100644
--- a/board/omap3/beagle/beagle.c
+++ b/board/omap3/beagle/beagle.c
@@ -36,6 +36,8 @@
#include <asm/mach-types.h>
#include "beagle.h"
+static int beagle_revision_c;
+
/******************************************************************************
* Routine: board_init
* Description: Early hardware init.
@@ -54,6 +56,43 @@ int board_init(void)
}
/******************************************************************************
+ * Routine: beagle_get_revision
+ * Description: Return revision of the BeagleBoard this code is running on.
+ * If it is a revision Ax/Bx board, this function returns 0,
+ * on a revision C board you will get a 1.
+ *****************************************************************************/
+int beagle_get_revision(void)
+{
+ return beagle_revision_c;
+}
+
+/******************************************************************************
+ * Routine: beagle_identify
+ * Description: Detect if we are running on a Beagle revision Ax/Bx or
+ * Cx. This can be done by GPIO_171. If this is low, we are
+ * running on a revision C board.
+ *****************************************************************************/
+void beagle_identify(void)
+{
+ gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE;
+
+ /* Configure GPIO 171 as input */
+ writel(readl(&gpio6_base->oe) | GPIO11, &gpio6_base->oe);
+
+ /* Get value of GPIO 171 */
+ beagle_revision_c = readl(&gpio6_base->datain) & BOARD_REVISION_MASK;
+
+ printf("Board revision ");
+ if (beagle_revision_c) {
+ printf("Ax/Bx\n");
+ beagle_revision_c = 0;
+ } else {
+ printf("C\n");
+ beagle_revision_c = 1;
+ }
+}
+
+/******************************************************************************
* Routine: misc_init_r
* Description: Configure board specific parts
*****************************************************************************/
@@ -75,6 +114,8 @@ int misc_init_r(void)
writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
+ beagle_identify();
+
return 0;
}
diff --git a/board/omap3/beagle/beagle.h b/board/omap3/beagle/beagle.h
index 6511ffa..d66f159 100644
--- a/board/omap3/beagle/beagle.h
+++ b/board/omap3/beagle/beagle.h
@@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
- "3530",
"OMAP3 Beagle board",
#if defined(CONFIG_ENV_IS_IN_ONENAND)
"OneNAND",
@@ -36,6 +35,8 @@ const omap3_sysinfo sysinfo = {
#endif
};
+#define BOARD_REVISION_MASK (0x1 << 11)
+
/*
* IEN - Input Enable
* IDIS - Input Disable
diff --git a/board/omap3/evm/evm.h b/board/omap3/evm/evm.h
index 4ecea7f..199824f 100644
--- a/board/omap3/evm/evm.h
+++ b/board/omap3/evm/evm.h
@@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
OMAP3EVM_V1,
OMAP3EVM_V2,
DDR_DISCRETE,
- "35X-Family",
"OMAP3 EVM board",
#if defined(CONFIG_ENV_IS_IN_ONENAND)
"OneNAND",
diff --git a/board/omap3/overo/Makefile b/board/omap3/overo/Makefile
index c165629..dd673ca 100644
--- a/board/omap3/overo/Makefile
+++ b/board/omap3/overo/Makefile
@@ -44,4 +44,5 @@ distclean: clean
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
+#########################################################################
sinclude $(obj).depend
diff --git a/board/omap3/overo/overo.c b/board/omap3/overo/overo.c
index 7964123..48375ad 100644
--- a/board/omap3/overo/overo.c
+++ b/board/omap3/overo/overo.c
@@ -58,21 +58,8 @@ int board_init(void)
*****************************************************************************/
int misc_init_r(void)
{
- gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE;
- gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE;
-
power_init_r();
- /* Configure GPIOs to output */
- writel(~((GPIO10) | GPIO9 | GPIO3 | GPIO2), &gpio6_base->oe);
- writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
- GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
-
- /* Set GPIOs */
- writel(GPIO10 | GPIO9 | GPIO3 | GPIO2, &gpio6_base->setdataout);
- writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
- GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
-
return 0;
}
diff --git a/board/omap3/overo/overo.h b/board/omap3/overo/overo.h
index 3c1b6bc..71de3f1 100644
--- a/board/omap3/overo/overo.h
+++ b/board/omap3/overo/overo.h
@@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
- "3503",
"Gumstix Overo board",
#if defined(CONFIG_ENV_IS_IN_ONENAND)
"OneNAND",
@@ -130,7 +129,8 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /*GPIO_64*/\
+ /* - SMSC911X_NRES*/\
MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\
/*DSS*/\
MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
@@ -184,7 +184,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\
MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\
MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\
- MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\
+ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\
MUX_VAL(CP(CSI2_DY1), (IEN | PTU | EN | M4)) /*GPIO_115*/\
/*Audio Interface */\
MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\
@@ -218,10 +218,10 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\
- MUX_VAL(CP(UART2_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
- MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145*/\
- MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M4)) /*GPIO_146*/\
- MUX_VAL(CP(UART2_RX), (IDIS | PTD | DIS | M4)) /*GPIO_147*/\
+ MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
+ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\
+ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\
MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
MUX_VAL(CP(UART1_RTS), (IEN | PTU | DIS | M4)) /*GPIO_149*/ \
MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\
@@ -271,7 +271,8 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\
- MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\
+ MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176*/\
+ /* - SMSC911X_IRQ*/\
MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA2*/\
MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA7*/\
MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA4*/\
@@ -306,7 +307,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT6*/\
MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT5*/\
MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
- MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | EN | M3)) /*HSUSB2_STP*/\
+ MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DIR*/\
MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_NXT*/\
MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA0*/\
diff --git a/board/omap3/pandora/pandora.h b/board/omap3/pandora/pandora.h
index 8525a03..dd09f12 100644
--- a/board/omap3/pandora/pandora.h
+++ b/board/omap3/pandora/pandora.h
@@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
- "3530",
"OMAP3 Pandora",
"NAND",
};
@@ -200,12 +199,12 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\
MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | DIS | M4)) /*GPIO_127 - MMC2_WP*/\
/*SDIO Interface to WIFI Module*/\
- MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M2)) /*MMC3_CLK*/\
- MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CMD*/\
- MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT0*/\
- MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT1*/\
- MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT2*/\
- MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT3*/\
+ MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CLK*/\
+ MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\
+ MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\
+ MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\
+ MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\
+ MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\
/*Audio Interface To Bluetooth chip*/\
MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\
diff --git a/board/omap3/zoom1/zoom1.h b/board/omap3/zoom1/zoom1.h
index d389492..bc8fba8 100644
--- a/board/omap3/zoom1/zoom1.h
+++ b/board/omap3/zoom1/zoom1.h
@@ -31,7 +31,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
- "3430",
"OMAP3 Zoom MDK Rev 1",
"NAND",
};
diff --git a/board/st/nmdk8815/nmdk8815.c b/board/st/nmdk8815/nmdk8815.c
index c54eac1..edf4626 100644
--- a/board/st/nmdk8815/nmdk8815.c
+++ b/board/st/nmdk8815/nmdk8815.c
@@ -49,8 +49,11 @@ int board_init(void)
writel(0x00000000, NOMADIK_GPIO1_BASE + 0x28);
writel(readl(NOMADIK_SRC_BASE) | 0x8000, NOMADIK_SRC_BASE);
- icache_enable();
+ /* Set up SMCS1 for Ethernet: sram-like, enabled, timing values */
+ writel(0x0000305b, REG_FSMC_BCR1);
+ writel(0x00033f33, REG_FSMC_BTR1);
+ icache_enable();
return 0;
}
generated by cgit v1.1 at 2024-12-11 22:34:07 +0000