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-rw-r--r--board/dbau1x00/Kconfig12
-rw-r--r--board/imgtec/malta/Kconfig3
-rw-r--r--board/imgtec/malta/lowlevel_init.S13
-rw-r--r--board/micronas/vct/Kconfig12
-rw-r--r--board/pb1x00/Kconfig12
-rw-r--r--board/qca/ap121/Kconfig12
-rw-r--r--board/qca/ap121/ap121.c2
-rw-r--r--board/qca/ap143/Kconfig12
-rw-r--r--board/qca/ap143/ap143.c2
-rw-r--r--board/qemu-mips/Kconfig12
-rw-r--r--board/tplink/wdr4300/Kconfig12
11 files changed, 97 insertions, 7 deletions
diff --git a/board/dbau1x00/Kconfig b/board/dbau1x00/Kconfig
index 342ec59..448176d 100644
--- a/board/dbau1x00/Kconfig
+++ b/board/dbau1x00/Kconfig
@@ -12,6 +12,18 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE
default 0xbfc00000
+config SYS_DCACHE_SIZE
+ default 16384
+
+config SYS_DCACHE_LINE_SIZE
+ default 32
+
+config SYS_ICACHE_SIZE
+ default 16384
+
+config SYS_ICACHE_LINE_SIZE
+ default 32
+
menu "dbau1x00 board options"
choice
diff --git a/board/imgtec/malta/Kconfig b/board/imgtec/malta/Kconfig
index 2bb8e8b..98eb4d1 100644
--- a/board/imgtec/malta/Kconfig
+++ b/board/imgtec/malta/Kconfig
@@ -10,6 +10,7 @@ config SYS_CONFIG_NAME
default "malta"
config SYS_TEXT_BASE
- default 0xbe000000
+ default 0xbe000000 if 32BIT
+ default 0xffffffffbe000000 if 64BIT
endif
diff --git a/board/imgtec/malta/lowlevel_init.S b/board/imgtec/malta/lowlevel_init.S
index 534db1d..3d48cdc 100644
--- a/board/imgtec/malta/lowlevel_init.S
+++ b/board/imgtec/malta/lowlevel_init.S
@@ -10,6 +10,7 @@
#include <pci.h>
#include <asm/addrspace.h>
+#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/malta.h>
#include <asm/mipsregs.h>
@@ -34,7 +35,7 @@ lowlevel_init:
mtc0 t0, CP0_CONFIG, 2
/* detect the core card */
- li t0, KSEG1ADDR(MALTA_REVISION)
+ PTR_LI t0, CKSEG1ADDR(MALTA_REVISION)
lw t0, 0(t0)
srl t0, t0, MALTA_REVISION_CORID_SHF
andi t0, t0, (MALTA_REVISION_CORID_MSK >> \
@@ -68,12 +69,12 @@ lowlevel_init:
*/
_gt64120:
/* move GT64120 registers from 0x14000000 to 0x1be00000 */
- li t1, KSEG1ADDR(GT_DEF_BASE)
+ PTR_LI t1, CKSEG1ADDR(GT_DEF_BASE)
li t0, CPU_TO_GT32(0xdf000000)
sw t0, GT_ISD_OFS(t1)
/* setup MEM-to-PCI0 mapping */
- li t1, KSEG1ADDR(MALTA_GT_BASE)
+ PTR_LI t1, CKSEG1ADDR(MALTA_GT_BASE)
/* setup PCI0 io window to 0x18000000-0x181fffff */
li t0, CPU_TO_GT32(0xc0000000)
@@ -100,7 +101,7 @@ _gt64120:
*/
_msc01:
/* setup peripheral bus controller clock divide */
- li t0, KSEG1ADDR(MALTA_MSC01_PBC_BASE)
+ PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_PBC_BASE)
li t1, 0x1 << MSC01_PBC_CLKCFG_SHF
sw t1, MSC01_PBC_CLKCFG_OFS(t0)
@@ -122,7 +123,7 @@ _msc01:
sw t1, MSC01_PBC_CS0CFG_OFS(t0)
/* setup basic address decode */
- li t0, KSEG1ADDR(MALTA_MSC01_BIU_BASE)
+ PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_BIU_BASE)
li t1, 0x0
li t2, -CONFIG_SYS_MEM_SIZE
sw t1, MSC01_BIU_MCBAS1L_OFS(t0)
@@ -157,7 +158,7 @@ _msc01:
sw t2, MSC01_BIU_IP3MSK2L_OFS(t0)
/* setup PCI memory */
- li t0, KSEG1ADDR(MALTA_MSC01_PCI_BASE)
+ PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_PCI_BASE)
li t1, MALTA_MSC01_PCIMEM_BASE
li t2, (-MALTA_MSC01_PCIMEM_SIZE) & MSC01_PCI_SC2PMMSKL_MSK_MSK
li t3, MALTA_MSC01_PCIMEM_MAP
diff --git a/board/micronas/vct/Kconfig b/board/micronas/vct/Kconfig
index 535a77b..df7c029 100644
--- a/board/micronas/vct/Kconfig
+++ b/board/micronas/vct/Kconfig
@@ -12,6 +12,18 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE
default 0x87000000
+config SYS_DCACHE_SIZE
+ default 16384
+
+config SYS_DCACHE_LINE_SIZE
+ default 32
+
+config SYS_ICACHE_SIZE
+ default 16384
+
+config SYS_ICACHE_LINE_SIZE
+ default 32
+
menu "vct board options"
choice
diff --git a/board/pb1x00/Kconfig b/board/pb1x00/Kconfig
index 236a410..ef8905d 100644
--- a/board/pb1x00/Kconfig
+++ b/board/pb1x00/Kconfig
@@ -12,4 +12,16 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE
default 0x83800000
+config SYS_DCACHE_SIZE
+ default 16384
+
+config SYS_DCACHE_LINE_SIZE
+ default 32
+
+config SYS_ICACHE_SIZE
+ default 16384
+
+config SYS_ICACHE_LINE_SIZE
+ default 32
+
endif
diff --git a/board/qca/ap121/Kconfig b/board/qca/ap121/Kconfig
index c3ecc8f..4fd6a71 100644
--- a/board/qca/ap121/Kconfig
+++ b/board/qca/ap121/Kconfig
@@ -12,4 +12,16 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE
default 0x9f000000
+config SYS_DCACHE_SIZE
+ default 32768
+
+config SYS_DCACHE_LINE_SIZE
+ default 32
+
+config SYS_ICACHE_SIZE
+ default 65536
+
+config SYS_ICACHE_LINE_SIZE
+ default 32
+
endif
diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
index d6c60fe..e245faa 100644
--- a/board/qca/ap121/ap121.c
+++ b/board/qca/ap121/ap121.c
@@ -10,6 +10,7 @@
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/ddr.h>
+#include <mach/ath79.h>
#include <debug_uart.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -46,5 +47,6 @@ int board_early_init_f(void)
debug_uart_init();
#endif
ddr_init();
+ ath79_eth_reset();
return 0;
}
diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig
index 5ea5d6f..74c632a 100644
--- a/board/qca/ap143/Kconfig
+++ b/board/qca/ap143/Kconfig
@@ -12,4 +12,16 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE
default 0x9f000000
+config SYS_DCACHE_SIZE
+ default 32768
+
+config SYS_DCACHE_LINE_SIZE
+ default 32
+
+config SYS_ICACHE_SIZE
+ default 65536
+
+config SYS_ICACHE_LINE_SIZE
+ default 32
+
endif
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
index 1572472..e921ea5 100644
--- a/board/qca/ap143/ap143.c
+++ b/board/qca/ap143/ap143.c
@@ -10,6 +10,7 @@
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/ddr.h>
+#include <mach/ath79.h>
#include <debug_uart.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -62,5 +63,6 @@ int board_early_init_f(void)
debug_uart_init();
#endif
ddr_init();
+ ath79_eth_reset();
return 0;
}
diff --git a/board/qemu-mips/Kconfig b/board/qemu-mips/Kconfig
index 3de1f44..e696a12 100644
--- a/board/qemu-mips/Kconfig
+++ b/board/qemu-mips/Kconfig
@@ -11,4 +11,16 @@ config SYS_TEXT_BASE
default 0xbfc00000 if 32BIT
default 0xffffffffbfc00000 if 64BIT
+config SYS_DCACHE_SIZE
+ default 16384
+
+config SYS_DCACHE_LINE_SIZE
+ default 32
+
+config SYS_ICACHE_SIZE
+ default 16384
+
+config SYS_ICACHE_LINE_SIZE
+ default 32
+
endif
diff --git a/board/tplink/wdr4300/Kconfig b/board/tplink/wdr4300/Kconfig
index 65785bd..67a0228 100644
--- a/board/tplink/wdr4300/Kconfig
+++ b/board/tplink/wdr4300/Kconfig
@@ -15,4 +15,16 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE
default 0xa1000000
+config SYS_DCACHE_SIZE
+ default 32768
+
+config SYS_DCACHE_LINE_SIZE
+ default 32
+
+config SYS_ICACHE_SIZE
+ default 65536
+
+config SYS_ICACHE_LINE_SIZE
+ default 32
+
endif
generated by cgit v1.1 at 2024-12-18 14:14:40 +0000