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-rw-r--r--board/lubbock/flash.c7
-rw-r--r--board/mx1ads/mx1ads.c7
-rw-r--r--board/mx1ads/syncflash.c20
-rw-r--r--board/ronetix/pm9263/pm9263.c13
-rw-r--r--board/xaeniax/flash.c7
5 files changed, 24 insertions, 30 deletions
diff --git a/board/lubbock/flash.c b/board/lubbock/flash.c
index e1e7807..bf8f0c9 100644
--- a/board/lubbock/flash.c
+++ b/board/lubbock/flash.c
@@ -220,7 +220,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info)
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
- int flag, prot, sect;
+ int prot, sect;
ulong type, start;
int rcode = 0;
@@ -255,7 +255,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
}
/* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
+ disable_interrupts();
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last; sect++) {
@@ -389,7 +389,6 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
{
FPWV *addr = (FPWV *) dest;
ulong status;
- int flag;
ulong start;
/* Check if Flash is (sufficiently) erased */
@@ -398,7 +397,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
return (2);
}
/* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
+ disable_interrupts();
*addr = (FPW) 0x00400040; /* write setup */
*addr = data;
diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c
index 86b49fb..da9e21d 100644
--- a/board/mx1ads/mx1ads.c
+++ b/board/mx1ads/mx1ads.c
@@ -27,6 +27,7 @@
#include <netdev.h>
/*#include <mc9328.h>*/
#include <asm/arch/imx-regs.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -80,8 +81,6 @@ static u32 mc9328sid;
int board_early_init_f(void)
{
- volatile unsigned int tmp;
-
mc9328sid = SIDR;
GPCR = 0x000003AB; /* I/O pad driving strength */
@@ -107,8 +106,8 @@ int board_early_init_f(void)
GIUS (0) &= 0xFF3FFFFF;
GPR (0) &= 0xFF3FFFFF;
- tmp = *(unsigned int *) (0x1500000C);
- tmp = *(unsigned int *) (0x1500000C);
+ readl(0x1500000C);
+ readl(0x1500000C);
SetAsynchMode ();
diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c
index 7331efa..61a882e 100644
--- a/board/mx1ads/syncflash.c
+++ b/board/mx1ads/syncflash.c
@@ -57,7 +57,7 @@ flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips
/* Get Status register */
u32 SF_SR(void) {
- u32 tmp,tmp1;
+ u32 tmp;
reg_SFCTL = CMD_PROGRAM;
tmp = __REG(CONFIG_SYS_FLASH_BASE);
@@ -65,7 +65,7 @@ u32 SF_SR(void) {
reg_SFCTL = CMD_NORMAL;
reg_SFCTL = CMD_LCR; /* Activate LCR Mode */
- tmp1 = __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR);
+ __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR);
return tmp;
}
@@ -93,10 +93,10 @@ u8 SF_Ready(void) {
/* Issue the precharge all command */
void SF_PrechargeAll(void) {
- u32 tmp;
-
- reg_SFCTL = CMD_PREC; /* Set Precharge Command */
- tmp = __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */
+ /* Set Precharge Command */
+ reg_SFCTL = CMD_PREC;
+ /* Issue Precharge All Command */
+ __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10);
}
/* set SyncFlash to normal mode */
@@ -109,13 +109,12 @@ void SF_Normal(void) {
/* Erase SyncFlash */
void SF_Erase(u32 RowAddress) {
- u32 tmp;
reg_SFCTL = CMD_NORMAL;
- tmp = __REG(RowAddress);
+ __REG(RowAddress);
reg_SFCTL = CMD_PREC;
- tmp = __REG(RowAddress);
+ __REG(RowAddress);
reg_SFCTL = CMD_LCR; /* Set LCR mode */
__REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */
@@ -152,7 +151,6 @@ void SF_NvmodeWrite(void) {
ulong flash_init(void) {
int i, j;
- u32 tmp;
/* Turn on CSD1 for negating RESETSF of SyncFLash */
@@ -160,7 +158,7 @@ ulong flash_init(void) {
udelay(200);
reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */
- tmp = __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */
+ __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */
SF_Normal();
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index b0f7ea6..335efba 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -164,7 +164,6 @@ void lcd_disable(void)
/* Initialize the PSRAM memory */
static int pm9263_lcd_hw_psram_init(void)
{
- volatile uint16_t x;
unsigned long csa;
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC1;
struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
@@ -196,14 +195,14 @@ static int pm9263_lcd_hw_psram_init(void)
at91_set_pio_value(PSRAM_CRE_PIN, 0); /* set PSRAM_CRE_PIN to '0' */
/* PSRAM: write BCR */
- x = readw(PSRAM_CTRL_REG);
- x = readw(PSRAM_CTRL_REG);
+ readw(PSRAM_CTRL_REG);
+ readw(PSRAM_CTRL_REG);
writew(1, PSRAM_CTRL_REG); /* 0 - RCR,1 - BCR */
writew(0x9d4f, PSRAM_CTRL_REG); /* write the BCR */
/* write RCR of the PSRAM */
- x = readw(PSRAM_CTRL_REG);
- x = readw(PSRAM_CTRL_REG);
+ readw(PSRAM_CTRL_REG);
+ readw(PSRAM_CTRL_REG);
writew(0, PSRAM_CTRL_REG); /* 0 - RCR,1 - BCR */
/* set RCR; 0x10-async mode,0x90-page mode */
writew(0x90, PSRAM_CTRL_REG);
@@ -222,8 +221,8 @@ static int pm9263_lcd_hw_psram_init(void)
at91_set_pio_value(PSRAM_CRE_PIN, 1); /* set PSRAM_CRE_PIN to '1' */
/* write RCR of the PSRAM */
- x = readw(PSRAM_CTRL_REG);
- x = readw(PSRAM_CTRL_REG);
+ readw(PSRAM_CTRL_REG);
+ readw(PSRAM_CTRL_REG);
writew(0, PSRAM_CTRL_REG); /* 0 - RCR,1 - BCR */
/* set RCR;0x10-async mode,0x90-page mode */
writew(0x90, PSRAM_CTRL_REG);
diff --git a/board/xaeniax/flash.c b/board/xaeniax/flash.c
index 6cb0aca..836c87e 100644
--- a/board/xaeniax/flash.c
+++ b/board/xaeniax/flash.c
@@ -220,7 +220,7 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info)
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
- int flag, prot, sect;
+ int prot, sect;
ulong type, start;
int rcode = 0;
@@ -255,7 +255,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
}
/* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
+ disable_interrupts();
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last; sect++) {
@@ -389,7 +389,6 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
{
FPWV *addr = (FPWV *) dest;
ulong status;
- int flag;
ulong start;
/* Check if Flash is (sufficiently) erased */
@@ -398,7 +397,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
return (2);
}
/* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
+ disable_interrupts();
*addr = (FPW) 0x00400040; /* write setup */
*addr = data;
generated by cgit v1.1 at 2024-12-17 11:21:43 +0000