diff options
Diffstat (limited to 'board')
346 files changed, 2734 insertions, 2766 deletions
diff --git a/board/BuS/EB+MCF-EV123/u-boot.lds b/board/BuS/EB+MCF-EV123/u-boot.lds index 3450793..0fa633a 100644 --- a/board/BuS/EB+MCF-EV123/u-boot.lds +++ b/board/BuS/EB+MCF-EV123/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) common/dlmalloc.o (.text) - lib_generic/string.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + lib/string.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) /* . = env_offset; */ common/env_embedded.o(.text) diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds index 3c44b3e..e26792c 100644 --- a/board/LEOX/elpt860/u-boot.lds +++ b/board/LEOX/elpt860/u-boot.lds @@ -64,17 +64,17 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_generic/string.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/extable.o (.text) - lib_ppc/time.o (.text) - lib_ppc/ticks.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + lib/string.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/extable.o (.text) + arch/ppc/lib/time.o (.text) + arch/ppc/lib/ticks.o (.text) . = env_offset; common/env_embedded.o (.text) diff --git a/board/LEOX/elpt860/u-boot.lds.debug b/board/LEOX/elpt860/u-boot.lds.debug index 5126083..707ff7a 100644 --- a/board/LEOX/elpt860/u-boot.lds.debug +++ b/board/LEOX/elpt860/u-boot.lds.debug @@ -64,10 +64,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o (.text) diff --git a/board/MAI/AmigaOneG3SE/u-boot.lds b/board/MAI/AmigaOneG3SE/u-boot.lds index 18510a8..1f55c65 100644 --- a/board/MAI/AmigaOneG3SE/u-boot.lds +++ b/board/MAI/AmigaOneG3SE/u-boot.lds @@ -59,7 +59,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ common/env_embedded.o(.text) diff --git a/board/Marvell/db64360/u-boot.lds b/board/Marvell/db64360/u-boot.lds index d021331..6dff003 100644 --- a/board/Marvell/db64360/u-boot.lds +++ b/board/Marvell/db64360/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/Marvell/db64460/u-boot.lds b/board/Marvell/db64460/u-boot.lds index d021331..6dff003 100644 --- a/board/Marvell/db64460/u-boot.lds +++ b/board/Marvell/db64460/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/RPXClassic/u-boot.lds b/board/RPXClassic/u-boot.lds index 47247ec..f7de95d 100644 --- a/board/RPXClassic/u-boot.lds +++ b/board/RPXClassic/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) /* XXX ? . = env_offset; */ diff --git a/board/RPXClassic/u-boot.lds.debug b/board/RPXClassic/u-boot.lds.debug index a2d940f..57cc305 100644 --- a/board/RPXClassic/u-boot.lds.debug +++ b/board/RPXClassic/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/RPXlite/u-boot.lds b/board/RPXlite/u-boot.lds index 47247ec..f7de95d 100644 --- a/board/RPXlite/u-boot.lds +++ b/board/RPXlite/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) /* XXX ? . = env_offset; */ diff --git a/board/RPXlite/u-boot.lds.debug b/board/RPXlite/u-boot.lds.debug index a2d940f..57cc305 100644 --- a/board/RPXlite/u-boot.lds.debug +++ b/board/RPXlite/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/RPXlite_dw/u-boot.lds b/board/RPXlite_dw/u-boot.lds index 7ae7be0..a2db9a6 100644 --- a/board/RPXlite_dw/u-boot.lds +++ b/board/RPXlite_dw/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) /* XXX ? . = env_offset; */ diff --git a/board/RPXlite_dw/u-boot.lds.debug b/board/RPXlite_dw/u-boot.lds.debug index 83fdc15..723f562 100644 --- a/board/RPXlite_dw/u-boot.lds.debug +++ b/board/RPXlite_dw/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds index f22b25f..b323768 100644 --- a/board/RRvision/u-boot.lds +++ b/board/RRvision/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = env_offset; common/env_embedded.o (.ppcenv) diff --git a/board/actux1/config.mk b/board/actux1/config.mk index 119140d..a0dbe0b 100644 --- a/board/actux1/config.mk +++ b/board/actux1/config.mk @@ -1,6 +1,6 @@ TEXT_BASE = 0x00e00000 # include NPE ethernet driver -BOARDLIBS = cpu/ixp/npe/libnpe.a +BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds index 836775f..5c1ece7 100644 --- a/board/actux1/u-boot.lds +++ b/board/actux1/u-boot.lds @@ -30,12 +30,12 @@ SECTIONS . = ALIGN (4); .text : { - cpu/ixp/start.o(.text) - lib_generic/string.o(.text) - lib_generic/vsprintf.o(.text) - lib_arm/board.o(.text) + arch/arm/cpu/ixp/start.o(.text) + lib/string.o(.text) + lib/vsprintf.o(.text) + arch/arm/lib/board.o(.text) common/dlmalloc.o(.text) - cpu/ixp/cpu.o(.text) + arch/arm/cpu/ixp/cpu.o(.text) . = env_offset; common/env_embedded.o(.ppcenv) * (.text) diff --git a/board/actux2/config.mk b/board/actux2/config.mk index 119140d..a0dbe0b 100644 --- a/board/actux2/config.mk +++ b/board/actux2/config.mk @@ -1,6 +1,6 @@ TEXT_BASE = 0x00e00000 # include NPE ethernet driver -BOARDLIBS = cpu/ixp/npe/libnpe.a +BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds index 0752656..707c027 100644 --- a/board/actux2/u-boot.lds +++ b/board/actux2/u-boot.lds @@ -30,12 +30,12 @@ SECTIONS . = ALIGN (4); .text : { - cpu/ixp/start.o(.text) - lib_generic/string.o(.text) - lib_generic/vsprintf.o(.text) - lib_arm/board.o(.text) + arch/arm/cpu/ixp/start.o(.text) + lib/string.o(.text) + lib/vsprintf.o(.text) + arch/arm/lib/board.o(.text) common/dlmalloc.o(.text) - cpu/ixp/cpu.o(.text) + arch/arm/cpu/ixp/cpu.o(.text) . = env_offset; common/env_embedded.o (.ppcenv) diff --git a/board/actux3/config.mk b/board/actux3/config.mk index 119140d..a0dbe0b 100644 --- a/board/actux3/config.mk +++ b/board/actux3/config.mk @@ -1,6 +1,6 @@ TEXT_BASE = 0x00e00000 # include NPE ethernet driver -BOARDLIBS = cpu/ixp/npe/libnpe.a +BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds index a69e7db..497ab97 100644 --- a/board/actux3/u-boot.lds +++ b/board/actux3/u-boot.lds @@ -30,12 +30,12 @@ SECTIONS . = ALIGN (4); .text : { - cpu/ixp/start.o (.text) - lib_generic/string.o (.text) - lib_generic/vsprintf.o (.text) - lib_arm/board.o (.text) + arch/arm/cpu/ixp/start.o (.text) + lib/string.o (.text) + lib/vsprintf.o (.text) + arch/arm/lib/board.o (.text) common/dlmalloc.o (.text) - cpu/ixp/cpu.o (.text) + arch/arm/cpu/ixp/cpu.o (.text) . = env_offset; common/env_embedded.o (.ppcenv) diff --git a/board/actux4/config.mk b/board/actux4/config.mk index 9a634cd..f2b5fc9 100644 --- a/board/actux4/config.mk +++ b/board/actux4/config.mk @@ -1,4 +1,4 @@ TEXT_BASE = 0x00e00000 # include NPE ethernet driver -BOARDLIBS = cpu/ixp/npe/libnpe.a +BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a diff --git a/board/adder/u-boot.lds b/board/adder/u-boot.lds index 397ee2f..018bcf1 100644 --- a/board/adder/u-boot.lds +++ b/board/adder/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/altera/common/AMDLV065D.c b/board/altera/common/AMDLV065D.c index 0fcf354..7a1b4d3 100644 --- a/board/altera/common/AMDLV065D.c +++ b/board/altera/common/AMDLV065D.c @@ -122,12 +122,12 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr2 = (unsigned char *) info->start[sect]; - writeb (addr, 0xaa); - writeb (addr, 0x55); - writeb (addr, 0x80); - writeb (addr, 0xaa); - writeb (addr, 0x55); - writeb (addr2, 0x30); + writeb (0xaa, addr); + writeb (0x55, addr); + writeb (0x80, addr); + writeb (0xaa, addr); + writeb (0x55, addr); + writeb (0x30, addr2); /* Now just wait for 0xff & provide some user * feedback while we wait. */ @@ -169,10 +169,10 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) return (2); } - writeb (cmd, 0xaa); - writeb (cmd, 0x55); - writeb (cmd, 0xa0); - writeb (dst, b); + writeb (0xaa, cmd); + writeb (0x55, cmd); + writeb (0xa0, cmd); + writeb (b, dst); /* Verify write */ start = get_timer (0); diff --git a/board/altera/common/epled.c b/board/altera/common/epled.c index e5e7705..d019735 100644 --- a/board/altera/common/epled.c +++ b/board/altera/common/epled.c @@ -39,7 +39,7 @@ void __led_init (led_id_t mask, int state) val &= ~mask; else val |= mask; - writel (&pio->data, val); + writel (val, &pio->data); } void __led_set (led_id_t mask, int state) @@ -50,7 +50,7 @@ void __led_set (led_id_t mask, int state) val &= ~mask; else val |= mask; - writel (&pio->data, val); + writel (val, &pio->data); } void __led_toggle (led_id_t mask) @@ -58,5 +58,5 @@ void __led_toggle (led_id_t mask) nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; val ^= mask; - writel (&pio->data, val); + writel (val, &pio->data); } diff --git a/board/altera/dk1c20/u-boot.lds b/board/altera/dk1c20/u-boot.lds index 98ee8f8..50c3fe7 100644 --- a/board/altera/dk1c20/u-boot.lds +++ b/board/altera/dk1c20/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios/start.o (.text) + arch/nios/cpu/start.o (.text) *(.text) } __text_end = .; diff --git a/board/altera/dk1s10/u-boot.lds b/board/altera/dk1s10/u-boot.lds index 98ee8f8..50c3fe7 100644 --- a/board/altera/dk1s10/u-boot.lds +++ b/board/altera/dk1s10/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios/start.o (.text) + arch/nios/cpu/start.o (.text) *(.text) } __text_end = .; diff --git a/board/altera/ep1c20/u-boot.lds b/board/altera/ep1c20/u-boot.lds index e2eb3aa..b909e94 100644 --- a/board/altera/ep1c20/u-boot.lds +++ b/board/altera/ep1c20/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios2/start.o (.text) + arch/nios/cpu2/start.o (.text) *(.text) *(.text.*) *(.gnu.linkonce.t*) diff --git a/board/altera/ep1s10/u-boot.lds b/board/altera/ep1s10/u-boot.lds index e2eb3aa..b909e94 100644 --- a/board/altera/ep1s10/u-boot.lds +++ b/board/altera/ep1s10/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios2/start.o (.text) + arch/nios/cpu2/start.o (.text) *(.text) *(.text.*) *(.gnu.linkonce.t*) diff --git a/board/altera/ep1s40/u-boot.lds b/board/altera/ep1s40/u-boot.lds index e2eb3aa..b909e94 100644 --- a/board/altera/ep1s40/u-boot.lds +++ b/board/altera/ep1s40/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios2/start.o (.text) + arch/nios/cpu2/start.o (.text) *(.text) *(.text.*) *(.gnu.linkonce.t*) diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds index 738caa0..bfca582 100644 --- a/board/amcc/acadia/u-boot-nand.lds +++ b/board/amcc/acadia/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/bamboo/init.S b/board/amcc/bamboo/init.S index a5c9d6d..7439c80 100644 --- a/board/amcc/bamboo/init.S +++ b/board/amcc/bamboo/init.S @@ -25,7 +25,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds index 738caa0..bfca582 100644 --- a/board/amcc/bamboo/u-boot-nand.lds +++ b/board/amcc/bamboo/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index 13a0dac..71a5701 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR; #define BOARD_ARCHES 4 /* - * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ #if defined(CONFIG_ARCHES) diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S index 0b66796..993bec3 100644 --- a/board/amcc/canyonlands/init.S +++ b/board/amcc/canyonlands/init.S @@ -23,7 +23,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds index 47c6bd9..b04b05e 100644 --- a/board/amcc/canyonlands/u-boot-nand.lds +++ b/board/amcc/canyonlands/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x20000); diff --git a/board/amcc/ebony/init.S b/board/amcc/ebony/init.S index 811a96a..153fa81 100644 --- a/board/amcc/ebony/init.S +++ b/board/amcc/ebony/init.S @@ -22,7 +22,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S index 1c74a82..90598f6 100644 --- a/board/amcc/katmai/init.S +++ b/board/amcc/katmai/init.S @@ -25,7 +25,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c index 54e2a39..15291f9 100644 --- a/board/amcc/katmai/katmai.c +++ b/board/amcc/katmai/katmai.c @@ -249,7 +249,7 @@ int checkboard (void) } /* - * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ u32 ddr_wrdtr(u32 default_val) { diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds index 738caa0..bfca582 100644 --- a/board/amcc/kilauea/u-boot-nand.lds +++ b/board/amcc/kilauea/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/luan/init.S b/board/amcc/luan/init.S index fb54dea..513b0fc 100644 --- a/board/amcc/luan/init.S +++ b/board/amcc/luan/init.S @@ -25,7 +25,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index 332d170..6542565 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -119,7 +119,7 @@ int checkboard(void) } /* - * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ u32 ddr_clktr(u32 default_val) { diff --git a/board/amcc/ocotea/init.S b/board/amcc/ocotea/init.S index 8bcfbb1..e7c75df 100644 --- a/board/amcc/ocotea/init.S +++ b/board/amcc/ocotea/init.S @@ -22,7 +22,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/redwood/init.S b/board/amcc/redwood/init.S index 363d793..4da5869 100644 --- a/board/amcc/redwood/init.S +++ b/board/amcc/redwood/init.S @@ -23,7 +23,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/redwood/redwood.c b/board/amcc/redwood/redwood.c index bc8cb0c..32fb8c5 100644 --- a/board/amcc/redwood/redwood.c +++ b/board/amcc/redwood/redwood.c @@ -29,7 +29,7 @@ #include <ppc4xx.h> #include <asm/processor.h> #include <i2c.h> -#include <asm-ppc/io.h> +#include <asm/io.h> int compare_to_true(char *str); char *remove_l_w_space(char *in_str); diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S index 3c0e400..f090070 100644 --- a/board/amcc/sequoia/init.S +++ b/board/amcc/sequoia/init.S @@ -22,7 +22,7 @@ */ #include <ppc_asm.tmpl> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> #include <config.h> /* diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index bde471c..b5c7d6d 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -40,7 +40,7 @@ extern int denali_wait_for_dlllock(void); extern void denali_core_search_data_eye(void); #if defined(CONFIG_NAND_SPL) -/* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big +/* Using arch/ppc/cpu/ppc4xx/speed.c to calculate the bus frequency is too big * for the 4k NAND boot image so define bus_frequency to 133MHz here * which is save for the refresh counter setup. */ diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds index fb629e0..8a71bfa 100644 --- a/board/amcc/sequoia/u-boot-nand.lds +++ b/board/amcc/sequoia/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds index e22dbec..c6a321e 100644 --- a/board/amcc/sequoia/u-boot-ram.lds +++ b/board/amcc/sequoia/u-boot-ram.lds @@ -50,7 +50,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) *(.text) *(.got1) diff --git a/board/amcc/yucca/init.S b/board/amcc/yucca/init.S index 9308fda..f51035f 100644 --- a/board/amcc/yucca/init.S +++ b/board/amcc/yucca/init.S @@ -25,7 +25,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c index 8c65cfb..241f484 100644 --- a/board/amcc/yucca/yucca.c +++ b/board/amcc/yucca/yucca.c @@ -555,7 +555,7 @@ int checkboard (void) } /* - * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ static int ppc440spe_rev_a(void) diff --git a/board/amirix/ap1000/u-boot.lds b/board/amirix/ap1000/u-boot.lds index 707203d..faeefe8 100644 --- a/board/amirix/ap1000/u-boot.lds +++ b/board/amirix/ap1000/u-boot.lds @@ -55,18 +55,18 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) board/amirix/ap1000/init.o (.text) - cpu/ppc4xx/kgdb.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) + arch/ppc/cpu/ppc4xx/kgdb.o (.text) + arch/ppc/cpu/ppc4xx/traps.o (.text) + arch/ppc/cpu/ppc4xx/interrupts.o (.text) + arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) + arch/ppc/cpu/ppc4xx/cpu_init.o (.text) + arch/ppc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) /* . = env_offset;*/ /* common/env_embedded.o(.text)*/ diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index 518944e..9bb56b5 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -132,9 +132,7 @@ int board_eth_init(bd_t *bis) #ifdef CONFIG_SMC91111 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); #endif -#ifdef CONFIG_PCI rc += pci_eth_init(bis); -#endif return rc; } #endif diff --git a/board/xilinx/ml300/Makefile b/board/astro/mcf5373l/Makefile index b8a2d64..c7a1d05 100644 --- a/board/xilinx/ml300/Makefile +++ b/board/astro/mcf5373l/Makefile @@ -22,43 +22,17 @@ # include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -$(shell mkdir -p $(obj)../xilinx_enet) -$(shell mkdir -p $(obj)../xilinx_iic) -endif - -INCS := -I../common -I../xilinx_enet -I../xilinx_iic -CFLAGS += $(INCS) -HOSTCFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o \ - serial.o \ - ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ - ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ - ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ - ../xilinx_enet/xemac_intr_dma.o ../xilinx_iic/iic_adapter.o \ - ../xilinx_iic/xiic_l.o ../common/xipif_v1_23_b.o \ - ../common/xbasic_types.o ../common/xdma_channel.o \ - ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ - ../common/xversion.o \ - -SOBJS = init.o +COBJS = $(BOARD).o fpga.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $^ - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### diff --git a/board/astro/mcf5373l/astro.h b/board/astro/mcf5373l/astro.h new file mode 100644 index 0000000..b55a6f7 --- /dev/null +++ b/board/astro/mcf5373l/astro.h @@ -0,0 +1,44 @@ +#ifndef __ASTRO_H__ +#define __ASTRO_H__ + +/* in mcf5373l.c */ +int rs_serial_init(int port, int baud); +void astro_put_char(char ch); +int astro_is_char(void); +int astro_get_char(void); + +/* in fpga.c */ +int astro5373l_altera_load(void); +int astro5373l_xilinx_load(void); + +/* data structures used for communication (update.c) */ +typedef struct card_id { + char card_type; + char hardware_version; + char software_version; + char software_subversion; /* " ","a".."z" */ + char fpga_version_altera; + char fpga_version_xilinx; +} card_id_t; + +typedef struct { + unsigned char mode; + unsigned char deviation; + unsigned short freq; +} __attribute__ ((packed)) output_params_t; + +typedef struct { + unsigned short satfreq; + unsigned char satdatallg; + unsigned short symbolrate; + unsigned char viterbirate; + unsigned char symbolrate_l; + output_params_t output_params; + unsigned char reserve; + unsigned char card_error; + unsigned short dummy_ts_id; + unsigned char dummy_pat_ver; + unsigned char dummy_sdt_ver; +} __attribute__ ((packed)) parameters_t; + +#endif /* __ASTRO_H__ */ diff --git a/board/xilinx/ml300/config.mk b/board/astro/mcf5373l/config.mk index 208a25ba..6316a30 100644 --- a/board/xilinx/ml300/config.mk +++ b/board/astro/mcf5373l/config.mk @@ -1,6 +1,7 @@ # -# (C) Copyright 2000 +# (C) Copyright 2000-2003 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com> # # See file CREDITS for list of people who contributed to this # project. @@ -21,12 +22,6 @@ # MA 02111-1307 USA # -# -# esd ADCIOP boards -# - -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0x04000000 +TEXT_BASE = $(CONFIG_TEXT_BASE) -# Use board specific linker script -LDSCRIPT := $(SRCTREE)/board/xilinx/ml300/u-boot.lds +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c new file mode 100644 index 0000000..467461b --- /dev/null +++ b/board/astro/mcf5373l/fpga.c @@ -0,0 +1,425 @@ +/* + * (C) Copyright 2006 + * Wolfgang Wegner, ASTRO Strobel Kommunikationssysteme GmbH, + * w.wegner@astro-kom.de + * + * based on the files by + * Heiko Schocher, DENX Software Engineering, hs@denx.de + * and + * Rich Ireland, Enterasys Networks, rireland@enterasys.com. + * Keith Outwater, keith_outwater@mvis.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +/* Altera/Xilinx FPGA configuration support for the ASTRO "URMEL" board */ + +#include <common.h> +#include <watchdog.h> +#include <altera.h> +#include <ACEX1K.h> +#include <spartan3.h> +#include <command.h> +#include <asm/immap_5329.h> +#include <asm/io.h> +#include "fpga.h" + +DECLARE_GLOBAL_DATA_PTR; + +int altera_pre_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + unsigned char tmp_char; + unsigned short tmp_short; + + /* first, set the required pins to GPIO function */ + /* PAR_T0IN -> GPIO */ + tmp_char = readb(&gpiop->par_timer); + tmp_char &= 0xfc; + writeb(tmp_char, &gpiop->par_timer); + /* all QSPI pins -> GPIO */ + writew(0x0000, &gpiop->par_qspi); + /* U0RTS, U0CTS -> GPIO */ + tmp_short = __raw_readw(&gpiop->par_uart); + tmp_short &= 0xfff3; + __raw_writew(tmp_short, &gpiop->par_uart); + /* all PWM pins -> GPIO */ + writeb(0x00, &gpiop->par_pwm); + /* next, set data direction registers */ + writeb(0x01, &gpiop->pddr_timer); + writeb(0x25, &gpiop->pddr_qspi); + writeb(0x0c, &gpiop->pddr_uart); + writeb(0x04, &gpiop->pddr_pwm); + + /* ensure other SPI peripherals are deselected */ + writeb(0x08, &gpiop->ppd_uart); + writeb(0x38, &gpiop->ppd_qspi); + + /* CONFIG = 0 STATUS = 0 -> FPGA in reset state */ + writeb(0xFB, &gpiop->pclrr_uart); + /* enable Altera configuration by clearing QSPI_CS2 and DT0IN */ + writeb(0xFE, &gpiop->pclrr_timer); + writeb(0xDF, &gpiop->pclrr_qspi); + return FPGA_SUCCESS; +} + +/* Set the state of CONFIG Pin */ +int altera_config_fn(int assert_config, int flush, int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + if (assert_config) + writeb(0x04, &gpiop->ppd_uart); + else + writeb(0xFB, &gpiop->pclrr_uart); + return FPGA_SUCCESS; +} + +/* Returns the state of STATUS Pin */ +int altera_status_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + if (readb(&gpiop->ppd_pwm) & 0x08) + return FPGA_FAIL; + return FPGA_SUCCESS; +} + +/* Returns the state of CONF_DONE Pin */ +int altera_done_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + if (readb(&gpiop->ppd_pwm) & 0x20) + return FPGA_FAIL; + return FPGA_SUCCESS; +} + +/* + * writes the complete buffer to the FPGA + * writing the complete buffer in one function is much faster, + * then calling it for every bit + */ +int altera_write_fn(void *buf, size_t len, int flush, int cookie) +{ + size_t bytecount = 0; + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + unsigned char *data = (unsigned char *)buf; + unsigned char val = 0; + int i; + int len_40 = len / 40; + + while (bytecount < len) { + val = data[bytecount++]; + i = 8; + do { + writeb(0xFB, &gpiop->pclrr_qspi); + if (val & 0x01) + writeb(0x01, &gpiop->ppd_qspi); + else + writeb(0xFE, &gpiop->pclrr_qspi); + writeb(0x04, &gpiop->ppd_qspi); + val >>= 1; + i--; + } while (i > 0); + + if (bytecount % len_40 == 0) { +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + WATCHDOG_RESET(); +#endif +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK + putc('.'); /* let them know we are alive */ +#endif +#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC + if (ctrlc()) + return FPGA_FAIL; +#endif + } + } + return FPGA_SUCCESS; +} + +/* called, when programming is aborted */ +int altera_abort_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + writeb(0x20, &gpiop->ppd_qspi); + writeb(0x08, &gpiop->ppd_uart); + return FPGA_SUCCESS; +} + +/* called, when programming was succesful */ +int altera_post_fn(int cookie) +{ + return altera_abort_fn(cookie); +} + +/* + * Note that these are pointers to code that is in Flash. They will be + * relocated at runtime. + * FIXME: relocation not yet working for coldfire, see below! + */ +Altera_CYC2_Passive_Serial_fns altera_fns = { + altera_pre_fn, + altera_config_fn, + altera_status_fn, + altera_done_fn, + altera_write_fn, + altera_abort_fn, + altera_post_fn +}; + +Altera_desc altera_fpga[CONFIG_FPGA_COUNT] = { + {Altera_CYC2, + passive_serial, + 85903, + (void *)&altera_fns, + NULL, + 0} +}; + +/* Initialize the fpga. Return 1 on success, 0 on failure. */ +int astro5373l_altera_load(void) +{ + int i; + + for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + /* + * I did not yet manage to get relocation work properly, + * so set stuff here instead of static initialisation: + */ + altera_fns.pre = altera_pre_fn; + altera_fns.config = altera_config_fn; + altera_fns.status = altera_status_fn; + altera_fns.done = altera_done_fn; + altera_fns.write = altera_write_fn; + altera_fns.abort = altera_abort_fn; + altera_fns.post = altera_post_fn; + altera_fpga[i].iface_fns = (void *)&altera_fns; + fpga_add(fpga_altera, &altera_fpga[i]); + } + return 1; +} + +/* Set the FPGA's PROG_B line to the specified level */ +int xilinx_pgm_fn(int assert, int flush, int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + if (assert) + writeb(0xFB, &gpiop->pclrr_uart); + else + writeb(0x04, &gpiop->ppd_uart); + return assert; +} + +/* + * Test the state of the active-low FPGA INIT line. Return 1 on INIT + * asserted (low). + */ +int xilinx_init_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + return (readb(&gpiop->ppd_pwm) & 0x08) == 0; +} + +/* Test the state of the active-high FPGA DONE pin */ +int xilinx_done_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + return (readb(&gpiop->ppd_pwm) & 0x20) >> 5; +} + +/* Abort an FPGA operation */ +int xilinx_abort_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + /* ensure all SPI peripherals and FPGAs are deselected */ + writeb(0x08, &gpiop->ppd_uart); + writeb(0x01, &gpiop->ppd_timer); + writeb(0x38, &gpiop->ppd_qspi); + return FPGA_FAIL; +} + +/* + * FPGA pre-configuration function. Just make sure that + * FPGA reset is asserted to keep the FPGA from starting up after + * configuration. + */ +int xilinx_pre_config_fn(int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + unsigned char tmp_char; + unsigned short tmp_short; + + /* first, set the required pins to GPIO function */ + /* PAR_T0IN -> GPIO */ + tmp_char = readb(&gpiop->par_timer); + tmp_char &= 0xfc; + writeb(tmp_char, &gpiop->par_timer); + /* all QSPI pins -> GPIO */ + writew(0x0000, &gpiop->par_qspi); + /* U0RTS, U0CTS -> GPIO */ + tmp_short = __raw_readw(&gpiop->par_uart); + tmp_short &= 0xfff3; + __raw_writew(tmp_short, &gpiop->par_uart); + /* all PWM pins -> GPIO */ + writeb(0x00, &gpiop->par_pwm); + /* next, set data direction registers */ + writeb(0x01, &gpiop->pddr_timer); + writeb(0x25, &gpiop->pddr_qspi); + writeb(0x0c, &gpiop->pddr_uart); + writeb(0x04, &gpiop->pddr_pwm); + + /* ensure other SPI peripherals are deselected */ + writeb(0x08, &gpiop->ppd_uart); + writeb(0x38, &gpiop->ppd_qspi); + writeb(0x01, &gpiop->ppd_timer); + + /* CONFIG = 0, STATUS = 0 -> FPGA in reset state */ + writeb(0xFB, &gpiop->pclrr_uart); + /* enable Xilinx configuration by clearing QSPI_CS2 and U0CTS */ + writeb(0xF7, &gpiop->pclrr_uart); + writeb(0xDF, &gpiop->pclrr_qspi); + return 0; +} + +/* + * FPGA post configuration function. Should perform a test if FPGA is running. + */ +int xilinx_post_config_fn(int cookie) +{ + int rc = 0; + + /* + * no test yet + */ + return rc; +} + +int xilinx_clk_fn(int assert_clk, int flush, int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + if (assert_clk) + writeb(0x04, &gpiop->ppd_qspi); + else + writeb(0xFB, &gpiop->pclrr_qspi); + return assert_clk; +} + +int xilinx_wr_fn(int assert_write, int flush, int cookie) +{ + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + + if (assert_write) + writeb(0x01, &gpiop->ppd_qspi); + else + writeb(0xFE, &gpiop->pclrr_qspi); + return assert_write; +} + +int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie) +{ + size_t bytecount = 0; + gpio_t *gpiop = (gpio_t *)MMAP_GPIO; + unsigned char *data = (unsigned char *)buf; + unsigned char val = 0; + int i; + int len_40 = len / 40; + + for (bytecount = 0; bytecount < len; bytecount++) { + val = *(data++); + for (i = 8; i > 0; i--) { + writeb(0xFB, &gpiop->pclrr_qspi); + if (val & 0x80) + writeb(0x01, &gpiop->ppd_qspi); + else + writeb(0xFE, &gpiop->pclrr_qspi); + writeb(0x04, &gpiop->ppd_qspi); + val <<= 1; + } + if (bytecount % len_40 == 0) { +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + WATCHDOG_RESET(); +#endif +#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK + putc('.'); /* let them know we are alive */ +#endif +#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC + if (ctrlc()) + return FPGA_FAIL; +#endif + } + } + return FPGA_SUCCESS; +} + +/* + * Note that these are pointers to code that is in Flash. They will be + * relocated at runtime. + * FIXME: relocation not yet working for coldfire, see below! + */ +Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = { + xilinx_pre_config_fn, + xilinx_pgm_fn, + xilinx_clk_fn, + xilinx_init_fn, + xilinx_done_fn, + xilinx_wr_fn, + 0, + xilinx_fastwr_fn +}; + +Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { + {Xilinx_Spartan3, + slave_serial, + XILINX_XC3S4000_SIZE, + (void *)&xilinx_fns, + 0} +}; + +/* Initialize the fpga. Return 1 on success, 0 on failure. */ +int astro5373l_xilinx_load(void) +{ + int i; + + fpga_init(); + + for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + /* + * I did not yet manage to get relocation work properly, + * so set stuff here instead of static initialisation: + */ + xilinx_fns.pre = xilinx_pre_config_fn; + xilinx_fns.pgm = xilinx_pgm_fn; + xilinx_fns.clk = xilinx_clk_fn; + xilinx_fns.init = xilinx_init_fn; + xilinx_fns.done = xilinx_done_fn; + xilinx_fns.wr = xilinx_wr_fn; + xilinx_fns.bwr = xilinx_fastwr_fn; + xilinx_fpga[i].iface_fns = (void *)&xilinx_fns; + fpga_add(fpga_xilinx, &xilinx_fpga[i]); + } + return 1; +} diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c new file mode 100644 index 0000000..3c09a21 --- /dev/null +++ b/board/astro/mcf5373l/mcf5373l.c @@ -0,0 +1,211 @@ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * modified by Wolfgang Wegner <w.wegner@astro-kom.de> for ASTRO 5373l + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <watchdog.h> +#include <command.h> +#include <asm/m5329.h> +#include <asm/immap_5329.h> +#include <asm/io.h> + +/* needed for astro bus: */ +#include <asm/uart.h> +#include "astro.h" + +DECLARE_GLOBAL_DATA_PTR; +extern void uart_port_conf(void); + +int checkboard(void) +{ + puts("Board: "); + puts("ASTRO MCF5373L (Urmel) Board\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ +#if !defined(CONFIG_MONITOR_IS_IN_RAM) + sdram_t *sdp = (sdram_t *)(MMAP_SDRAM); + + /* + * GPIO configuration for bus should be set correctly from reset, + * so we do not care! First, set up address space: at this point, + * we should be running from internal SRAM; + * so use CONFIG_SYS_SDRAM_BASE as the base address for SDRAM, + * and do not care where it is + */ + __raw_writel((CONFIG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000018, + &sdp->cs0); + __raw_writel((CONFIG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000000, + &sdp->cs1); + /* + * I am not sure from the data sheet, but it seems burst length + * has to be 8 for the 16 bit data bus we use; + * so these values are for BL = 8 + */ + __raw_writel(0x33211530, &sdp->cfg1); + __raw_writel(0x56570000, &sdp->cfg2); + /* send PrechargeALL, REF and IREF remain cleared! */ + __raw_writel(0xE1462C02, &sdp->ctrl); + udelay(1); + /* refresh SDRAM twice */ + __raw_writel(0xE1462C04, &sdp->ctrl); + udelay(1); + __raw_writel(0xE1462C04, &sdp->ctrl); + /* init MR */ + __raw_writel(0x008D0000, &sdp->mode); + /* initialize EMR */ + __raw_writel(0x80010000, &sdp->mode); + /* wait until DLL is locked */ + udelay(1); + /* + * enable automatic refresh, lock mode register, + * clear iref and ipall + */ + __raw_writel(0x71462C00, &sdp->ctrl); + /* Dummy write to start SDRAM */ + writel(0, CONFIG_SYS_SDRAM_BASE); +#endif + + /* + * for get_ram_size() to work, both CS areas have to be + * configured, i.e. CS1 has to be explicitely disabled, else + * probing for memory will cause the SDRAM bus to hang! + * (Do not rely on the SDCS register(s) being set to 0x00000000 + * during reset as stated in the data sheet.) + */ + return get_ram_size((unsigned long *)CONFIG_SYS_SDRAM_BASE, + 0x80000000 - CONFIG_SYS_SDRAM_BASE); +} + +#define UART_BASE MMAP_UART0 +int rs_serial_init(int port, int baud) +{ + uart_t *uart; + u32 counter; + + switch (port) { + case 0: + uart = (uart_t *)(MMAP_UART0); + break; + case 1: + uart = (uart_t *)(MMAP_UART1); + break; + case 2: + uart = (uart_t *)(MMAP_UART2); + break; + default: + uart = (uart_t *)(MMAP_UART0); + } + + uart_port_conf(); + + /* write to SICR: SIM2 = uart mode,dcd does not affect rx */ + writeb(UART_UCR_RESET_RX, &uart->ucr); + writeb(UART_UCR_RESET_TX, &uart->ucr); + writeb(UART_UCR_RESET_ERROR, &uart->ucr); + writeb(UART_UCR_RESET_MR, &uart->ucr); + __asm__ ("nop"); + + writeb(0, &uart->uimr); + + /* write to CSR: RX/TX baud rate from timers */ + writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr); + + writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr); + writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); + + /* Setting up BaudRate */ + counter = (u32) (gd->bus_clk / (baud)); + counter >>= 5; + + /* write to CTUR: divide counter upper byte */ + writeb((u8) ((counter & 0xff00) >> 8), &uart->ubg1); + /* write to CTLR: divide counter lower byte */ + writeb((u8) (counter & 0x00ff), &uart->ubg2); + + writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); + + return 0; +} + +void astro_put_char(char ch) +{ + uart_t *uart; + unsigned long timer; + + uart = (uart_t *)(MMAP_UART0); + /* + * Wait for last character to go. Timeout of 6ms should + * be enough for our lowest baud rate of 2400. + */ + timer = get_timer(0); + while (get_timer(timer) < 6) { + if (readb(&uart->usr) & UART_USR_TXRDY) + break; + } + writeb(ch, &uart->utb); + + return; +} + +int astro_is_char(void) +{ + uart_t *uart; + + uart = (uart_t *)(MMAP_UART0); + return readb(&uart->usr) & UART_USR_RXRDY; +} + +int astro_get_char(void) +{ + uart_t *uart; + + uart = (uart_t *)(MMAP_UART0); + while (!(readb(&uart->usr) & UART_USR_RXRDY)) ; + return readb(&uart->urb); +} + +int misc_init_r(void) +{ + int retval = 0; + + puts("Configure Xilinx FPGA..."); + retval = astro5373l_xilinx_load(); + if (!retval) { + puts("failed!\n"); + return retval; + } + puts("done\n"); + + puts("Configure Altera FPGA..."); + retval = astro5373l_altera_load(); + if (!retval) { + puts("failed!\n"); + return retval; + } + puts("done\n"); + + return retval; +} diff --git a/board/xilinx/ml300/u-boot.lds.debug b/board/astro/mcf5373l/u-boot.lds index 970628d..167a0a3 100644 --- a/board/xilinx/ml300/u-boot.lds.debug +++ b/board/astro/mcf5373l/u-boot.lds @@ -21,7 +21,7 @@ * MA 02111-1307 USA */ -OUTPUT_ARCH(powerpc) +OUTPUT_ARCH(m68k) /* Do we need any of these for elf? __DYNAMIC = 0; */ SECTIONS @@ -55,37 +55,39 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - mpc8xx/start.o (.text) - common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + arch/m68k/cpu/mcf532x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) + common/dlmalloc.o (.text) + lib/zlib.o (.text) - common/env_embedded.o(.text) + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.text) *(.text) +/* *(.fixup)*/ *(.got1) } _etext = .; PROVIDE (etext = .); .rodata : { - *(.rodata) - *(.rodata1) - *(.rodata.str1.4) - *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } .fini : { *(.fini) } =0 .ctors : { *(.ctors) } .dtors : { *(.dtors) } /* Read-write section, merged into data segment: */ - . = (. + 0x0FFF) & 0xFFFFF000; + . = (. + 0x00FF) & 0xFFFFFF00; _erotext = .; PROVIDE (erotext = .); + .reloc : { + __got_start = .; *(.got) + __got_end = .; _GOT2_TABLE_ = .; *(.got2) _FIXUP_TABLE_ = .; @@ -106,29 +108,34 @@ SECTIONS _edata = .; PROVIDE (edata = .); + . = .; __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; + . = .; __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; - . = ALIGN(4096); + . = ALIGN(256); __init_begin = .; .text.init : { *(.text.init) } .data.init : { *(.data.init) } - . = ALIGN(4096); + . = ALIGN(256); __init_end = .; __bss_start = .; .bss : { + _sbss = .; *(.sbss) *(.scommon) *(.dynbss) *(.bss) *(COMMON) + . = ALIGN(4); + _ebss = .; } _end = . ; PROVIDE (end = .); diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c index 6fb0096..3117b5f 100644 --- a/board/bc3450/bc3450.c +++ b/board/bc3450/bc3450.c @@ -104,7 +104,6 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -#if defined(CONFIG_MPC5200) phys_size_t initdram (int board_type) { ulong dramsize = 0; @@ -204,57 +203,6 @@ phys_size_t initdram (int board_type) return dramsize; } -#elif defined(CONFIG_MGT5100) - -phys_size_t initdram (int board_type) -{ - ulong dramsize = 0; -#ifndef CONFIG_SYS_RAMBOOT - ulong test1, test2; - - /* setup and enable SDRAM chip selects */ - *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; - *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff; /* 2G */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ - __asm__ volatile ("sync"); - - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; - - /* address select register */ - *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL; - __asm__ volatile ("sync"); - - /* find RAM size */ - sdram_start(0); - test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - sdram_start(1); - test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - if (test1 > test2) { - sdram_start(0); - dramsize = test1; - } else { - dramsize = test2; - } - - /* set SDRAM end address according to size */ - *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); - -#else /* CONFIG_SYS_RAMBOOT */ - - /* Retrieve amount of SDRAM available */ - dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); - -#endif /* CONFIG_SYS_RAMBOOT */ - - return dramsize; -} - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif - int checkboard (void) { #if defined (CONFIG_TQM5200) @@ -276,10 +224,6 @@ void flash_preinit(void) * Note that CS_BOOT cannot be cleared when * executing in flash. */ -#if defined(CONFIG_MGT5100) - *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */ -#endif *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ } diff --git a/board/bc3450/mt48lc16m16a2-75.h b/board/bc3450/mt48lc16m16a2-75.h index 3f1e169..48b4321 100644 --- a/board/bc3450/mt48lc16m16a2-75.h +++ b/board/bc3450/mt48lc16m16a2-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 /* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */ @@ -33,15 +32,3 @@ /*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */ #define SDRAM_CONFIG2 0x8AD70000 /*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */ - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/bf518f-ezbrd/config.mk b/board/bf518f-ezbrd/config.mk index f85bef5..3f9d41f 100644 --- a/board/bf518f-ezbrd/config.mk +++ b/board/bf518f-ezbrd/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk index f85bef5..3f9d41f 100644 --- a/board/bf526-ezbrd/config.mk +++ b/board/bf526-ezbrd/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf527-ezkit/config.mk b/board/bf527-ezkit/config.mk index f85bef5..3f9d41f 100644 --- a/board/bf527-ezkit/config.mk +++ b/board/bf527-ezkit/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf533-ezkit/config.mk b/board/bf533-ezkit/config.mk index 3c0b46f..bc046f1 100644 --- a/board/bf533-ezkit/config.mk +++ b/board/bf533-ezkit/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/bf533-stamp/config.mk b/board/bf533-stamp/config.mk index 3c0b46f..bc046f1 100644 --- a/board/bf533-stamp/config.mk +++ b/board/bf533-stamp/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/bf537-stamp/cmd_bf537led.c b/board/bf537-stamp/cmd_bf537led.c index e65c4f8..317f088 100644 --- a/board/bf537-stamp/cmd_bf537led.c +++ b/board/bf537-stamp/cmd_bf537led.c @@ -25,7 +25,7 @@ #include <config.h> #include <command.h> #include <asm/blackfin.h> -#include <asm-blackfin/string.h> +#include <asm/string.h> #ifdef CONFIG_BF537_STAMP_LEDCMD /* Define the command usage in a reusable way */ diff --git a/board/bf537-stamp/config.mk b/board/bf537-stamp/config.mk index bc14257..5766829 100644 --- a/board/bf537-stamp/config.mk +++ b/board/bf537-stamp/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/bf538f-ezkit/config.mk b/board/bf538f-ezkit/config.mk index 3c0b46f..bc046f1 100644 --- a/board/bf538f-ezkit/config.mk +++ b/board/bf538f-ezkit/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/bf548-ezkit/config.mk b/board/bf548-ezkit/config.mk index 42ff946..ce96c0d 100644 --- a/board/bf548-ezkit/config.mk +++ b/board/bf548-ezkit/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --dma 6 diff --git a/board/bf561-acvilon/config.mk b/board/bf561-acvilon/config.mk index cfad21a..a90b193 100644 --- a/board/bf561-acvilon/config.mk +++ b/board/bf561-acvilon/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 diff --git a/board/bf561-ezkit/config.mk b/board/bf561-ezkit/config.mk index cfad21a..a90b193 100644 --- a/board/bf561-ezkit/config.mk +++ b/board/bf561-ezkit/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 diff --git a/board/c2mon/u-boot.lds b/board/c2mon/u-boot.lds index 2d0efb3..5bd5a75 100644 --- a/board/c2mon/u-boot.lds +++ b/board/c2mon/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/c2mon/u-boot.lds.debug b/board/c2mon/u-boot.lds.debug index ad36953..e62f6be 100644 --- a/board/c2mon/u-boot.lds.debug +++ b/board/c2mon/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c index dce07bf..6ddc858 100644 --- a/board/canmb/canmb.c +++ b/board/canmb/canmb.c @@ -81,7 +81,6 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -#if defined(CONFIG_MPC5200) phys_size_t initdram (int board_type) { ulong dramsize = 0; @@ -183,57 +182,6 @@ phys_size_t initdram (int board_type) return dramsize + dramsize2; } -#elif defined(CONFIG_MGT5100) - -phys_size_t initdram (int board_type) -{ - ulong dramsize = 0; -#ifndef CONFIG_SYS_RAMBOOT - ulong test1, test2; - - /* setup and enable SDRAM chip selects */ - *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; - *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ - __asm__ volatile ("sync"); - - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; - - /* address select register */ - *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL; - __asm__ volatile ("sync"); - - /* find RAM size */ - sdram_start(0); - test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - sdram_start(1); - test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - if (test1 > test2) { - sdram_start(0); - dramsize = test1; - } else { - dramsize = test2; - } - - /* set SDRAM end address according to size */ - *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); - -#else /* CONFIG_SYS_RAMBOOT */ - - /* Retrieve amount of SDRAM available */ - dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); - -#endif /* CONFIG_SYS_RAMBOOT */ - - return dramsize; -} - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif - int checkboard (void) { puts ("Board: CANMB\n"); diff --git a/board/canmb/mt48lc16m32s2-75.h b/board/canmb/mt48lc16m32s2-75.h index ffdf039..1547725 100644 --- a/board/canmb/mt48lc16m32s2-75.h +++ b/board/canmb/mt48lc16m32s2-75.h @@ -23,21 +23,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/cm-bf527/config.mk b/board/cm-bf527/config.mk index f85bef5..3f9d41f 100644 --- a/board/cm-bf527/config.mk +++ b/board/cm-bf527/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/cm-bf533/config.mk b/board/cm-bf533/config.mk index 3c0b46f..bc046f1 100644 --- a/board/cm-bf533/config.mk +++ b/board/cm-bf533/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/cm-bf537e/config.mk b/board/cm-bf537e/config.mk index 3c0b46f..bc046f1 100644 --- a/board/cm-bf537e/config.mk +++ b/board/cm-bf537e/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/cm-bf537u/config.mk b/board/cm-bf537u/config.mk index 3c0b46f..bc046f1 100644 --- a/board/cm-bf537u/config.mk +++ b/board/cm-bf537u/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/cm-bf548/config.mk b/board/cm-bf548/config.mk index 0c95b39..f071a39 100644 --- a/board/cm-bf548/config.mk +++ b/board/cm-bf548/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --dma 6 diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c index 80cfff7..5741f64 100644 --- a/board/cm-bf561/cm-bf561.c +++ b/board/cm-bf561/cm-bf561.c @@ -18,9 +18,9 @@ int checkboard(void) return 0; } -#ifdef CONFIG_SMC91111 +#ifdef CONFIG_SMC911X int board_eth_init(bd_t *bis) { - return smc91111_initialize(0, CONFIG_SMC91111_BASE); + return smc911x_initialize(0, CONFIG_SMC911X_BASE); } #endif diff --git a/board/cm-bf561/config.mk b/board/cm-bf561/config.mk index cfad21a..a90b193 100644 --- a/board/cm-bf561/config.mk +++ b/board/cm-bf561/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 diff --git a/board/cm5200/u-boot.lds b/board/cm5200/u-boot.lds index 5887f77..30a37d9 100644 --- a/board/cm5200/u-boot.lds +++ b/board/cm5200/u-boot.lds @@ -50,7 +50,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc5xxx/start.o (.text) + arch/ppc/cpu/mpc5xxx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/cobra5272/u-boot.lds b/board/cobra5272/u-boot.lds index 7e716bb..ec0f5e9 100644 --- a/board/cobra5272/u-boot.lds +++ b/board/cobra5272/u-boot.lds @@ -54,12 +54,12 @@ SECTIONS { /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - cpu/mcf52x2/cpu_init.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/cpu_init.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/cogent/u-boot.lds.debug b/board/cogent/u-boot.lds.debug index a2d940f..57cc305 100644 --- a/board/cogent/u-boot.lds.debug +++ b/board/cogent/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/cray/L1/u-boot.lds.debug b/board/cray/L1/u-boot.lds.debug index 970628d..09c0191 100644 --- a/board/cray/L1/u-boot.lds.debug +++ b/board/cray/L1/u-boot.lds.debug @@ -57,9 +57,9 @@ SECTIONS mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c index d6d65cf..5a00afe 100644 --- a/board/csb272/csb272.c +++ b/board/csb272/csb272.c @@ -129,7 +129,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in cpu/ppc4xx + * in arch/ppc/cpu/ppc4xx */ sdram_init(); diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c index 20d34ad..996a67b 100644 --- a/board/csb472/csb472.c +++ b/board/csb472/csb472.c @@ -97,7 +97,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in cpu/ppc4xx + * in arch/ppc/cpu/ppc4xx */ sdram_init(); diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c index ed668af..6385443 100644 --- a/board/davinci/da830evm/da830evm.c +++ b/board/davinci/da830evm/da830evm.c @@ -150,7 +150,7 @@ int board_init(void) DAVINCI_ABCR_RHOLD(0) | DAVINCI_ABCR_TA(2) | DAVINCI_ABCR_ASIZE_8BIT), - &davinci_emif_regs->AB2CR); + &davinci_emif_regs->ab2cr); #endif /* arch number of the board */ diff --git a/board/davinci/dvevm/board_init.S b/board/davinci/dvevm/board_init.S index 22d8adc..81b23d0 100644 --- a/board/davinci/dvevm/board_init.S +++ b/board/davinci/dvevm/board_init.S @@ -2,7 +2,7 @@ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> * * Board-specific low level initialization code. Called at the very end - * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no * initialization required. * * This program is free software; you can redistribute it and/or diff --git a/board/davinci/schmoogie/board_init.S b/board/davinci/schmoogie/board_init.S index 22d8adc..81b23d0 100644 --- a/board/davinci/schmoogie/board_init.S +++ b/board/davinci/schmoogie/board_init.S @@ -2,7 +2,7 @@ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> * * Board-specific low level initialization code. Called at the very end - * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no * initialization required. * * This program is free software; you can redistribute it and/or diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S index 22d8adc..81b23d0 100644 --- a/board/davinci/sffsdr/board_init.S +++ b/board/davinci/sffsdr/board_init.S @@ -2,7 +2,7 @@ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> * * Board-specific low level initialization code. Called at the very end - * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no * initialization required. * * This program is free software; you can redistribute it and/or diff --git a/board/davinci/sonata/board_init.S b/board/davinci/sonata/board_init.S index fbb9ea7..3e4c7a2 100644 --- a/board/davinci/sonata/board_init.S +++ b/board/davinci/sonata/board_init.S @@ -2,7 +2,7 @@ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> * * Board-specific low level initialization code. Called at the very end - * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no * initialization required. * * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c index 42756f5..b3c6d51 100644 --- a/board/dbau1x00/dbau1x00.c +++ b/board/dbau1x00/dbau1x00.c @@ -37,7 +37,7 @@ phys_size_t initdram(int board_type) #define BCSR_PCMCIA_PC0DRVEN 0x0010 #define BCSR_PCMCIA_PC0RST 0x0080 -/* In cpu/mips/cpu.c */ +/* In arch/mips/cpu/cpu.c */ void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ); int checkboard (void) diff --git a/board/eNET/config.mk b/board/eNET/config.mk index 5c64804..dcde7fc 100644 --- a/board/eNET/config.mk +++ b/board/eNET/config.mk @@ -22,7 +22,7 @@ # TEXT_BASE = 0x38040000 -CFLAGS_dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing +CFLAGS_common/dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing PLATFORM_RELFLAGS += -fvisibility=hidden PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm PLATFORM_LDFLAGS += -pic --emit-relocs -Bsymbolic -Bsymbolic-functions diff --git a/board/edb93xx/config.mk b/board/edb93xx/config.mk index b2fc6fa..b627869 100644 --- a/board/edb93xx/config.mk +++ b/board/edb93xx/config.mk @@ -1,4 +1,4 @@ -LDSCRIPT := $(SRCTREE)/cpu/arm920t/ep93xx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/arm/cpu/arm920t/ep93xx/u-boot.lds ifdef CONFIG_EDB9301 TEXT_BASE = 0x05700000 diff --git a/board/eltec/bab7xx/u-boot.lds b/board/eltec/bab7xx/u-boot.lds index d021331..6dff003 100644 --- a/board/eltec/bab7xx/u-boot.lds +++ b/board/eltec/bab7xx/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/eltec/elppc/u-boot.lds b/board/eltec/elppc/u-boot.lds index d021331..6dff003 100644 --- a/board/eltec/elppc/u-boot.lds +++ b/board/eltec/elppc/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds index 5c847fb..dc370ea 100644 --- a/board/eltec/mhpc/u-boot.lds +++ b/board/eltec/mhpc/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) diff --git a/board/eltec/mhpc/u-boot.lds.debug b/board/eltec/mhpc/u-boot.lds.debug index ad36953..e62f6be 100644 --- a/board/eltec/mhpc/u-boot.lds.debug +++ b/board/eltec/mhpc/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds index 46dca96..3fb6d12 100644 --- a/board/emk/top860/u-boot.lds +++ b/board/emk/top860/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) diff --git a/board/emk/top860/u-boot.lds.debug b/board/emk/top860/u-boot.lds.debug index bfe8513..3229a23 100644 --- a/board/emk/top860/u-boot.lds.debug +++ b/board/emk/top860/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/ep88x/u-boot.lds b/board/ep88x/u-boot.lds index 70b84e4..f9579a6 100644 --- a/board/ep88x/u-boot.lds +++ b/board/ep88x/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/eric/eric.c b/board/eric/eric.c index cfcfa52..96c0b83 100644 --- a/board/eric/eric.c +++ b/board/eric/eric.c @@ -132,7 +132,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in cpu/ppc4xx + * in arch/ppc/cpu/ppc4xx */ sdram_init(); diff --git a/board/esd/cpci5200/mt46v16m16-75.h b/board/esd/cpci5200/mt46v16m16-75.h index 22d0a55..cf63806 100644 --- a/board/esd/cpci5200/mt46v16m16-75.h +++ b/board/esd/cpci5200/mt46v16m16-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 1 /* is DDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 @@ -31,7 +30,3 @@ #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 - -#else -#error CONFIG_MPC5200 not defined -#endif diff --git a/board/esd/cpci750/u-boot.lds b/board/esd/cpci750/u-boot.lds index d021331..6dff003 100644 --- a/board/esd/cpci750/u-boot.lds +++ b/board/esd/cpci750/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds index b044649..3d33d0f 100644 --- a/board/esd/dasa_sim/u-boot.lds +++ b/board/esd/dasa_sim/u-boot.lds @@ -57,7 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/esd/du440/init.S b/board/esd/du440/init.S index 3cac6b1..afcf9c4 100644 --- a/board/esd/du440/init.S +++ b/board/esd/du440/init.S @@ -22,7 +22,7 @@ */ #include <ppc_asm.tmpl> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> #include <config.h> /* diff --git a/board/esd/mecp5200/mt46v16m16-75.h b/board/esd/mecp5200/mt46v16m16-75.h index 22d0a55..cf63806 100644 --- a/board/esd/mecp5200/mt46v16m16-75.h +++ b/board/esd/mecp5200/mt46v16m16-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 1 /* is DDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 @@ -31,7 +30,3 @@ #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 - -#else -#error CONFIG_MPC5200 not defined -#endif diff --git a/board/esd/pf5200/mt46v16m16-75.h b/board/esd/pf5200/mt46v16m16-75.h index 22d0a55..cf63806 100644 --- a/board/esd/pf5200/mt46v16m16-75.h +++ b/board/esd/pf5200/mt46v16m16-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 1 /* is DDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 @@ -31,7 +30,3 @@ #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 - -#else -#error CONFIG_MPC5200 not defined -#endif diff --git a/board/esd/pmc440/init.S b/board/esd/pmc440/init.S index 6585fed..d51cd0c 100644 --- a/board/esd/pmc440/init.S +++ b/board/esd/pmc440/init.S @@ -20,7 +20,7 @@ */ #include <ppc_asm.tmpl> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> #include <config.h> /* diff --git a/board/esd/pmc440/u-boot-nand.lds b/board/esd/pmc440/u-boot-nand.lds index fb629e0..8a71bfa 100644 --- a/board/esd/pmc440/u-boot-nand.lds +++ b/board/esd/pmc440/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/esd/tasreg/u-boot.lds b/board/esd/tasreg/u-boot.lds index e3230b9..d4fd705 100644 --- a/board/esd/tasreg/u-boot.lds +++ b/board/esd/tasreg/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds index 3e4490e..4490f19 100644 --- a/board/esteem192e/u-boot.lds +++ b/board/esteem192e/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/etx094/u-boot.lds b/board/etx094/u-boot.lds index 1d34e68..94b1342 100644 --- a/board/etx094/u-boot.lds +++ b/board/etx094/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) - cpu/mpc8xx/interrupts.o (.text) - cpu/mpc8xx/serial.o (.text) - cpu/mpc8xx/cpu_init.o (.text) - cpu/mpc8xx/speed.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/cpu/mpc8xx/serial.o (.text) + arch/ppc/cpu/mpc8xx/cpu_init.o (.text) + arch/ppc/cpu/mpc8xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/etx094/u-boot.lds.debug b/board/etx094/u-boot.lds.debug index 1af61fb..458d4e0 100644 --- a/board/etx094/u-boot.lds.debug +++ b/board/etx094/u-boot.lds.debug @@ -55,17 +55,17 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) - cpu/mpc8xx/interrupts.o (.text) - cpu/mpc8xx/cpu.o (.text) - cpu/mpc8xx/cpu_init.o (.text) - cpu/mpc8xx/speed.o (.text) - cpu/mpc8xx/serial.o (.text) - lib_ppc/extable.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/string.o (.text) - lib_generic/crc32.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/cpu/mpc8xx/cpu.o (.text) + arch/ppc/cpu/mpc8xx/cpu_init.o (.text) + arch/ppc/cpu/mpc8xx/speed.o (.text) + arch/ppc/cpu/mpc8xx/serial.o (.text) + arch/ppc/lib/extable.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/string.o (.text) + lib/crc32.o (.text) common/dlmalloc.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds index d021331..6dff003 100644 --- a/board/evb64260/u-boot.lds +++ b/board/evb64260/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/fads/u-boot.lds b/board/fads/u-boot.lds index ce3e32e..d6476cd 100644 --- a/board/fads/u-boot.lds +++ b/board/fads/u-boot.lds @@ -50,7 +50,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) /*. = DEFINED(env_offset) ? env_offset : .;*/ common/env_embedded.o (.ppcenv) diff --git a/board/fads/u-boot.lds.debug b/board/fads/u-boot.lds.debug index 0a3b958..61c0d68 100644 --- a/board/fads/u-boot.lds.debug +++ b/board/fads/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds index 877e82c..fbfba6e 100644 --- a/board/flagadm/u-boot.lds +++ b/board/flagadm/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) diff --git a/board/flagadm/u-boot.lds.debug b/board/flagadm/u-boot.lds.debug index ad36953..e62f6be 100644 --- a/board/flagadm/u-boot.lds.debug +++ b/board/flagadm/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 02a824d..620eb16 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -33,6 +33,7 @@ COBJS-${CONFIG_FSL_CADMUS} += cadmus.o COBJS-${CONFIG_FSL_VIA} += cds_via.o COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o COBJS-${CONFIG_FSL_PIXIS} += pixis.o +COBJS-${CONFIG_FSL_NGPIXIS} += ngpixis.o COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o COBJS-${CONFIG_FSL_SGMII_RISER} += sgmii_riser.o diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c new file mode 100644 index 0000000..bb6794e --- /dev/null +++ b/board/freescale/common/ngpixis.c @@ -0,0 +1,136 @@ +/** + * Copyright 2010 Freescale Semiconductor + * Author: Timur Tabi <timur@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This file provides support for the ngPIXIS, a board-specific FPGA used on + * some Freescale reference boards. + * + * A "switch" is black rectangular block on the motherboard. It contains + * eight "bits". The ngPIXIS has a set of memory-mapped registers (SWx) that + * shadow the actual physical switches. There is also another set of + * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be + * used to override the values of the bits in the physical switches. + * + * The following macros need to be defined: + * + * PIXIS_BASE - The virtual address of the base of the PIXIS register map + * + * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value + * is used in the PIXIS_SW() macro to determine which offset in + * the PIXIS register map corresponds to the physical switch that controls + * the boot bank. + * + * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use. + * + * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK. + * + * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to + * boot from the alternate bank. + */ + +#include <common.h> +#include <command.h> +#include <watchdog.h> +#include <asm/cache.h> +#include <asm/io.h> + +#include "ngpixis.h" + +/* + * Reset the board. This ignores the ENx registers. + */ +void pixis_reset(void) +{ + out_8(&pixis->rst, 0); + + while (1); +} + +/* + * Reset the board. Like pixis_reset(), but it honors the ENx registers. + */ +void pixis_bank_reset(void) +{ + out_8(&pixis->vctl, 0); + out_8(&pixis->vctl, 1); + + while (1); +} + +/** + * Set the boot bank to the power-on default bank + */ +void clear_altbank(void) +{ + /* Tell the ngPIXIS to use this the bits in the physical switch for the + * boot bank value, instead of the SWx register. We need to be careful + * only to set the bits in SWx that correspond to the boot bank. + */ + clrbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK); +} + +/** + * Set the boot bank to the alternate bank + */ +void set_altbank(void) +{ + /* Program the alternate bank number into the SWx register. + */ + clrsetbits_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK, + PIXIS_LBMAP_ALTBANK); + + /* Tell the ngPIXIS to use this the bits in the SWx register for the + * boot bank value, instead of the physical switch. We need to be + * careful only to set the bits in SWx that correspond to the boot bank. + */ + setbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK); +} + + +int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + unsigned int i; + char *p_altbank = NULL; + char *unknown_param = NULL; + + /* No args is a simple reset request. + */ + if (argc <= 1) + pixis_reset(); + + for (i = 1; i < argc; i++) { + if (strcmp(argv[i], "altbank") == 0) { + p_altbank = argv[i]; + continue; + } + + unknown_param = argv[i]; + } + + if (unknown_param) { + printf("Invalid option: %s\n", unknown_param); + return 1; + } + + if (p_altbank) + set_altbank(); + else + clear_altbank(); + + pixis_bank_reset(); + + /* Shouldn't be reached. */ + return 0; +} + +U_BOOT_CMD( + pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd, + "Reset the board using the FPGA sequencer", + "- hard reset to default bank\n" + "pixis_reset altbank - reset to alternate bank\n" + ); diff --git a/board/freescale/common/ngpixis.h b/board/freescale/common/ngpixis.h new file mode 100644 index 0000000..284d044 --- /dev/null +++ b/board/freescale/common/ngpixis.h @@ -0,0 +1,57 @@ +/** + * Copyright 2010 Freescale Semiconductor + * Author: Timur Tabi <timur@freescale.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This file provides support for the ngPIXIS, a board-specific FPGA used on + * some Freescale reference boards. + */ + +/* ngPIXIS register set. Hopefully, this won't change too much over time. + * Feel free to add board-specific #ifdefs where necessary. + */ +typedef struct ngpixis { + u8 id; + u8 arch; + u8 scver; + u8 csr; + u8 rst; + u8 res1; + u8 aux; + u8 spd; + u8 brdcfg0; + u8 dma; + u8 addr; + u8 res2[2]; + u8 data; + u8 led; + u8 res3; + u8 vctl; + u8 vstat; + u8 vcfgen0; + u8 res4; + u8 ocmcsr; + u8 ocmmsg; + u8 gmdbg; + u8 res5[2]; + u8 sclk[3]; + u8 dclk[3]; + u8 watch; + struct { + u8 sw; + u8 en; + } s[8]; +} ngpixis_t __attribute__ ((aligned(1))); + +/* Pointer to the PIXIS register set */ +#define pixis ((ngpixis_t *)PIXIS_BASE) + +/* The PIXIS SW register that corresponds to board switch X, where x >= 1 */ +#define PIXIS_SW(x) (pixis->s[(x) - 1].sw) + +/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */ +#define PIXIS_EN(x) (pixis->s[(x) - 1].en) diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 7210512..119eaf9 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -1,5 +1,5 @@ /* - * Copyright 2006 Freescale Semiconductor + * Copyright 2006,2010 Freescale Semiconductor * Jeff Brown * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) * @@ -24,33 +24,26 @@ #include <common.h> #include <command.h> -#include <watchdog.h> -#include <asm/cache.h> #include <asm/io.h> -#include "pixis.h" - - -static ulong strfractoint(uchar *strptr); - +#define pixis_base (u8 *)PIXIS_BASE /* * Simple board reset. */ void pixis_reset(void) { - u8 *pixis_base = (u8 *)PIXIS_BASE; out_8(pixis_base + PIXIS_RST, 0); -} + while (1); +} /* * Per table 27, page 58 of MPC8641HPCN spec. */ -int set_px_sysclk(ulong sysclk) +static int set_px_sysclk(unsigned long sysclk) { u8 sysclk_s, sysclk_r, sysclk_v, vclkh, vclkl, sysclk_aux; - u8 *pixis_base = (u8 *)PIXIS_BASE; switch (sysclk) { case 33: @@ -117,13 +110,13 @@ int set_px_sysclk(ulong sysclk) return 1; } - -int set_px_mpxpll(ulong mpxpll) +/* Set the CFG_SYSPLL bits + * + * This only has effect if PX_VCFGEN0[SYSPLL]=1, which is true if + * read_from_px_regs() is called. + */ +static int set_px_mpxpll(unsigned long mpxpll) { - u8 tmp; - u8 val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - switch (mpxpll) { case 2: case 4: @@ -133,28 +126,19 @@ int set_px_mpxpll(ulong mpxpll) case 12: case 14: case 16: - val = (u8) mpxpll; - break; - default: - printf("Unsupported MPXPLL ratio.\n"); - return 0; + clrsetbits_8(pixis_base + PIXIS_VSPEED1, 0x1F, mpxpll); + return 1; } - tmp = in_8(pixis_base + PIXIS_VSPEED1); - tmp = (tmp & 0xF0) | (val & 0x0F); - out_8(pixis_base + PIXIS_VSPEED1, tmp); - - return 1; + printf("Unsupported MPXPLL ratio.\n"); + return 0; } - -int set_px_corepll(ulong corepll) +static int set_px_corepll(unsigned long corepll) { - u8 tmp; u8 val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - switch ((int)corepll) { + switch (corepll) { case 20: val = 0x08; break; @@ -178,113 +162,132 @@ int set_px_corepll(ulong corepll) return 0; } - tmp = in_8(pixis_base + PIXIS_VSPEED0); - tmp = (tmp & 0xE0) | (val & 0x1F); - out_8(pixis_base + PIXIS_VSPEED0, tmp); - + clrsetbits_8(pixis_base + PIXIS_VSPEED0, 0x1F, val); return 1; } +#ifndef CONFIG_SYS_PIXIS_VCFGEN0_ENABLE +#define CONFIG_SYS_PIXIS_VCFGEN0_ENABLE 0x1C +#endif -void read_from_px_regs(int set) +/* Tell the PIXIS where to find the COREPLL, MPXPLL, SYSCLK values + * + * The PIXIS can be programmed to look at either the on-board dip switches + * or various other PIXIS registers to determine the values for COREPLL, + * MPXPLL, and SYSCLK. + * + * CONFIG_SYS_PIXIS_VCFGEN0_ENABLE is the value to write to the PIXIS_VCFGEN0 + * register that tells the pixis to use the various PIXIS register. + */ +static void read_from_px_regs(int set) { - u8 *pixis_base = (u8 *)PIXIS_BASE; - u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */ u8 tmp = in_8(pixis_base + PIXIS_VCFGEN0); if (set) - tmp = tmp | mask; + tmp = tmp | CONFIG_SYS_PIXIS_VCFGEN0_ENABLE; else - tmp = tmp & ~mask; + tmp = tmp & ~CONFIG_SYS_PIXIS_VCFGEN0_ENABLE; + out_8(pixis_base + PIXIS_VCFGEN0, tmp); } +/* CONFIG_SYS_PIXIS_VBOOT_ENABLE is the value to write to the PX_VCFGEN1 + * register that tells the pixis to use the PX_VBOOT[LBMAP] register. + */ +#ifndef CONFIG_SYS_PIXIS_VBOOT_ENABLE +#define CONFIG_SYS_PIXIS_VBOOT_ENABLE 0x04 +#endif -void read_from_px_regs_altbank(int set) +/* Configure the source of the boot location + * + * The PIXIS can be programmed to look at either the on-board dip switches + * or the PX_VBOOT[LBMAP] register to determine where we should boot. + * + * If we want to boot from the alternate boot bank, we need to tell the PIXIS + * to ignore the on-board dip switches and use the PX_VBOOT[LBMAP] instead. + */ +static void read_from_px_regs_altbank(int set) { - u8 *pixis_base = (u8 *)PIXIS_BASE; - u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */ u8 tmp = in_8(pixis_base + PIXIS_VCFGEN1); if (set) - tmp = tmp | mask; + tmp = tmp | CONFIG_SYS_PIXIS_VBOOT_ENABLE; else - tmp = tmp & ~mask; + tmp = tmp & ~CONFIG_SYS_PIXIS_VBOOT_ENABLE; + out_8(pixis_base + PIXIS_VCFGEN1, tmp); } +/* CONFIG_SYS_PIXIS_VBOOT_MASK contains the bits to set in VBOOT register that + * tells the PIXIS what the alternate flash bank is. + * + * Note that it's not really a mask. It contains the actual LBMAP bits that + * must be set to select the alternate bank. This code assumes that the + * primary bank has these bits set to 0, and the alternate bank has these + * bits set to 1. + */ #ifndef CONFIG_SYS_PIXIS_VBOOT_MASK #define CONFIG_SYS_PIXIS_VBOOT_MASK (0x40) #endif -void clear_altbank(void) +/* Tell the PIXIS to boot from the default flash bank + * + * Program the default flash bank into the VBOOT register. This register is + * used only if PX_VCFGEN1[FLASH]=1. + */ +static void clear_altbank(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; - - tmp = in_8(pixis_base + PIXIS_VBOOT); - tmp &= ~CONFIG_SYS_PIXIS_VBOOT_MASK; - - out_8(pixis_base + PIXIS_VBOOT, tmp); + clrbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK); } - -void set_altbank(void) +/* Tell the PIXIS to boot from the alternate flash bank + * + * Program the alternate flash bank into the VBOOT register. This register is + * used only if PX_VCFGEN1[FLASH]=1. + */ +static void set_altbank(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; - - tmp = in_8(pixis_base + PIXIS_VBOOT); - tmp |= CONFIG_SYS_PIXIS_VBOOT_MASK; - - out_8(pixis_base + PIXIS_VBOOT, tmp); + setbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK); } - -void set_px_go(void) +/* Reset the board with watchdog disabled. + * + * This respects the altbank setting. + */ +static void set_px_go(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; + /* Disable the VELA sequencer and watchdog */ + clrbits_8(pixis_base + PIXIS_VCTL, 9); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp & 0x1E; /* clear GO bit */ - out_8(pixis_base + PIXIS_VCTL, tmp); + /* Reboot by starting the VELA sequencer */ + setbits_8(pixis_base + PIXIS_VCTL, 0x1); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp | 0x01; /* set GO bit - start reset sequencer */ - out_8(pixis_base + PIXIS_VCTL, tmp); + while (1); } - -void set_px_go_with_watchdog(void) +/* Reset the board with watchdog enabled. + * + * This respects the altbank setting. + */ +static void set_px_go_with_watchdog(void) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; + /* Disable the VELA sequencer */ + clrbits_8(pixis_base + PIXIS_VCTL, 1); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp & 0x1E; - out_8(pixis_base + PIXIS_VCTL, tmp); + /* Enable the watchdog and reboot by starting the VELA sequencer */ + setbits_8(pixis_base + PIXIS_VCTL, 0x9); - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp | 0x09; - out_8(pixis_base + PIXIS_VCTL, tmp); + while (1); } - -int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, - int flag, int argc, char *argv[]) +/* Disable the watchdog + * + */ +static int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char *argv[]) { - u8 tmp; - u8 *pixis_base = (u8 *)PIXIS_BASE; - - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp = tmp & 0x1E; - out_8(pixis_base + PIXIS_VCTL, tmp); - - /* setting VCTL[WDEN] to 0 to disable watch dog */ - tmp = in_8(pixis_base + PIXIS_VCTL); - tmp &= ~0x08; - out_8(pixis_base + PIXIS_VCTL, tmp); + /* Disable the VELA sequencer and the watchdog */ + clrbits_8(pixis_base + PIXIS_VCTL, 9); return 0; } @@ -296,16 +299,17 @@ U_BOOT_CMD( ); #ifdef CONFIG_PIXIS_SGMII_CMD -int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) + +/* Enable or disable SGMII mode for a TSEC + */ +static int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { int which_tsec = -1; - u8 *pixis_base = (u8 *)PIXIS_BASE; - uchar mask; - uchar switch_mask; + unsigned char mask; + unsigned char switch_mask; - if (argc > 2) - if (strcmp(argv[1], "all") != 0) - which_tsec = simple_strtoul(argv[1], NULL, 0); + if ((argc > 2) && (strcmp(argv[1], "all") != 0)) + which_tsec = simple_strtoul(argv[1], NULL, 0); switch (which_tsec) { #ifdef CONFIG_TSEC1 @@ -363,6 +367,7 @@ U_BOOT_CMD( " off - disables SGMII\n" " switch - use switch settings" ); + #endif /* @@ -371,14 +376,13 @@ U_BOOT_CMD( * FPGA register values. * input: strptr i.e. argv[2] */ - -static ulong strfractoint(uchar *strptr) +static unsigned long strfractoint(char *strptr) { - int i, j, retval; + int i, j; int mulconst; - int intarr_len = 0, decarr_len = 0, no_dec = 0; - ulong intval = 0, decval = 0; - uchar intarr[3], decarr[3]; + int intarr_len, no_dec = 0; + unsigned long intval = 0, decval = 0; + char intarr[3], decarr[3]; /* Assign the integer part to intarr[] * If there is no decimal point i.e. @@ -412,26 +416,21 @@ static ulong strfractoint(uchar *strptr) j++; } - decarr_len = j; decarr[j] = '\0'; mulconst = 1; - for (i = 0; i < decarr_len; i++) + for (i = 0; i < j; i++) mulconst *= 10; - decval = simple_strtoul((char *)decarr, NULL, 10); + decval = simple_strtoul(decarr, NULL, 10); } - intval = simple_strtoul((char *)intarr, NULL, 10); + intval = simple_strtoul(intarr, NULL, 10); intval = intval * mulconst; - retval = intval + decval; - - return retval; + return intval + decval; } - -int -pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +static int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { unsigned int i; char *p_cf = NULL; @@ -440,7 +439,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) char *p_cf_mpxpll = NULL; char *p_altbank = NULL; char *p_wd = NULL; - unsigned int unknown_param = 0; + int unknown_param = 0; /* * No args is a simple reset request. @@ -493,9 +492,9 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) */ read_from_px_regs(0); - if (p_altbank) { + if (p_altbank) read_from_px_regs_altbank(0); - } + clear_altbank(); /* @@ -507,7 +506,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) unsigned long mpxpll; sysclk = simple_strtoul(p_cf_sysclk, NULL, 10); - corepll = strfractoint((uchar *) p_cf_corepll); + corepll = strfractoint(p_cf_corepll); mpxpll = simple_strtoul(p_cf_mpxpll, NULL, 10); if (!(set_px_sysclk(sysclk) @@ -536,11 +535,10 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * Reset with watchdog specified. */ - if (p_wd) { + if (p_wd) set_px_go_with_watchdog(); - } else { + else set_px_go(); - } /* * Shouldn't be reached. diff --git a/board/freescale/m5208evbe/u-boot.lds b/board/freescale/m5208evbe/u-boot.lds index bc9d5cd..507e21a 100644 --- a/board/freescale/m5208evbe/u-boot.lds +++ b/board/freescale/m5208evbe/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - cpu/mcf52x2/libmcf52x2.a (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/libmcf52x2.a (.text) + arch/m68k/lib/libm68k.a (.text) common/dlmalloc.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/m52277evb/u-boot.spa b/board/freescale/m52277evb/u-boot.spa index 7ae70d4..4591196 100644 --- a/board/freescale/m52277evb/u-boot.spa +++ b/board/freescale/m52277evb/u-boot.spa @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5227x/start.o (.text) - cpu/mcf5227x/libmcf5227x.a (.text) - lib_m68k/libm68k.a (.text) - lib_generic/libgeneric.a (.text) + arch/m68k/cpu/mcf5227x/start.o (.text) + arch/m68k/cpu/mcf5227x/libmcf5227x.a (.text) + arch/m68k/lib/libm68k.a (.text) + lib/libgeneric.a (.text) common/cmd_mem.o (.text) common/main.o (.text) diff --git a/board/freescale/m52277evb/u-boot.stm b/board/freescale/m52277evb/u-boot.stm index 03ff532..1ec83e9 100644 --- a/board/freescale/m52277evb/u-boot.stm +++ b/board/freescale/m52277evb/u-boot.stm @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5227x/start.o (.text) + arch/m68k/cpu/mcf5227x/start.o (.text) *(.text) *(.fixup) diff --git a/board/freescale/m5235evb/u-boot.16 b/board/freescale/m5235evb/u-boot.16 index c134884..d7bd10f 100644 --- a/board/freescale/m5235evb/u-boot.16 +++ b/board/freescale/m5235evb/u-boot.16 @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf523x/start.o (.text) - cpu/mcf523x/cpu_init.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf523x/start.o (.text) + arch/m68k/cpu/mcf523x/cpu_init.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5235evb/u-boot.32 b/board/freescale/m5235evb/u-boot.32 index 53c337d..45ff158 100644 --- a/board/freescale/m5235evb/u-boot.32 +++ b/board/freescale/m5235evb/u-boot.32 @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf523x/start.o (.text) - cpu/mcf523x/cpu.o (.text) - cpu/mcf523x/cpu_init.o (.text) - cpu/mcf523x/interrupts.o (.text) - cpu/mcf523x/speed.o (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf523x/start.o (.text) + arch/m68k/cpu/mcf523x/cpu.o (.text) + arch/m68k/cpu/mcf523x/cpu_init.o (.text) + arch/m68k/cpu/mcf523x/interrupts.o (.text) + arch/m68k/cpu/mcf523x/speed.o (.text) + arch/m68k/lib/libm68k.a (.text) common/dlmalloc.o (.text) common/cmd_bootm.o (.text) common/cmd_flash.o (.text) @@ -68,7 +68,7 @@ SECTIONS common/cmd_mem.o (.text) common/console.o (.text) common/main.o (.text) - lib_generic/libgeneric.a (.text) + lib/libgeneric.a (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5249evb/u-boot.lds b/board/freescale/m5249evb/u-boot.lds index e3230b9..d4fd705 100644 --- a/board/freescale/m5249evb/u-boot.lds +++ b/board/freescale/m5249evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5253demo/u-boot.lds b/board/freescale/m5253demo/u-boot.lds index 6cb5ee0..4f8bb20 100644 --- a/board/freescale/m5253demo/u-boot.lds +++ b/board/freescale/m5253demo/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5253evbe/u-boot.lds b/board/freescale/m5253evbe/u-boot.lds index 132fccf..797c837 100644 --- a/board/freescale/m5253evbe/u-boot.lds +++ b/board/freescale/m5253evbe/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5271evb/m5271evb.c b/board/freescale/m5271evb/m5271evb.c index 5505cc4..446f102 100644 --- a/board/freescale/m5271evb/m5271evb.c +++ b/board/freescale/m5271evb/m5271evb.c @@ -47,6 +47,7 @@ phys_size_t initdram (int board_type) { MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS | MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE | MCF_GPIO_SDRAM_SDCS_11); + asm(" nop"); /* * Check to see if the SDRAM has already been initialized @@ -55,8 +56,9 @@ phys_size_t initdram (int board_type) { if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) { /* Initialize DRAM Control Register: DCR */ mbar_writeShort(MCF_SDRAMC_DCR, - MCF_SDRAMC_DCR_RTIM(0x01) - | MCF_SDRAMC_DCR_RC(0x30)); + MCF_SDRAMC_DCR_RTIM(2) + | MCF_SDRAMC_DCR_RC(0x2E)); + asm(" nop"); /* * Initialize DACR0 @@ -70,15 +72,18 @@ phys_size_t initdram (int board_type) { | MCF_SDRAMC_DACRn_CASL(1) | MCF_SDRAMC_DACRn_CBM(3) | MCF_SDRAMC_DACRn_PS(0)); + asm(" nop"); /* Initialize DMR0 */ mbar_writeLong(MCF_SDRAMC_DMR0, MCF_SDRAMC_DMRn_BAM_16M | MCF_SDRAMC_DMRn_V); + asm(" nop"); /* Set IP bit in DACR */ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) | MCF_SDRAMC_DACRn_IP); + asm(" nop"); /* Wait at least 20ns to allow banks to precharge */ for (i = 0; i < 5; i++) @@ -86,6 +91,7 @@ phys_size_t initdram (int board_type) { /* Write to this block to initiate precharge */ *(u32 *)(CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5; + asm(" nop"); /* Set RE bit in DACR */ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) @@ -98,6 +104,7 @@ phys_size_t initdram (int board_type) { /* Finish the configuration by issuing the MRS */ mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0) | MCF_SDRAMC_DACRn_MRS); + asm(" nop"); /* * Write to the SDRAM Mode Register A0-A11 = 0x400 @@ -109,6 +116,7 @@ phys_size_t initdram (int board_type) { * Burst Length = 1 */ *(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xa5a5a5a5; + asm(" nop"); } return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; diff --git a/board/freescale/m5271evb/u-boot.lds b/board/freescale/m5271evb/u-boot.lds index 00c1f2a..ca41232 100644 --- a/board/freescale/m5271evb/u-boot.lds +++ b/board/freescale/m5271evb/u-boot.lds @@ -56,11 +56,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/freescale/m5272c3/u-boot.lds b/board/freescale/m5272c3/u-boot.lds index 9d20b22..8b011df 100644 --- a/board/freescale/m5272c3/u-boot.lds +++ b/board/freescale/m5272c3/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5275evb/u-boot.lds b/board/freescale/m5275evb/u-boot.lds index daf8724..cd17b0a 100644 --- a/board/freescale/m5275evb/u-boot.lds +++ b/board/freescale/m5275evb/u-boot.lds @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) common/dlmalloc.o (.text) - lib_generic/string.o (.text) - lib_generic/zlib.o (.text) + lib/string.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o(.text) diff --git a/board/freescale/m5282evb/u-boot.lds b/board/freescale/m5282evb/u-boot.lds index f46e025..5ad0fad 100644 --- a/board/freescale/m5282evb/u-boot.lds +++ b/board/freescale/m5282evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) common/dlmalloc.o (.text) - lib_generic/string.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/string.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o(.text) diff --git a/board/freescale/m53017evb/u-boot.lds b/board/freescale/m53017evb/u-boot.lds index c79d06c..6577299 100644 --- a/board/freescale/m53017evb/u-boot.lds +++ b/board/freescale/m53017evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf532x/start.o (.text) - cpu/mcf532x/libmcf532x.a (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf532x/start.o (.text) + arch/m68k/cpu/mcf532x/libmcf532x.a (.text) + arch/m68k/lib/libm68k.a (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5329evb/u-boot.lds b/board/freescale/m5329evb/u-boot.lds index af31098..ba7ca27 100644 --- a/board/freescale/m5329evb/u-boot.lds +++ b/board/freescale/m5329evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf532x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf532x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m5373evb/u-boot.lds b/board/freescale/m5373evb/u-boot.lds index dff74b6..a2540bb 100644 --- a/board/freescale/m5373evb/u-boot.lds +++ b/board/freescale/m5373evb/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf532x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf532x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m54451evb/u-boot.spa b/board/freescale/m54451evb/u-boot.spa index d8caefa..09ac481 100644 --- a/board/freescale/m54451evb/u-boot.spa +++ b/board/freescale/m54451evb/u-boot.spa @@ -55,14 +55,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) - cpu/mcf5445x/libmcf5445x.a (.text) - lib_m68k/libm68k.a (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) + arch/m68k/cpu/mcf5445x/libmcf5445x.a (.text) + arch/m68k/lib/libm68k.a (.text) common/cmd_flash.o (.text) common/dlmalloc.o (.text) common/main.o (.text) common/image.o (.text) - lib_generic/libgeneric.a (.text) + lib/libgeneric.a (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m54451evb/u-boot.stm b/board/freescale/m54451evb/u-boot.stm index e9eac67..e64a56c 100644 --- a/board/freescale/m54451evb/u-boot.stm +++ b/board/freescale/m54451evb/u-boot.stm @@ -55,16 +55,16 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) -/* cpu/mcf5445x/cpu_init.o (.text) - cpu/mcf5445x/cpu.o (.text) - cpu/mcf5445x/dspi.o (.text) - cpu/mcf5445x/interrupt.o (.text) - cpu/mcf5445x/speed.o (.text) - lib_m68k/board.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) +/* arch/m68k/cpu/mcf5445x/cpu_init.o (.text) + arch/m68k/cpu/mcf5445x/cpu.o (.text) + arch/m68k/cpu/mcf5445x/dspi.o (.text) + arch/m68k/cpu/mcf5445x/interrupt.o (.text) + arch/m68k/cpu/mcf5445x/speed.o (.text) + arch/m68k/lib/board.o (.text) common/serial.o (.text) common/console.o (.text) - lib_generic/display_options.o (.text) + lib/display_options.o (.text) board/freescale/m54455evb/m54455evb.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c index 293b5b0..2a84514 100644 --- a/board/freescale/m54455evb/m54455evb.c +++ b/board/freescale/m54455evb/m54455evb.c @@ -107,7 +107,7 @@ int ide_preinit(void) { volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO; - gpio->par_fec |= (gpio->par_fec & GPIO_PAR_FEC_FEC1_MASK) | 0x10; + gpio->par_fec |= (gpio->par_fec & GPIO_PAR_FEC_FEC1_UNMASK) | 0x10; gpio->par_feci2c |= (gpio->par_feci2c & 0xF0FF) | (GPIO_PAR_FECI2C_MDC1_ATA_DIOR | GPIO_PAR_FECI2C_MDIO1_ATA_DIOW); @@ -185,7 +185,7 @@ ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) info->flash_id = 0x01000000; info->portwidth = 1; info->chipwidth = 1; - info->buffer_size = 32; + info->buffer_size = 1; info->erase_blk_tout = 16384; info->write_tout = 2; info->buffer_write_tout = 5; diff --git a/board/freescale/m54455evb/u-boot.atm b/board/freescale/m54455evb/u-boot.atm index 08e184c..ebf801a 100644 --- a/board/freescale/m54455evb/u-boot.atm +++ b/board/freescale/m54455evb/u-boot.atm @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/freescale/m54455evb/u-boot.int b/board/freescale/m54455evb/u-boot.int index 4d504a2..153556f 100644 --- a/board/freescale/m54455evb/u-boot.int +++ b/board/freescale/m54455evb/u-boot.int @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) *(.text) *(.fixup) diff --git a/board/freescale/m54455evb/u-boot.stm b/board/freescale/m54455evb/u-boot.stm index 3dd9a6b..9cda102 100644 --- a/board/freescale/m54455evb/u-boot.stm +++ b/board/freescale/m54455evb/u-boot.stm @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf5445x/start.o (.text) + arch/m68k/cpu/mcf5445x/start.o (.text) *(.text) *(.fixup) diff --git a/board/freescale/m547xevb/u-boot.lds b/board/freescale/m547xevb/u-boot.lds index a3014bd..54bf278 100644 --- a/board/freescale/m547xevb/u-boot.lds +++ b/board/freescale/m547xevb/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf547x_8x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf547x_8x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/m548xevb/u-boot.lds b/board/freescale/m548xevb/u-boot.lds index a3014bd..54bf278 100644 --- a/board/freescale/m548xevb/u-boot.lds +++ b/board/freescale/m548xevb/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf547x_8x/start.o (.text) - lib_m68k/traps.o (.text) - lib_m68k/interrupts.o (.text) + arch/m68k/cpu/mcf547x_8x/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/lib/interrupts.o (.text) common/dlmalloc.o (.text) . = DEFINED(env_offset) ? env_offset : .; diff --git a/board/freescale/mpc7448hpc2/tsi108_init.c b/board/freescale/mpc7448hpc2/tsi108_init.c index 74bb564..c6a3ade 100644 --- a/board/freescale/mpc7448hpc2/tsi108_init.c +++ b/board/freescale/mpc7448hpc2/tsi108_init.c @@ -323,7 +323,7 @@ int board_early_init_r (void) * We will over-ride the env_init called in board_init_f * This is really a work-around because, the HLP bank 1 * where NVRAM resides is not visible during board_init_f - * (lib_ppc/board.c) + * (arch/ppc/lib/board.c) * Alternatively, we could use the I2C EEPROM at start-up to configure * and enable all HLP banks and not just HLP 0 as is being done for * Taiga Rev. 2. diff --git a/board/freescale/mpc7448hpc2/u-boot.lds b/board/freescale/mpc7448hpc2/u-boot.lds index 247779f..c4266ce 100644 --- a/board/freescale/mpc7448hpc2/u-boot.lds +++ b/board/freescale/mpc7448hpc2/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/freescale/mpc8536ds/config.mk b/board/freescale/mpc8536ds/config.mk index e38af73..3f5447a 100644 --- a/board/freescale/mpc8536ds/config.mk +++ b/board/freescale/mpc8536ds/config.mk @@ -26,7 +26,7 @@ ifndef NAND_SPL ifeq ($(CONFIG_MK_NAND), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) -LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 81a56b5..253ed18 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -39,7 +39,6 @@ #include <netdev.h> #include <sata.h> -#include "../common/pixis.h" #include "../common/sgmii_riser.h" phys_size_t fixed_sdram(void); diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index b35e02f..0be2d89 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -35,7 +35,6 @@ #include <tsec.h> #include <netdev.h> -#include "../common/pixis.h" #include "../common/sgmii_riser.h" int checkboard (void) diff --git a/board/freescale/mpc8569mds/config.mk b/board/freescale/mpc8569mds/config.mk index 7de0f7c..86f138c 100644 --- a/board/freescale/mpc8569mds/config.mk +++ b/board/freescale/mpc8569mds/config.mk @@ -26,7 +26,7 @@ ifndef NAND_SPL ifeq ($(CONFIG_MK_NAND), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) -LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 74085c3..6029a51 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -36,7 +36,6 @@ #include <tsec.h> #include <netdev.h> -#include "../common/pixis.h" #include "../common/sgmii_riser.h" long int fixed_sdram(void); diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 784a2ed..2ef7b23 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -34,8 +34,6 @@ #include <spd_sdram.h> #include <netdev.h> -#include "../common/pixis.h" - void sdram_init(void); phys_size_t fixed_sdram(void); void mpc8610hpcd_diu_init(void); @@ -127,6 +125,8 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif + setup_ddr_bat(dram_size); + puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c index 4186a2e..94fb1eb 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c @@ -29,7 +29,6 @@ #ifdef CONFIG_FSL_DIU_FB -#include "../common/pixis.h" #include "../common/fsl_diu_fb.h" #if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) diff --git a/board/freescale/mpc8610hpcd/u-boot.lds b/board/freescale/mpc8610hpcd/u-boot.lds index b573807..1f9f8eb 100644 --- a/board/freescale/mpc8610hpcd/u-boot.lds +++ b/board/freescale/mpc8610hpcd/u-boot.lds @@ -50,16 +50,16 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc86xx/start.o (.text) - cpu/mpc86xx/traps.o (.text) - cpu/mpc86xx/interrupts.o (.text) - cpu/mpc86xx/cpu_init.o (.text) - cpu/mpc86xx/cpu.o (.text) - cpu/mpc86xx/speed.o (.text) + arch/ppc/cpu/mpc86xx/start.o (.text) + arch/ppc/cpu/mpc86xx/traps.o (.text) + arch/ppc/cpu/mpc86xx/interrupts.o (.text) + arch/ppc/cpu/mpc86xx/cpu_init.o (.text) + arch/ppc/cpu/mpc86xx/cpu.o (.text) + arch/ppc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) *(.text) *(.got1) } diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index c521527..b352c33 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -31,8 +31,6 @@ #include <fdt_support.h> #include <netdev.h> -#include "../common/pixis.h" - phys_size_t fixed_sdram(void); int board_early_init_f(void) @@ -74,6 +72,8 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif + setup_ddr_bat(dram_size); + puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8641hpcn/u-boot.lds b/board/freescale/mpc8641hpcn/u-boot.lds index 2b98b5a..d7c65ce 100644 --- a/board/freescale/mpc8641hpcn/u-boot.lds +++ b/board/freescale/mpc8641hpcn/u-boot.lds @@ -50,16 +50,16 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc86xx/start.o (.text) - cpu/mpc86xx/traps.o (.text) - cpu/mpc86xx/interrupts.o (.text) - cpu/mpc86xx/cpu_init.o (.text) - cpu/mpc86xx/cpu.o (.text) - cpu/mpc86xx/speed.o (.text) + arch/ppc/cpu/mpc86xx/start.o (.text) + arch/ppc/cpu/mpc86xx/traps.o (.text) + arch/ppc/cpu/mpc86xx/interrupts.o (.text) + arch/ppc/cpu/mpc86xx/cpu_init.o (.text) + arch/ppc/cpu/mpc86xx/cpu.o (.text) + arch/ppc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) drivers/bios_emulator/atibios.o (.text) *(.text) *(.got1) diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds index 3182aa6..2731294 100644 --- a/board/freescale/mx31ads/u-boot.lds +++ b/board/freescale/mx31ads/u-boot.lds @@ -37,9 +37,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/arm1136/start.o (.text) + arch/arm/cpu/arm1136/start.o (.text) board/freescale/mx31ads/libmx31ads.a (.text) - lib_arm/libarm.a (.text) + arch/arm/lib/libarm.a (.text) net/libnet.a (.text) drivers/mtd/libmtd.a (.text) diff --git a/board/freescale/mx51evk/config.mk b/board/freescale/mx51evk/config.mk index c8279ec..af70ec2 100644 --- a/board/freescale/mx51evk/config.mk +++ b/board/freescale/mx51evk/config.mk @@ -20,6 +20,6 @@ # MA 02111-1307 USA # -LDSCRIPT = cpu/$(CPU)/$(SOC)/u-boot.lds +LDSCRIPT = $(CPUDIR)/$(SOC)/u-boot.lds TEXT_BASE = 0x97800000 IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 8754563..f0b7abc 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -72,72 +72,6 @@ static void setup_iomux_uart(void) mxc_iomux_set_pad(MX51_PIN_UART1_CTS, pad); } -static void setup_expio(void) -{ - u32 reg; - struct weim *pweim = (struct weim *)WEIM_BASE_ADDR; - struct clkctl *pclkctl = (struct clkctl *)CCM_BASE_ADDR; - - /* CS5 setup */ - mxc_request_iomux(MX51_PIN_EIM_CS5, IOMUX_CONFIG_ALT0); - writel(0x00410089, &pweim[5].csgcr1); - writel(0x00000002, &pweim[5].csgcr2); - - /* RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */ - writel(0x32260000, &pweim[5].csrcr1); - - /* APR = 0 */ - writel(0x00000000, &pweim[5].csrcr2); - - /* - * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0, WEN=0, - * WCSA=0, WCSN=0 - */ - writel(0x72080F00, &pweim[5].cswcr1); - - mx51_io_board = (struct io_board_ctrl *)(CS5_BASE_ADDR + - IO_BOARD_OFFSET); - if ((readw(&mx51_io_board->id1) == 0xAAAA) && - (readw(&mx51_io_board->id2) == 0x5555)) { - if (is_soc_rev(CHIP_REV_2_0) < 0) { - reg = readl(&pclkctl->cbcdr); - reg = (reg & (~0x70000)) | 0x30000; - writel(reg, &pclkctl->cbcdr); - /* make sure divider effective */ - while (readl(&pclkctl->cdhipr) != 0) - ; - writel(0x0, &pclkctl->ccdr); - } - } else { - /* CS1 */ - writel(0x00410089, &pweim[1].csgcr1); - writel(0x00000002, &pweim[1].csgcr2); - /* RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */ - writel(0x32260000, &pweim[1].csrcr1); - /* APR=0 */ - writel(0x00000000, &pweim[1].csrcr2); - /* - * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0, - * WEN=0, WCSA=0, WCSN=0 - */ - writel(0x72080F00, &pweim[1].cswcr1); - mx51_io_board = (struct io_board_ctrl *)(CS1_BASE_ADDR + - IO_BOARD_OFFSET); - } - - /* Reset interrupt status reg */ - writew(0x1F, &(mx51_io_board->int_rest)); - writew(0x00, &(mx51_io_board->int_rest)); - writew(0xFFFF, &(mx51_io_board->int_mask)); - - /* Reset the XUART and Ethernet controllers */ - reg = readw(&(mx51_io_board->sw_reset)); - reg |= 0x9; - writew(reg, &(mx51_io_board->sw_reset)); - reg &= ~0x9; - writew(reg, &(mx51_io_board->sw_reset)); -} - static void setup_iomux_fec(void) { /*FEC_MDIO*/ @@ -349,7 +283,6 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; setup_iomux_uart(); - setup_expio(); setup_iomux_fec(); return 0; } diff --git a/board/freescale/mx51evk/mx51evk.h b/board/freescale/mx51evk/mx51evk.h index 524cdcc..2854e71 100644 --- a/board/freescale/mx51evk/mx51evk.h +++ b/board/freescale/mx51evk/mx51evk.h @@ -47,5 +47,4 @@ struct io_board_ctrl { }; #endif -#define IO_BOARD_OFFSET (0x20000) #endif diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk index 0f7a048..1f9f7b6 100644 --- a/board/freescale/p1_p2_rdb/config.mk +++ b/board/freescale/p1_p2_rdb/config.mk @@ -27,7 +27,7 @@ ifndef NAND_SPL ifeq ($(CONFIG_MK_NAND), y) TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) -LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds endif endif diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index f6eae55..f0ff209 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -38,7 +38,7 @@ #include <asm/mp.h> #include <netdev.h> -#include "../common/pixis.h" +#include "../common/ngpixis.h" #include "../common/sgmii_riser.h" DECLARE_GLOBAL_DATA_PTR; @@ -47,30 +47,24 @@ phys_size_t fixed_sdram(void); int checkboard(void) { - u8 sw7; - u8 *pixis_base = (u8 *)PIXIS_BASE; + u8 sw; puts("Board: P2020DS "); #ifdef CONFIG_PHYS_64BIT puts("(36-bit addrmap) "); #endif - printf("Sys ID: 0x%02x, " - "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", - in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), - in_8(pixis_base + PIXIS_PVER)); + printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); - sw7 = in_8(pixis_base + PIXIS_SW(7)); - switch ((sw7 & PIXIS_SW7_LBMAP) >> 6) { - case 0: - case 1: - printf ("vBank: %d\n", ((sw7 & PIXIS_SW7_VBANK) >> 4)); - break; - case 2: - case 3: - puts ("Promjet\n"); - break; - } + sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); + sw = (sw & PIXIS_LBMAP_MASK) >> PIXIS_LBMAP_SHIFT; + + if (sw < 0x8) + /* The lower two bits are the actual vbank number */ + printf("vBank: %d\n", sw & 3); + else + puts("Promjet\n"); return 0; } @@ -371,30 +365,22 @@ unsigned long get_board_ddr_clk(ulong dummy) return gd->mem_clk; } -unsigned long -calculate_board_sys_clk(ulong dummy) +unsigned long calculate_board_sys_clk(ulong dummy) { ulong val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - val = ics307_clk_freq( - in_8(pixis_base + PIXIS_VSYSCLK0), - in_8(pixis_base + PIXIS_VSYSCLK1), - in_8(pixis_base + PIXIS_VSYSCLK2)); + val = ics307_clk_freq(in_8(&pixis->sclk[0]), in_8(&pixis->sclk[1]), + in_8(&pixis->sclk[2])); debug("sysclk val = %lu\n", val); return val; } -unsigned long -calculate_board_ddr_clk(ulong dummy) +unsigned long calculate_board_ddr_clk(ulong dummy) { ulong val; - u8 *pixis_base = (u8 *)PIXIS_BASE; - val = ics307_clk_freq( - in_8(pixis_base + PIXIS_VDDRCLK0), - in_8(pixis_base + PIXIS_VDDRCLK1), - in_8(pixis_base + PIXIS_VDDRCLK2)); + val = ics307_clk_freq(in_8(&pixis->dclk[0]), in_8(&pixis->dclk[1]), + in_8(&pixis->dclk[2])); debug("ddrclk val = %lu\n", val); return val; } @@ -403,9 +389,8 @@ unsigned long get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; - u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in_8(pixis_base + PIXIS_SPD); + i = in_8(&pixis->spd); i &= 0x07; switch (i) { @@ -442,9 +427,8 @@ unsigned long get_board_ddr_clk(ulong dummy) { u8 i; ulong val = 0; - u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in_8(pixis_base + PIXIS_SPD); + i = in_8(&pixis->spd); i &= 0x38; i >>= 3; diff --git a/board/gaisler/gr_cpci_ax2000/u-boot.lds b/board/gaisler/gr_cpci_ax2000/u-boot.lds index d5d7842..2282682 100644 --- a/board/gaisler/gr_cpci_ax2000/u-boot.lds +++ b/board/gaisler/gr_cpci_ax2000/u-boot.lds @@ -60,7 +60,7 @@ SECTIONS _text = .; *(.start) - cpu/leon3/start.o (.text) + arch/sparc/cpu/leon3/start.o (.text) /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ . = ALIGN(8192); /* PROM CODE, Will be relocated to the end of memory, diff --git a/board/gaisler/gr_ep2s60/u-boot.lds b/board/gaisler/gr_ep2s60/u-boot.lds index 99aa0ad..0ca2651 100644 --- a/board/gaisler/gr_ep2s60/u-boot.lds +++ b/board/gaisler/gr_ep2s60/u-boot.lds @@ -60,7 +60,7 @@ SECTIONS _text = .; *(.start) - cpu/leon3/start.o (.text) + arch/sparc/cpu/leon3/start.o (.text) /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ . = ALIGN(8192); /* PROM CODE, Will be relocated to the end of memory, diff --git a/board/gaisler/gr_xc3s_1500/u-boot.lds b/board/gaisler/gr_xc3s_1500/u-boot.lds index 3b13190..67222ac 100644 --- a/board/gaisler/gr_xc3s_1500/u-boot.lds +++ b/board/gaisler/gr_xc3s_1500/u-boot.lds @@ -60,7 +60,7 @@ SECTIONS _text = .; *(.start) - cpu/leon3/start.o (.text) + arch/sparc/cpu/leon3/start.o (.text) /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ . = ALIGN(8192); /* PROM CODE, Will be relocated to the end of memory, diff --git a/board/gaisler/grsim/u-boot.lds b/board/gaisler/grsim/u-boot.lds index 0fa6627..681fd8d 100644 --- a/board/gaisler/grsim/u-boot.lds +++ b/board/gaisler/grsim/u-boot.lds @@ -59,7 +59,7 @@ SECTIONS _text = .; *(.start) - cpu/leon3/start.o (.text) + arch/sparc/cpu/leon3/start.o (.text) /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ . = ALIGN(8192); /* PROM CODE, Will be relocated to the end of memory, diff --git a/board/gaisler/grsim_leon2/u-boot.lds b/board/gaisler/grsim_leon2/u-boot.lds index c5311a6..a12e7fb 100644 --- a/board/gaisler/grsim_leon2/u-boot.lds +++ b/board/gaisler/grsim_leon2/u-boot.lds @@ -59,7 +59,7 @@ SECTIONS _text = .; *(.start) - cpu/leon2/start.o (.text) + arch/sparc/cpu/leon2/start.o (.text) /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ . = ALIGN(8192); /* PROM CODE, Will be relocated to the end of memory, diff --git a/board/galaxy5200/galaxy5200.c b/board/galaxy5200/galaxy5200.c index 5aa9d3a..d4a2245 100644 --- a/board/galaxy5200/galaxy5200.c +++ b/board/galaxy5200/galaxy5200.c @@ -33,7 +33,7 @@ #include <common.h> #include <mpc5xxx.h> #include <pci.h> -#include <asm-ppc/io.h> +#include <asm/io.h> #ifndef CONFIG_SYS_RAMBOOT static void sdram_start(int hi_addr) diff --git a/board/gdsys/intip/init.S b/board/gdsys/intip/init.S index e205c9d..a8e8b6c 100644 --- a/board/gdsys/intip/init.S +++ b/board/gdsys/intip/init.S @@ -27,7 +27,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/gen860t/ioport.c b/board/gen860t/ioport.c index d8c3006..146573e 100644 --- a/board/gen860t/ioport.c +++ b/board/gen860t/ioport.c @@ -197,7 +197,7 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = { /* * Configure the MPC8XX I/O ports per the ioport configuration table - * (taken from ./cpu/mpc8260/cpu_init.c) + * (taken from ./arch/ppc/cpu/mpc8260/cpu_init.c) */ void config_mpc8xx_ioports (volatile immap_t * immr) { diff --git a/board/gen860t/u-boot-flashenv.lds b/board/gen860t/u-boot-flashenv.lds index 7b83b25..0e12925 100644 --- a/board/gen860t/u-boot-flashenv.lds +++ b/board/gen860t/u-boot-flashenv.lds @@ -55,7 +55,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/gen860t/u-boot.lds b/board/gen860t/u-boot.lds index 8f40b30..d184379 100644 --- a/board/gen860t/u-boot.lds +++ b/board/gen860t/u-boot.lds @@ -54,7 +54,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds index 716efcd..22ada9a 100644 --- a/board/genietv/u-boot.lds +++ b/board/genietv/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/genietv/u-boot.lds.debug b/board/genietv/u-boot.lds.debug index 3568e6d..e5aa625 100644 --- a/board/genietv/u-boot.lds.debug +++ b/board/genietv/u-boot.lds.debug @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/gth/u-boot.lds b/board/gth/u-boot.lds index f6175d9..0e68e14 100644 --- a/board/gth/u-boot.lds +++ b/board/gth/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o(.text) + arch/ppc/cpu/mpc8xx/start.o(.text) *(.text) common/env_embedded.o(.text) *(.got1) diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c index 59873d5..8c3b55a 100644 --- a/board/gth2/gth2.c +++ b/board/gth2/gth2.c @@ -93,7 +93,7 @@ phys_size_t initdram(int board_type) return (SDRAM_SIZE); } -/* In cpu/mips/cpu.c */ +/* In arch/mips/cpu/cpu.c */ void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ); void set_ledcard(u32 value){ diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds index 7b74cb7..23e3e3b 100644 --- a/board/hermes/u-boot.lds +++ b/board/hermes/u-boot.lds @@ -55,13 +55,13 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - cpu/mpc8xx/interrupts.o (.text) - lib_ppc/time.o (.text) - lib_ppc/ticks.o (.text) - lib_ppc/cache.o (.text) - lib_generic/crc32.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/lib/time.o (.text) + arch/ppc/lib/ticks.o (.text) + arch/ppc/lib/cache.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/hermes/u-boot.lds.debug b/board/hermes/u-boot.lds.debug index 3801206..47e3927 100644 --- a/board/hermes/u-boot.lds.debug +++ b/board/hermes/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - lib_ppc/ppcstring.o (.text) - cpu/mpc8xx/interrupts.o (.text) - lib_ppc/time.o (.text) - lib_ppc/ticks.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/lib/ppcstring.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/lib/time.o (.text) + arch/ppc/lib/ticks.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/hmi1001/config.mk b/board/hmi1001/config.mk index 4fe1831..aebf304 100644 --- a/board/hmi1001/config.mk +++ b/board/hmi1001/config.mk @@ -39,4 +39,4 @@ TEXT_BASE = 0xFFF00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds +LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds index 52d66a2..7086ced 100644 --- a/board/hymod/u-boot.lds +++ b/board/hymod/u-boot.lds @@ -55,13 +55,13 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8260/start.o (.text) + arch/ppc/cpu/mpc8260/start.o (.text) /* common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; */ diff --git a/board/hymod/u-boot.lds.debug b/board/hymod/u-boot.lds.debug index a2d940f..57cc305 100644 --- a/board/hymod/u-boot.lds.debug +++ b/board/hymod/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 7524461..47b2195 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -134,7 +134,6 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -#if defined(CONFIG_MPC5200) phys_size_t initdram (int board_type) { ulong dramsize = 0; @@ -258,65 +257,12 @@ phys_size_t initdram (int board_type) return dramsize + dramsize2; } -#elif defined(CONFIG_MGT5100) - -phys_size_t initdram (int board_type) -{ - ulong dramsize = 0; -#ifndef CONFIG_SYS_RAMBOOT - ulong test1, test2; - - /* setup and enable SDRAM chip selects */ - *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; - *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ - __asm__ volatile ("sync"); - - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; - - /* address select register */ - *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL; - __asm__ volatile ("sync"); - - /* find RAM size */ - sdram_start(0); - test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - sdram_start(1); - test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - if (test1 > test2) { - sdram_start(0); - dramsize = test1; - } else { - dramsize = test2; - } - - /* set SDRAM end address according to size */ - *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); - -#else /* CONFIG_SYS_RAMBOOT */ - - /* Retrieve amount of SDRAM available */ - dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); - -#endif /* CONFIG_SYS_RAMBOOT */ - - return dramsize; -} - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif - int checkboard (void) { #if defined (CONFIG_LITE5200B) puts ("Board: Freescale Lite5200B\n"); -#elif defined(CONFIG_MPC5200) +#else puts ("Board: Motorola MPC5200 (IceCube)\n"); -#elif defined(CONFIG_MGT5100) - puts ("Board: Motorola MGT5100 (IceCube)\n"); #endif return 0; } @@ -329,10 +275,6 @@ void flash_preinit(void) * Note that CS_BOOT cannot be cleared when * executing in flash. */ -#if defined(CONFIG_MGT5100) - *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */ -#endif *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ } diff --git a/board/icecube/mt46v16m16-75.h b/board/icecube/mt46v16m16-75.h index 4c0f9a7..eb85740 100644 --- a/board/icecube/mt46v16m16-75.h +++ b/board/icecube/mt46v16m16-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 1 /* is DDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 @@ -31,7 +30,3 @@ #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 - -#else -#error CONFIG_MPC5200 not defined -#endif diff --git a/board/icecube/mt46v32m16.h b/board/icecube/mt46v32m16.h index de2b48b..519bf6d 100644 --- a/board/icecube/mt46v32m16.h +++ b/board/icecube/mt46v32m16.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 1 /* is DDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 @@ -31,7 +30,3 @@ #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 - -#else -#error CONFIG_MPC5200 not defined -#endif diff --git a/board/icecube/mt48lc16m16a2-75.h b/board/icecube/mt48lc16m16a2-75.h index ffdf039..1547725 100644 --- a/board/icecube/mt48lc16m16a2-75.h +++ b/board/icecube/mt48lc16m16a2-75.h @@ -23,21 +23,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/icu862/u-boot.lds b/board/icu862/u-boot.lds index b43be81..d683700 100644 --- a/board/icu862/u-boot.lds +++ b/board/icu862/u-boot.lds @@ -55,14 +55,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) /* - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/icu862/u-boot.lds.debug b/board/icu862/u-boot.lds.debug index 653e0be..b331d5a 100644 --- a/board/icu862/u-boot.lds.debug +++ b/board/icu862/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/idmr/u-boot.lds b/board/idmr/u-boot.lds index 00c1f2a..ca41232 100644 --- a/board/idmr/u-boot.lds +++ b/board/idmr/u-boot.lds @@ -56,11 +56,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mcf52x2/start.o (.text) - lib_m68k/traps.o (.text) - cpu/mcf52x2/interrupts.o (.text) + arch/m68k/cpu/mcf52x2/start.o (.text) + arch/m68k/lib/traps.o (.text) + arch/m68k/cpu/mcf52x2/interrupts.o (.text) common/dlmalloc.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/inka4x0/config.mk b/board/inka4x0/config.mk index fc70efe..761efa1 100644 --- a/board/inka4x0/config.mk +++ b/board/inka4x0/config.mk @@ -39,4 +39,4 @@ TEXT_BASE = 0xFFE00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds +LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/ip04/Makefile b/board/ip04/Makefile new file mode 100644 index 0000000..e7ce304 --- /dev/null +++ b/board/ip04/Makefile @@ -0,0 +1,54 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2010 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/ip04/config.mk b/board/ip04/config.mk new file mode 100644 index 0000000..bc14257 --- /dev/null +++ b/board/ip04/config.mk @@ -0,0 +1,35 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +CFLAGS_lib_generic += -O2 +CFLAGS_lzma += -O2 + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 +LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/ip04/ip04.c b/board/ip04/ip04.c new file mode 100644 index 0000000..c8ae512 --- /dev/null +++ b/board/ip04/ip04.c @@ -0,0 +1,42 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2007 David Rowe, + * (c) 2006 Ivan Danov + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <net.h> +#include <netdev.h> +#include <asm/net.h> + +int checkboard(void) +{ + printf("Board: IP04 IP-PBX\n"); + printf(" http://www.rowetel.com/ucasterisk/ip04.html\n"); + return 0; +} + +#ifdef CONFIG_DRIVER_DM9000 +int board_eth_init(bd_t *bis) +{ + return dm9000_initialize(bis); +} + +int misc_init_r(void) +{ + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(enetaddr); + eth_setenv_enetaddr("ethaddr", enetaddr); + } + + return 0; +} +#endif diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds index a786bf2..d856042 100644 --- a/board/ip860/u-boot.lds +++ b/board/ip860/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - cpu/mpc8xx/interrupts.o (.text) - lib_ppc/time.o (.text) - lib_ppc/ticks.o (.text) + arch/ppc/lib/ppcstring.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/lib/time.o (.text) + arch/ppc/lib/ticks.o (.text) /** . = env_offset; common/env_embedded.o(.text) diff --git a/board/ip860/u-boot.lds.debug b/board/ip860/u-boot.lds.debug index dc2f6e1..dd39b9a 100644 --- a/board/ip860/u-boot.lds.debug +++ b/board/ip860/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - lib_ppc/ppcstring.o (.text) - cpu/mpc8xx/interrupts.o (.text) - lib_ppc/time.o (.text) - lib_ppc/ticks.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/lib/ppcstring.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/lib/time.o (.text) + arch/ppc/lib/ticks.o (.text) /** . = env_offset; common/env_embedded.o(.text) diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds index 8d7ff70..767408b 100644 --- a/board/ivm/u-boot.lds +++ b/board/ivm/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/ivm/u-boot.lds.debug b/board/ivm/u-boot.lds.debug index b5206c5..5ec82f4 100644 --- a/board/ivm/u-boot.lds.debug +++ b/board/ivm/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/jse/jse.c b/board/jse/jse.c index 1849ca4..e4c7b9d 100644 --- a/board/jse/jse.c +++ b/board/jse/jse.c @@ -26,7 +26,7 @@ /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called @@ -85,7 +85,7 @@ int board_pre_init (void) #endif /* - * This function is also called by lib_ppc/board.c:board_init_f (it is + * This function is also called by arch/ppc/lib/board.c:board_init_f (it is * also in the init_sequence array) but later. Many more things are * configured, but we are still running from flash. */ @@ -149,7 +149,7 @@ int checkboard (void) /* **** No more functions called by board_init_f. **** */ /* - * This function is called by lib_ppc/board.c:board_init_r. At this + * This function is called by arch/ppc/lib/board.c:board_init_r. At this * point, basic setup is done, U-Boot has been moved into SDRAM and * PCI has been set up. From here we done late setup. */ diff --git a/board/jse/sdram.c b/board/jse/sdram.c index 88fdd84..a12ebde 100644 --- a/board/jse/sdram.c +++ b/board/jse/sdram.c @@ -27,7 +27,7 @@ /* * this is even after checkboard. It returns the size of the SDRAM * that we have installed. This function is called by board_init_f - * in lib_ppc/board.c to initialize the memory and return what I + * in arch/ppc/lib/board.c to initialize the memory and return what I * found. */ phys_size_t initdram (int board_type) diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c index 6e752c6..967aabd 100644 --- a/board/jupiter/jupiter.c +++ b/board/jupiter/jupiter.c @@ -227,10 +227,6 @@ void flash_preinit(void) * Note that CS_BOOT cannot be cleared when * executing in flash. */ -#if defined(CONFIG_MGT5100) - *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */ -#endif *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ } @@ -248,10 +244,8 @@ void flash_afterinit(ulong size) *(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CONFIG_SYS_BOOTCS_START | size, size); } -#if defined(CONFIG_MPC5200) *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */ *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */ -#endif } int update_flash_size (int flash_size) diff --git a/board/keymile/common/keymile_hdlc_enet.c b/board/keymile/common/keymile_hdlc_enet.c index 2e913ad..ceddaf7 100644 --- a/board/keymile/common/keymile_hdlc_enet.c +++ b/board/keymile/common/keymile_hdlc_enet.c @@ -2,7 +2,7 @@ * (C) Copyright 2008 * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. * - * Based in part on cpu/mpc8260/ether_scc.c. + * Based in part on arch/ppc/cpu/mpc8260/ether_scc.c. * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/keymile/km8xx/km8xx_hdlc_enet.c b/board/keymile/km8xx/km8xx_hdlc_enet.c index 9b93131..543deaf 100644 --- a/board/keymile/km8xx/km8xx_hdlc_enet.c +++ b/board/keymile/km8xx/km8xx_hdlc_enet.c @@ -2,7 +2,7 @@ * (C) Copyright 2008 * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. * - * Based in part on cpu/mpc8xx/scc.c. + * Based in part on arch/ppc/cpu/mpc8xx/scc.c. * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/keymile/km8xx/u-boot.lds b/board/keymile/km8xx/u-boot.lds index a8057f2..19936bd 100644 --- a/board/keymile/km8xx/u-boot.lds +++ b/board/keymile/km8xx/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/keymile/mgcoge/mgcoge_hdlc_enet.c b/board/keymile/mgcoge/mgcoge_hdlc_enet.c index 34f04f5..6b8e7ea 100644 --- a/board/keymile/mgcoge/mgcoge_hdlc_enet.c +++ b/board/keymile/mgcoge/mgcoge_hdlc_enet.c @@ -2,7 +2,7 @@ * (C) Copyright 2008 * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. * - * Based in part on cpu/mpc8260/ether_scc.c. + * Based in part on arch/ppc/cpu/mpc8260/ether_scc.c. * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/korat/init.S b/board/korat/init.S index ea43a1f..c725bbb 100644 --- a/board/korat/init.S +++ b/board/korat/init.S @@ -20,7 +20,7 @@ */ #include <ppc_asm.tmpl> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> #include <config.h> /************************************************************************** diff --git a/board/korat/u-boot-F7FC.lds b/board/korat/u-boot-F7FC.lds index cbad866..e483394 100644 --- a/board/korat/u-boot-F7FC.lds +++ b/board/korat/u-boot-F7FC.lds @@ -33,7 +33,7 @@ SECTIONS .bootpg 0xF7FBF000 : { - cpu/ppc4xx/start.o (.bootpg) + arch/ppc/cpu/ppc4xx/start.o (.bootpg) } = 0xffff /* Read-only sections, merged into text segment: */ @@ -65,7 +65,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) *(.text) *(.got1) diff --git a/board/kup/kup4k/u-boot.lds b/board/kup/kup4k/u-boot.lds index 79b886a..18cecaf 100644 --- a/board/kup/kup4k/u-boot.lds +++ b/board/kup/kup4k/u-boot.lds @@ -55,14 +55,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) /* - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/kup/kup4k/u-boot.lds.debug b/board/kup/kup4k/u-boot.lds.debug index 83fdc15..723f562 100644 --- a/board/kup/kup4k/u-boot.lds.debug +++ b/board/kup/kup4k/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/kup/kup4x/u-boot.lds b/board/kup/kup4x/u-boot.lds index 79b886a..18cecaf 100644 --- a/board/kup/kup4x/u-boot.lds +++ b/board/kup/kup4x/u-boot.lds @@ -55,14 +55,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) /* - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/kup/kup4x/u-boot.lds.debug b/board/kup/kup4x/u-boot.lds.debug index 83fdc15..723f562 100644 --- a/board/kup/kup4x/u-boot.lds.debug +++ b/board/kup/kup4x/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/lantec/u-boot.lds b/board/lantec/u-boot.lds index 854ed68..160f5cf 100644 --- a/board/lantec/u-boot.lds +++ b/board/lantec/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/lantec/u-boot.lds.debug b/board/lantec/u-boot.lds.debug index 3b4799e..172482f 100644 --- a/board/lantec/u-boot.lds.debug +++ b/board/lantec/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/logicpd/imx27lite/imx27lite.c b/board/logicpd/imx27lite/imx27lite.c index 63375d5..4427415 100644 --- a/board/logicpd/imx27lite/imx27lite.c +++ b/board/logicpd/imx27lite/imx27lite.c @@ -29,6 +29,10 @@ DECLARE_GLOBAL_DATA_PTR; int board_init (void) { struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE; +#if defined(CONFIG_SYS_NAND_LARGEPAGE) + struct system_control_regs *sc_regs = + (struct system_control_regs *)IMX_SYSTEM_CTL_BASE; +#endif gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -43,9 +47,20 @@ int board_init (void) ®s->port[PORTC].dr); #endif #ifdef CONFIG_MXC_MMC +#if defined(CONFIG_MAGNESIUM) + mx27_sd1_init_pins(); +#else mx27_sd2_init_pins(); #endif +#endif +#if defined(CONFIG_SYS_NAND_LARGEPAGE) + /* + * set in FMCR NF_FMS Bit(5) to 1 + * (NAND Flash with 2 Kbyte page size) + */ + writel(readl(&sc_regs->fmcr) | (1 << 5), &sc_regs->fmcr); +#endif return 0; } @@ -68,6 +83,7 @@ int dram_init (void) int checkboard(void) { - printf("LogicPD imx27lite\n"); + puts ("Board: "); + puts(CONFIG_BOARDNAME); return 0; } diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c index 387ed2d..6455d1d 100644 --- a/board/logicpd/zoom2/zoom2.c +++ b/board/logicpd/zoom2/zoom2.c @@ -46,7 +46,7 @@ /* * This the the zoom2, board specific, gpmc configuration for the * quad uart on the debug board. The more general gpmc configurations - * are setup at the cpu level in cpu/arm_cortexa8/omap3/mem.c + * are setup at the cpu level in arch/arm/cpu/arm_cortexa8/omap3/mem.c * * The details of the setting of the serial gpmc setup are not available. * The values were provided by another party. diff --git a/board/logicpd/zoom2/zoom2_serial.c b/board/logicpd/zoom2/zoom2_serial.c index ba58e39..cfbad13 100644 --- a/board/logicpd/zoom2/zoom2_serial.c +++ b/board/logicpd/zoom2/zoom2_serial.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * - * This file was adapted from cpu/mpc5xxx/serial.c + * This file was adapted from arch/ppc/cpu/mpc5xxx/serial.c * */ diff --git a/board/lpc2292sodimm/flash.c b/board/lpc2292sodimm/flash.c index a7e175d..fd5389f 100644 --- a/board/lpc2292sodimm/flash.c +++ b/board/lpc2292sodimm/flash.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> * - * Modified to use the routines in cpu/arm720t/lpc2292/flash.c by + * Modified to use the routines in arch/arm/cpu/arm720t/lpc2292/flash.c by * Gary Jennejohn <garyj@denx,de> * * This program is free software; you can redistribute it and/or diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds index cc8ad7d..ff2f566 100644 --- a/board/lwmon/u-boot.lds +++ b/board/lwmon/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/lwmon/u-boot.lds.debug b/board/lwmon/u-boot.lds.debug index 987c4dd..fcf2cbb 100644 --- a/board/lwmon/u-boot.lds.debug +++ b/board/lwmon/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/lwmon5/init.S b/board/lwmon5/init.S index 718cec6..c714fb7 100644 --- a/board/lwmon5/init.S +++ b/board/lwmon5/init.S @@ -25,7 +25,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> /************************************************************************** * TLB TABLE diff --git a/board/m501sk/m501sk.h b/board/m501sk/m501sk.h index 42a6757..51d10f5 100644 --- a/board/m501sk/m501sk.h +++ b/board/m501sk/m501sk.h @@ -1,5 +1,5 @@ /* - * linux/include/asm-arm/arch-at91/hardware.h + * linux/include/asm/arch-at91/hardware.h * * Copyright (C) 2003 SAN People * @@ -21,9 +21,9 @@ #define __M501SK_H #ifndef __ASSEMBLY__ -#include <asm-arm/arch-at91rm9200/AT91RM9200.h> +#include <asm/arch-at91rm9200/AT91RM9200.h> #else -#include <asm-arm/arch-at91rm9200/AT91RM9200_inc.h> +#include <asm/arch-at91rm9200/AT91RM9200_inc.h> #endif #define AT91C_PIO_PA22 ((unsigned int) 1 << 22) /* Pin Controlled by PA22 */ diff --git a/board/matrix_vision/mvsmr/Makefile b/board/matrix_vision/mvsmr/Makefile new file mode 100644 index 0000000..b179e6d --- /dev/null +++ b/board/matrix_vision/mvsmr/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2004-2008 +# Matrix-Vision GmbH, info@matrix-vision.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o fpga.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + @mkimage -T script -C none -n mvSMR_Script -d bootscript bootscript.img + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend diff --git a/board/matrix_vision/mvsmr/bootscript b/board/matrix_vision/mvsmr/bootscript new file mode 100644 index 0000000..02c802c --- /dev/null +++ b/board/matrix_vision/mvsmr/bootscript @@ -0,0 +1,42 @@ +echo +echo "==== running autoscript ====" +echo +setenv boot24 'bootm ${kernel_boot} ${mv_initrd_addr_ram}' +setenv ramkernel 'setenv kernel_boot ${loadaddr}' +setenv flashkernel 'setenv kernel_boot ${mv_kernel_addr}' +setenv cpird 'cp ${mv_initrd_addr} ${mv_initrd_addr_ram} ${mv_initrd_length}' +setenv bootfromflash run flashkernel cpird addcons boot24 +setenv bootfromnet 'tftp ${mv_initrd_addr_ram} ${initrd_name};run ramkernel' +if test ${console} = yes; +then +setenv addcons 'setenv bootargs ${bootargs} console=ttyS${console_nr},${baudrate}N8' +else +setenv addcons 'setenv bootargs ${bootargs} console=tty0' +fi +setenv set_static_ip 'setenv ipaddr ${static_ipaddr}' +setenv set_static_nm 'setenv netmask ${static_netmask}' +setenv set_static_gw 'setenv gatewayip ${static_gateway}' +setenv set_ip 'setenv ip ${ipaddr}::${gatewayip}:${netmask}' +if test ${servicemode} != yes; +then + echo "=== forced flash mode ===" + run set_static_ip set_static_nm set_static_gw set_ip bootfromflash +fi +if test ${autoscript_boot} != no; +then + if test ${netboot} = yes; + then + bootp + if test $? = 0; + then + echo "=== bootp succeeded -> netboot ===" + run set_ip bootfromnet addcons boot24 + else + echo "=== netboot failed ===" + fi + fi + echo "=== bootfromflash ===" + run set_static_ip set_static_nm set_static_gw set_ip bootfromflash +else + echo "=== boot stopped with autoscript_boot no ===" +fi diff --git a/board/matrix_vision/mvsmr/config.mk b/board/matrix_vision/mvsmr/config.mk new file mode 100644 index 0000000..b1da812 --- /dev/null +++ b/board/matrix_vision/mvsmr/config.mk @@ -0,0 +1,31 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +ifndef TEXT_BASE +TEXT_BASE = 0xFF800000 +endif + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board +LDSCRIPT := $(SRCTREE)/board/matrix_vision/mvsmr/u-boot.lds diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c new file mode 100644 index 0000000..6320a69 --- /dev/null +++ b/board/matrix_vision/mvsmr/fpga.c @@ -0,0 +1,129 @@ +/* + * (C) Copyright 2002 + * Rich Ireland, Enterasys Networks, rireland@enterasys.com. + * Keith Outwater, keith_outwater@mvis.com. + * + * (C) Copyright 2010 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <spartan3.h> +#include <command.h> +#include <asm/io.h> +#include "fpga.h" +#include "mvsmr.h" + +Xilinx_Spartan3_Slave_Serial_fns fpga_fns = { + fpga_pre_config_fn, + fpga_pgm_fn, + fpga_clk_fn, + fpga_init_fn, + fpga_done_fn, + fpga_wr_fn, + 0 +}; + +Xilinx_desc spartan3 = { + Xilinx_Spartan2, + slave_serial, + XILINX_XC3S200_SIZE, + (void *) &fpga_fns, + 0, +}; + +DECLARE_GLOBAL_DATA_PTR; + +int mvsmr_init_fpga(void) +{ + fpga_init(); + fpga_add(fpga_xilinx, &spartan3); + + return 1; +} + +int fpga_init_fn(int cookie) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + + if (in_be32(&gpio->simple_ival) & FPGA_CONFIG) + return 0; + + return 1; +} + +int fpga_done_fn(int cookie) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + int result = 0; + + udelay(10); + if (in_be32(&gpio->simple_ival) & FPGA_DONE) + result = 1; + + return result; +} + +int fpga_pgm_fn(int assert, int flush, int cookie) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + + if (!assert) + setbits_8(&gpio->sint_dvo, FPGA_STATUS); + else + clrbits_8(&gpio->sint_dvo, FPGA_STATUS); + + return assert; +} + +int fpga_clk_fn(int assert_clk, int flush, int cookie) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + + if (assert_clk) + setbits_be32(&gpio->simple_dvo, FPGA_CCLK); + else + clrbits_be32(&gpio->simple_dvo, FPGA_CCLK); + + return assert_clk; +} + +int fpga_wr_fn(int assert_write, int flush, int cookie) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + + if (assert_write) + setbits_be32(&gpio->simple_dvo, FPGA_DIN); + else + clrbits_be32(&gpio->simple_dvo, FPGA_DIN); + + return assert_write; +} + +int fpga_pre_config_fn(int cookie) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + + setbits_8(&gpio->sint_dvo, FPGA_STATUS); + + return 0; +} diff --git a/board/freescale/common/pixis.h b/board/matrix_vision/mvsmr/fpga.h index ff62a62..ee690e6 100644 --- a/board/freescale/common/pixis.h +++ b/board/matrix_vision/mvsmr/fpga.h @@ -1,5 +1,6 @@ /* - * Copyright 2006 Freescale Semiconductor + * (C) Copyright 2008 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de * * See file CREDITS for list of people who contributed to this * project. @@ -18,14 +19,14 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA + * */ -extern void pixis_reset(void); -extern int set_px_sysclk(ulong sysclk); -extern int set_px_mpxpll(ulong mpxpll); -extern int set_px_corepll(ulong corepll); -extern void read_from_px_regs(int set); -extern void read_from_px_regs_altbank(int set); -extern void set_altbank(void); -extern void set_px_go(void); -extern void set_px_go_with_watchdog(void); +extern int mvsmr_init_fpga(void); + +extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie); +extern int fpga_init_fn(int cookie); +extern int fpga_clk_fn(int assert_clk, int flush, int cookie); +extern int fpga_wr_fn(int assert_write, int flush, int cookie); +extern int fpga_done_fn(int cookie); +extern int fpga_pre_config_fn(int cookie); diff --git a/board/matrix_vision/mvsmr/mvsmr.c b/board/matrix_vision/mvsmr/mvsmr.c new file mode 100644 index 0000000..69655c4 --- /dev/null +++ b/board/matrix_vision/mvsmr/mvsmr.c @@ -0,0 +1,264 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * (C) Copyright 2005-2010 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc5xxx.h> +#include <malloc.h> +#include <pci.h> +#include <i2c.h> +#include <fpga.h> +#include <environment.h> +#include <netdev.h> +#include <asm/io.h> +#include "fpga.h" +#include "mvsmr.h" +#include "../common/mv_common.h" + +#define SDRAM_DDR 1 +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x715f0f00 +#define SDRAM_CONFIG1 0xd3722930 +#define SDRAM_CONFIG2 0x46770000 + +DECLARE_GLOBAL_DATA_PTR; + +static void sdram_start(int hi_addr) +{ + long hi_bit = hi_addr ? 0x01000000 : 0; + + /* unlock mode register */ + out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000000 | + hi_bit); + + /* precharge all banks */ + out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | + hi_bit); + + /* set mode register: extended mode */ + out_be32((u32 *)MPC5XXX_SDRAM_MODE, SDRAM_EMODE); + + /* set mode register: reset DLL */ + out_be32((u32 *)MPC5XXX_SDRAM_MODE, SDRAM_MODE | 0x04000000); + + /* precharge all banks */ + out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | + hi_bit); + + /* auto refresh */ + out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000004 | + hi_bit); + + /* set mode register */ + out_be32((u32 *)MPC5XXX_SDRAM_MODE, SDRAM_MODE); + + /* normal operation */ + out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | hi_bit); +} + +phys_addr_t initdram(int board_type) +{ + ulong dramsize = 0; + ulong test1, + test2; + + /* setup SDRAM chip selects */ + out_be32((u32 *)MPC5XXX_SDRAM_CS0CFG, 0x0000001e); + + /* setup config registers */ + out_be32((u32 *)MPC5XXX_SDRAM_CONFIG1, SDRAM_CONFIG1); + out_be32((u32 *)MPC5XXX_SDRAM_CONFIG2, SDRAM_CONFIG2); + + /* find RAM size using SDRAM CS0 only */ + sdram_start(0); + test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); + sdram_start(1); + test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); + if (test1 > test2) { + sdram_start(0); + dramsize = test1; + } else + dramsize = test2; + + if (dramsize < (1 << 20)) + dramsize = 0; + + if (dramsize > 0) + out_be32((u32 *)MPC5XXX_SDRAM_CS0CFG, 0x13 + + __builtin_ffs(dramsize >> 20) - 1); + else + out_be32((u32 *)MPC5XXX_SDRAM_CS0CFG, 0); + + return dramsize; +} + +void mvsmr_init_gpio(void) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + struct mpc5xxx_wu_gpio *wu_gpio = + (struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO; + struct mpc5xxx_gpt_0_7 *timers = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT; + + printf("Ports : 0x%08x\n", gpio->port_config); + printf("PORCFG: 0x%08x\n", in_be32((unsigned *)MPC5XXX_CDM_PORCFG)); + + out_be32(&gpio->simple_ddr, SIMPLE_DDR); + out_be32(&gpio->simple_dvo, SIMPLE_DVO); + out_be32(&gpio->simple_ode, SIMPLE_ODE); + out_be32(&gpio->simple_gpioe, SIMPLE_GPIOEN); + + out_8(&gpio->sint_ode, SINT_ODE); + out_8(&gpio->sint_ddr, SINT_DDR); + out_8(&gpio->sint_dvo, SINT_DVO); + out_8(&gpio->sint_inten, SINT_INTEN); + out_be16(&gpio->sint_itype, SINT_ITYPE); + out_8(&gpio->sint_gpioe, SINT_GPIOEN); + + out_8(&wu_gpio->ode, WKUP_ODE); + out_8(&wu_gpio->ddr, WKUP_DIR); + out_8(&wu_gpio->dvo, WKUP_DO); + out_8(&wu_gpio->enable, WKUP_EN); + + out_be32(&timers->gpt0.emsr, 0x00000234); /* OD output high */ + out_be32(&timers->gpt1.emsr, 0x00000234); + out_be32(&timers->gpt2.emsr, 0x00000234); + out_be32(&timers->gpt3.emsr, 0x00000234); + out_be32(&timers->gpt4.emsr, 0x00000234); + out_be32(&timers->gpt5.emsr, 0x00000234); + out_be32(&timers->gpt6.emsr, 0x00000024); /* push-pull output low */ + out_be32(&timers->gpt7.emsr, 0x00000024); +} + +int misc_init_r(void) +{ + char *s = getenv("reset_env"); + + if (s) { + printf(" === FACTORY RESET ===\n"); + mv_reset_environment(); + saveenv(); + } + + return -1; +} + +void mvsmr_get_dbg_present(void) +{ + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; + struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)MPC5XXX_PSC1; + + if (in_be32(&gpio->simple_ival) & COP_PRESENT) { + setenv("dbg_present", "no\0"); + setenv("bootstopkey", "abcdefghijklmnopqrstuvwxyz\0"); + } else { + setenv("dbg_present", "yes\0"); + setenv("bootstopkey", "s\0"); + setbits_8(&psc->command, PSC_RX_ENABLE); + } +} + +void mvsmr_get_service_mode(void) +{ + struct mpc5xxx_wu_gpio *wu_gpio = + (struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO; + + if (in_8(&wu_gpio->ival) & SERVICE_MODE) + setenv("servicemode", "no\0"); + else + setenv("servicemode", "yes\0"); +} + +int mvsmr_get_mac(void) +{ + unsigned char mac[6]; + struct mpc5xxx_wu_gpio *wu_gpio = + (struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO; + + if (in_8(&wu_gpio->ival) & LAN_PRSNT) { + setenv("lan_present", "no\0"); + return -1; + } else + setenv("lan_present", "yes\0"); + + i2c_read(0x50, 0, 1, mac, 6); + + eth_setenv_enetaddr("ethaddr", mac); + + return 0; +} + +int checkboard(void) +{ + mvsmr_init_gpio(); + printf("Board: Matrix Vision mvSMR\n"); + + return 0; +} + +void flash_preinit(void) +{ + /* + * Now, when we are in RAM, enable flash write + * access for detection process. + * Note that CS_BOOT cannot be cleared when + * executing in flash. + */ + clrbits_be32((u32 *)MPC5XXX_BOOTCS_CFG, 0x1); +} + +void flash_afterinit(ulong size) +{ + out_be32((u32 *)MPC5XXX_BOOTCS_START, + START_REG(CONFIG_SYS_BOOTCS_START | size)); + out_be32((u32 *)MPC5XXX_CS0_START, + START_REG(CONFIG_SYS_BOOTCS_START | size)); + out_be32((u32 *)MPC5XXX_BOOTCS_STOP, + STOP_REG(CONFIG_SYS_BOOTCS_START | size, size)); + out_be32((u32 *)MPC5XXX_CS0_STOP, + STOP_REG(CONFIG_SYS_BOOTCS_START | size, size)); +} + +struct pci_controller hose; + +void pci_init_board(void) +{ + mvsmr_get_dbg_present(); + mvsmr_get_service_mode(); + mvsmr_init_fpga(); + mv_load_fpga(); + pci_mpc5xxx_init(&hose); +} + +int board_eth_init(bd_t *bis) +{ + if (!mvsmr_get_mac()) + return cpu_eth_init(bis); + + return pci_eth_init(bis); +} diff --git a/board/matrix_vision/mvsmr/mvsmr.h b/board/matrix_vision/mvsmr/mvsmr.h new file mode 100644 index 0000000..b8320f1 --- /dev/null +++ b/board/matrix_vision/mvsmr/mvsmr.h @@ -0,0 +1,43 @@ +#include <pci.h> + +extern void pci_mpc5xxx_init(struct pci_controller *); + +#define FPGA_DIN MPC5XXX_GPIO_SIMPLE_PSC3_0 +#define FPGA_CCLK MPC5XXX_GPIO_SIMPLE_PSC3_1 +#define FPGA_DONE MPC5XXX_GPIO_SIMPLE_PSC3_2 +#define FPGA_CONFIG MPC5XXX_GPIO_SIMPLE_PSC3_3 +#define FPGA_STATUS MPC5XXX_GPIO_SINT_PSC3_4 +#define S_FPGA_DIN MPC5XXX_GPIO_SINT_PSC3_5 +#define S_FPGA_CCLK MPC5XXX_GPIO_SIMPLE_PSC3_6 +#define S_FPGA_DONE MPC5XXX_GPIO_SIMPLE_PSC3_7 +#define S_FPGA_CONFIG MPC5XXX_GPIO_SINT_PSC3_8 +#define S_FPGA_STATUS MPC5XXX_GPIO_WKUP_PSC3_9 + +#define MAN_RST MPC5XXX_GPIO_WKUP_PSC6_0 +#define WD_TS MPC5XXX_GPIO_WKUP_PSC6_1 +#define WD_WDI MPC5XXX_GPIO_SIMPLE_PSC6_2 +#define COP_PRESENT MPC5XXX_GPIO_SIMPLE_PSC6_3 +#define SERVICE_MODE MPC5XXX_GPIO_WKUP_6 +#define FLASH_RBY MPC5XXX_GPIO_WKUP_7 +#define UART_EN1 MPC5XXX_GPIO_WKUP_PSC1_4 +#define LAN_PRSNT MPC5XXX_GPIO_WKUP_PSC2_4 + +#define SIMPLE_DDR (FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI |\ + S_FPGA_CCLK) +#define SIMPLE_DVO (FPGA_CONFIG) +#define SIMPLE_ODE (FPGA_CONFIG) +#define SIMPLE_GPIOEN (FPGA_DIN | FPGA_CCLK | FPGA_DONE | FPGA_CONFIG |\ + S_FPGA_CCLK | S_FPGA_DONE | WD_WDI | COP_PRESENT) + +#define SINT_ODE 0x1 +#define SINT_DDR 0x3 +#define SINT_DVO 0x1 +#define SINT_INTEN 0 +#define SINT_ITYPE 0 +#define SINT_GPIOEN (FPGA_STATUS | S_FPGA_DIN | S_FPGA_CONFIG) + +#define WKUP_ODE (MAN_RST | S_FPGA_STATUS) +#define WKUP_DIR (MAN_RST | WD_TS | S_FPGA_STATUS) +#define WKUP_DO (MAN_RST | WD_TS | S_FPGA_STATUS) +#define WKUP_EN (MAN_RST | WD_TS | S_FPGA_STATUS | SERVICE_MODE |\ + FLASH_RBY | UART_EN1 | LAN_PRSNT) diff --git a/board/xilinx/ml300/u-boot.lds b/board/matrix_vision/mvsmr/u-boot.lds index b989940..cfbb6ef 100644 --- a/board/xilinx/ml300/u-boot.lds +++ b/board/matrix_vision/mvsmr/u-boot.lds @@ -1,6 +1,8 @@ /* - * (C) Copyright 2000 + * (C) Copyright 2003-2004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * (C) Copyright 2010 + * André Schwarz, Matrix Vision GmbH, as@matrix-vision.de * * See file CREDITS for list of people who contributed to this * project. @@ -22,9 +24,7 @@ */ OUTPUT_ARCH(powerpc) -ENTRY(_start) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ + SECTIONS { /* Read-only sections, merged into text segment: */ @@ -53,33 +53,25 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ -/* - cpu/ppc4xx/start.o (.text) - board/xilinx/ml300/init.o (.text) - cpu/ppc4xx/kgdb.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - drivers/net/4xx_enet.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) -*/ -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/ + /* WARNING - the following is hand-optimized to fit within */ + /* the first two sectors (=8KB) of our S29GL flash chip */ + cpu/mpc5xxx/start.o (.text) + cpu/mpc5xxx/traps.o (.text) + lib_generic/crc32.o (.text) + lib_ppc/cache.o (.text) + lib_ppc/time.o (.text) + + /* This is only needed to force failure if size of above code will ever */ + /* increase and grow into reserved space. */ + . = ALIGN(0x2000); /* location counter has to be 0x4000 now */ + . += 0x4000; /* ->0x8000, i.e. move to env_offset */ + + . = env_offset; /* ld error as soon as above ALIGN misplaces lc */ + common/env_embedded.o (.ppcenv) *(.text) *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { + . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } @@ -88,7 +80,7 @@ SECTIONS .dtors : { *(.dtors) } /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; + . = (. + 0x0FFF) & 0xFFFFF000; _erotext = .; PROVIDE (erotext = .); .reloc : @@ -99,8 +91,8 @@ SECTIONS _FIXUP_TABLE_ = .; *(.fixup) } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; .data : { @@ -125,11 +117,11 @@ SECTIONS __ex_table : { *(__ex_table) } __stop___ex_table = .; - . = ALIGN(256); + . = ALIGN(4096); __init_begin = .; .text.init : { *(.text.init) } .data.init : { *(.data.init) } - . = ALIGN(256); + . = ALIGN(4096); __init_end = .; __bss_start = .; diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds index dc3e580..3572f1a 100644 --- a/board/mbx8xx/u-boot.lds +++ b/board/mbx8xx/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) diff --git a/board/mbx8xx/u-boot.lds.debug b/board/mbx8xx/u-boot.lds.debug index 0a3b958..61c0d68 100644 --- a/board/mbx8xx/u-boot.lds.debug +++ b/board/mbx8xx/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/mcc200/mt46v16m16-75.h b/board/mcc200/mt46v16m16-75.h index f650faa..423febe 100644 --- a/board/mcc200/mt46v16m16-75.h +++ b/board/mcc200/mt46v16m16-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 1 /* is DDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 @@ -31,7 +30,3 @@ #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 - -#else -#error CONFIG_MPC5200 not defined -#endif diff --git a/board/mcc200/mt48lc16m16a2-75.h b/board/mcc200/mt48lc16m16a2-75.h index ffdf039..1547725 100644 --- a/board/mcc200/mt48lc16m16a2-75.h +++ b/board/mcc200/mt48lc16m16a2-75.h @@ -23,21 +23,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/mcc200/mt48lc16m32s2-75.h b/board/mcc200/mt48lc16m32s2-75.h index ffdf039..1547725 100644 --- a/board/mcc200/mt48lc16m32s2-75.h +++ b/board/mcc200/mt48lc16m32s2-75.h @@ -23,21 +23,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index 0dcacb9..cc0f137 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -31,7 +31,7 @@ #include <atmel_lcdc.h> #include <lcd.h> -#include "../../../cpu/at32ap/hsmc3.h" +#include "../../../arch/avr32/cpu/hsmc3.h" #if defined(CONFIG_LCD) /* 480x272x16 @ 72 Hz */ diff --git a/board/ml2/u-boot.lds b/board/ml2/u-boot.lds index 8fea3be..e382283 100644 --- a/board/ml2/u-boot.lds +++ b/board/ml2/u-boot.lds @@ -55,18 +55,18 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) board/ml2/init.o (.text) - cpu/ppc4xx/kgdb.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) + arch/ppc/cpu/ppc4xx/kgdb.o (.text) + arch/ppc/cpu/ppc4xx/traps.o (.text) + arch/ppc/cpu/ppc4xx/interrupts.o (.text) + arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) + arch/ppc/cpu/ppc4xx/cpu_init.o (.text) + arch/ppc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) /* . = env_offset;*/ /* common/env_embedded.o(.text)*/ diff --git a/board/ml2/u-boot.lds.debug b/board/ml2/u-boot.lds.debug index 970628d..09c0191 100644 --- a/board/ml2/u-boot.lds.debug +++ b/board/ml2/u-boot.lds.debug @@ -57,9 +57,9 @@ SECTIONS mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds index 5100542..ed5492d 100644 --- a/board/mousse/u-boot.lds +++ b/board/mousse/u-boot.lds @@ -52,12 +52,12 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc824x/start.o (.text) - lib_ppc/board.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/cpu/mpc824x/start.o (.text) + arch/ppc/lib/board.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) *(.got1) . = ALIGN(16); diff --git a/board/mousse/u-boot.lds.ram b/board/mousse/u-boot.lds.ram index d048e52..d316948 100644 --- a/board/mousse/u-boot.lds.ram +++ b/board/mousse/u-boot.lds.ram @@ -37,7 +37,7 @@ SECTIONS PROVIDE(_f_init_rom = .); .init : { - cpu/mpc824x/start.o (.text) + arch/ppc/cpu/mpc824x/start.o (.text) *(.init) } > ram _init_size = SIZEOF(.init); diff --git a/board/mousse/u-boot.lds.rom b/board/mousse/u-boot.lds.rom index f79c39f..2721fdc 100644 --- a/board/mousse/u-boot.lds.rom +++ b/board/mousse/u-boot.lds.rom @@ -52,12 +52,12 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc824x/start.o (.text) + arch/ppc/cpu/mpc824x/start.o (.text) common/board.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o (.text) diff --git a/board/mpl/pip405/u-boot.lds.debug b/board/mpl/pip405/u-boot.lds.debug index 970628d..09c0191 100644 --- a/board/mpl/pip405/u-boot.lds.debug +++ b/board/mpl/pip405/u-boot.lds.debug @@ -57,9 +57,9 @@ SECTIONS mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/mucmc52/config.mk b/board/mucmc52/config.mk index 90d9ce2..4e9ee73 100644 --- a/board/mucmc52/config.mk +++ b/board/mucmc52/config.mk @@ -42,4 +42,4 @@ TEXT_BASE = 0xFFF00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot.lds diff --git a/board/munices/mt48lc16m16a2-75.h b/board/munices/mt48lc16m16a2-75.h index ffdf039..1547725 100644 --- a/board/munices/mt48lc16m16a2-75.h +++ b/board/munices/mt48lc16m16a2-75.h @@ -23,21 +23,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/munices/u-boot.lds b/board/munices/u-boot.lds index 8db7f26..2cd6d3c 100644 --- a/board/munices/u-boot.lds +++ b/board/munices/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc5xxx/start.o (.text) + arch/ppc/cpu/mpc5xxx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/nc650/u-boot.lds b/board/nc650/u-boot.lds index 21fed62..90ca165 100644 --- a/board/nc650/u-boot.lds +++ b/board/nc650/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/nc650/u-boot.lds.debug b/board/nc650/u-boot.lds.debug index 5f8dc9d..1405b17 100644 --- a/board/nc650/u-boot.lds.debug +++ b/board/nc650/u-boot.lds.debug @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/netphone/u-boot.lds b/board/netphone/u-boot.lds index d64274b..d6e2404 100644 --- a/board/netphone/u-boot.lds +++ b/board/netphone/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netphone/u-boot.lds.debug b/board/netphone/u-boot.lds.debug index 4ef16f1..ec479b1 100644 --- a/board/netphone/u-boot.lds.debug +++ b/board/netphone/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c index 8efbc23..1c99405 100644 --- a/board/netstal/hcu4/hcu4.c +++ b/board/netstal/hcu4/hcu4.c @@ -22,7 +22,7 @@ #include <ppc4xx.h> #include <asm/processor.h> #include <asm/io.h> -#include <asm-ppc/u-boot.h> +#include <asm/u-boot.h> #include "../common/nm.h" DECLARE_GLOBAL_DATA_PTR; @@ -34,7 +34,7 @@ DECLARE_GLOBAL_DATA_PTR; /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called diff --git a/board/netstal/hcu5/README.txt b/board/netstal/hcu5/README.txt index f649876..0be5192 100644 --- a/board/netstal/hcu5/README.txt +++ b/board/netstal/hcu5/README.txt @@ -83,11 +83,11 @@ System-LEDs ??? (Analog zu HCU4 ???) Startup sequence ---------------- -(cpu/ppc4xx/resetvec.S) +(arch/ppc/cpu/ppc4xx/resetvec.S) depending on configs option call _start_440 _start_pci oder _start -(cpu/ppc4xx/start.S) +(arch/ppc/cpu/ppc4xx/start.S) _start_440: initialize register like @@ -109,7 +109,7 @@ _start: call cpu_init_f /* run low-level CPU init code (from Flash) */ call cpu_init_f - board_init_f: (lib_ppc\board.c) + board_init_f: (arch/ppc/lib\board.c) init_sequence defines a list of function to be called board_early_init_f: (board/netstal/hcu5/hcu5.c) We are using Bootstrap-Option A @@ -136,18 +136,18 @@ _start: * - board info struct Save local variables to board info struct call relocate_code() does not return - relocate_code: (cpu/ppc4xx/start.S) + relocate_code: (arch/ppc/cpu/ppc4xx/start.S) ------------------------------------------------------- From now on our copy is in RAM and we will run from there, starting with board_init_r ------------------------------------------------------- - board_init_r: (lib_ppc\board.c) + board_init_r: (arch/ppc/lib\board.c) setup bd function pointers trap_init flash_init: (board/netstal/hcu5/flash.c) /* setup for u-boot erase, update */ setup bd flash info - cpu_init_r: (cpu/ppc4xx/cpu_init.c) + cpu_init_r: (arch/ppc/cpu/ppc4xx/cpu_init.c) peripheral chip select in using defines like CONFIG_SYS_EBC_PB0A, CONFIG_SYS_EBC_PB0C from hcu5.h mem_malloc_init @@ -161,8 +161,8 @@ From now on our copy is in RAM and we will run from there, Most of the HW specific code for the HCU5 may be found in include/configs/hcu5.h board/netstal/hcu5/* -cpu/ppc4xx/* -lib_ppc/* +arch/ppc/cpu/ppc4xx/* +arch/ppc/lib/* include/ppc440.h Drivers for serial etc are found under drivers/ diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c index c545cc0..90433fe 100644 --- a/board/netstal/hcu5/hcu5.c +++ b/board/netstal/hcu5/hcu5.c @@ -49,7 +49,7 @@ extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c index c66ab97..87bc45ed 100644 --- a/board/netstal/mcu25/mcu25.c +++ b/board/netstal/mcu25/mcu25.c @@ -22,7 +22,7 @@ #include <ppc4xx.h> #include <asm/processor.h> #include <asm/io.h> -#include <asm-ppc/u-boot.h> +#include <asm/u-boot.h> #include "../common/nm.h" DECLARE_GLOBAL_DATA_PTR; @@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR; /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called diff --git a/board/netstar/Makefile b/board/netstar/Makefile index c435762..5773c13 100644 --- a/board/netstar/Makefile +++ b/board/netstar/Makefile @@ -72,7 +72,7 @@ $(obj)crcit: $(obj)crcit.o $(obj)crc32.o $(obj)crcit.o: crcit.c $(HOSTCC) $(HOSTCFLAGS) -o $@ -c $< -$(obj)crc32.o: $(SRCTREE)/lib_generic/crc32.c +$(obj)crc32.o: $(SRCTREE)/lib/crc32.c $(HOSTCC) $(HOSTCFLAGS) -DUSE_HOSTCC -I$(TOPDIR)/include \ -o $@ -c $< diff --git a/board/netta/u-boot.lds b/board/netta/u-boot.lds index 860c887..c4df378 100644 --- a/board/netta/u-boot.lds +++ b/board/netta/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netta/u-boot.lds.debug b/board/netta/u-boot.lds.debug index 4ef16f1..ec479b1 100644 --- a/board/netta/u-boot.lds.debug +++ b/board/netta/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/netta2/u-boot.lds b/board/netta2/u-boot.lds index 860c887..c4df378 100644 --- a/board/netta2/u-boot.lds +++ b/board/netta2/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netta2/u-boot.lds.debug b/board/netta2/u-boot.lds.debug index 4ef16f1..ec479b1 100644 --- a/board/netta2/u-boot.lds.debug +++ b/board/netta2/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds index a7d290a..6683361 100644 --- a/board/netvia/u-boot.lds +++ b/board/netvia/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netvia/u-boot.lds.debug b/board/netvia/u-boot.lds.debug index c3c99b3..cef1a42 100644 --- a/board/netvia/u-boot.lds.debug +++ b/board/netvia/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds index 5c847fb..dc370ea 100644 --- a/board/nx823/u-boot.lds +++ b/board/nx823/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) diff --git a/board/nx823/u-boot.lds.debug b/board/nx823/u-boot.lds.debug index ad36953..e62f6be 100644 --- a/board/nx823/u-boot.lds.debug +++ b/board/nx823/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c index 773e446..2510ddf 100644 --- a/board/pb1x00/pb1x00.c +++ b/board/pb1x00/pb1x00.c @@ -37,7 +37,7 @@ phys_size_t initdram(int board_type) #define BCSR_PCMCIA_PC0DRVEN 0x0010 #define BCSR_PCMCIA_PC0RST 0x0080 -/* In cpu/mips/cpu.c */ +/* In arch/mips/cpu/cpu.c */ void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ); int checkboard (void) diff --git a/board/pcippc2/u-boot.lds b/board/pcippc2/u-boot.lds index d11bb05..b2be328 100644 --- a/board/pcippc2/u-boot.lds +++ b/board/pcippc2/u-boot.lds @@ -59,7 +59,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index ce1e616..bed385c 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -148,7 +148,7 @@ int board_early_init_f(void) mtdcr(EBC0_CFGDATA, reg | 0x04000000); /* Set ATC */ /*-------------------------------------------------------------------- - * GPIO's are alreay setup in cpu/ppc4xx/cpu_init.c + * GPIO's are alreay setup in arch/ppc/cpu/ppc4xx/cpu_init.c * via define from board config file. *-------------------------------------------------------------------*/ diff --git a/board/phytec/pcm030/pcm030.c b/board/phytec/pcm030/pcm030.c index 416d307..77ce389 100644 --- a/board/phytec/pcm030/pcm030.c +++ b/board/phytec/pcm030/pcm030.c @@ -30,7 +30,7 @@ #include <common.h> #include <mpc5xxx.h> #include <pci.h> -#include <asm-ppc/io.h> +#include <asm/io.h> #include "mt46v32m16-75.h" diff --git a/board/pleb2/pleb2.c b/board/pleb2/pleb2.c index dc6fac4..97c37ea 100644 --- a/board/pleb2/pleb2.c +++ b/board/pleb2/pleb2.c @@ -26,7 +26,7 @@ */ #include <common.h> -#include <asm-arm/mach-types.h> +#include <asm/mach-types.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/pm520/mt46v16m16-75.h b/board/pm520/mt46v16m16-75.h index f650faa..423febe 100644 --- a/board/pm520/mt46v16m16-75.h +++ b/board/pm520/mt46v16m16-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 1 /* is DDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 @@ -31,7 +30,3 @@ #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 - -#else -#error CONFIG_MPC5200 not defined -#endif diff --git a/board/pm520/mt48lc16m16a2-75.h b/board/pm520/mt48lc16m16a2-75.h index ffdf039..1547725 100644 --- a/board/pm520/mt48lc16m16a2-75.h +++ b/board/pm520/mt48lc16m16a2-75.h @@ -23,21 +23,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c index 9da1041..d691434 100644 --- a/board/pm520/pm520.c +++ b/board/pm520/pm520.c @@ -84,7 +84,6 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -#if defined(CONFIG_MPC5200) phys_size_t initdram (int board_type) { ulong dramsize = 0; @@ -186,64 +185,9 @@ phys_size_t initdram (int board_type) return dramsize + dramsize2; } -#elif defined(CONFIG_MGT5100) - -phys_size_t initdram (int board_type) -{ - ulong dramsize = 0; -#ifndef CONFIG_SYS_RAMBOOT - ulong test1, test2; - - /* setup and enable SDRAM chip selects */ - *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; - *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ - __asm__ volatile ("sync"); - - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; - - /* address select register */ - *(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL; - __asm__ volatile ("sync"); - - /* find RAM size */ - sdram_start(0); - test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - sdram_start(1); - test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - if (test1 > test2) { - sdram_start(0); - dramsize = test1; - } else { - dramsize = test2; - } - - /* set SDRAM end address according to size */ - *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); - -#else /* CONFIG_SYS_RAMBOOT */ - - /* Retrieve amount of SDRAM available */ - dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); - -#endif /* CONFIG_SYS_RAMBOOT */ - - return dramsize; -} - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif - int checkboard (void) { -#if defined(CONFIG_MPC5200) puts ("Board: MicroSys PM520 \n"); -#elif defined(CONFIG_MGT5100) - puts ("Board: MicroSys PM510 \n"); -#endif return 0; } @@ -255,10 +199,6 @@ void flash_preinit(void) * Note that CS_BOOT cannot be cleared when * executing in flash. */ -#if defined(CONFIG_MGT5100) - *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */ -#endif *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ } diff --git a/board/ppmc7xx/u-boot.lds b/board/ppmc7xx/u-boot.lds index 30e8972..aae1057 100644 --- a/board/ppmc7xx/u-boot.lds +++ b/board/ppmc7xx/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/prodrive/alpr/fpga.c b/board/prodrive/alpr/fpga.c index 7571cd9..f3bc1fa 100644 --- a/board/prodrive/alpr/fpga.c +++ b/board/prodrive/alpr/fpga.c @@ -30,7 +30,7 @@ #include <altera.h> #include <ACEX1K.h> #include <command.h> -#include <asm-ppc/processor.h> +#include <asm/processor.h> #include <ppc440.h> #include "fpga.h" diff --git a/board/prodrive/p3mx/u-boot.lds b/board/prodrive/p3mx/u-boot.lds index d021331..6dff003 100644 --- a/board/prodrive/p3mx/u-boot.lds +++ b/board/prodrive/p3mx/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/74xx_7xx/start.o (.text) + arch/ppc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/psyent/common/AMDLV065D.c b/board/psyent/common/AMDLV065D.c index 0fcf354..72b0a9f 100644 --- a/board/psyent/common/AMDLV065D.c +++ b/board/psyent/common/AMDLV065D.c @@ -122,12 +122,12 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr2 = (unsigned char *) info->start[sect]; - writeb (addr, 0xaa); - writeb (addr, 0x55); - writeb (addr, 0x80); - writeb (addr, 0xaa); - writeb (addr, 0x55); - writeb (addr2, 0x30); + writeb (0xaa, addr); + writeb (0x55, addr); + writeb (0x80, addr); + writeb (0xaa, addr); + writeb (0x55, addr); + writeb (0x30, addr2); /* Now just wait for 0xff & provide some user * feedback while we wait. */ @@ -169,9 +169,9 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) return (2); } - writeb (cmd, 0xaa); - writeb (cmd, 0x55); - writeb (cmd, 0xa0); + writeb (0xaa, cmd); + writeb (0x55, cmd); + writeb (0xa0, cmd); writeb (dst, b); /* Verify write */ diff --git a/board/psyent/pci5441/u-boot.lds b/board/psyent/pci5441/u-boot.lds index b2d88a5..f155800 100644 --- a/board/psyent/pci5441/u-boot.lds +++ b/board/psyent/pci5441/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios2/start.o (.text) + arch/nios/cpu2/start.o (.text) *(.text) *(.text.*) *(.gnu.linkonce.t*) diff --git a/board/psyent/pk1c20/led.c b/board/psyent/pk1c20/led.c index e5e7705..d019735 100644 --- a/board/psyent/pk1c20/led.c +++ b/board/psyent/pk1c20/led.c @@ -39,7 +39,7 @@ void __led_init (led_id_t mask, int state) val &= ~mask; else val |= mask; - writel (&pio->data, val); + writel (val, &pio->data); } void __led_set (led_id_t mask, int state) @@ -50,7 +50,7 @@ void __led_set (led_id_t mask, int state) val &= ~mask; else val |= mask; - writel (&pio->data, val); + writel (val, &pio->data); } void __led_toggle (led_id_t mask) @@ -58,5 +58,5 @@ void __led_toggle (led_id_t mask) nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; val ^= mask; - writel (&pio->data, val); + writel (val, &pio->data); } diff --git a/board/psyent/pk1c20/u-boot.lds b/board/psyent/pk1c20/u-boot.lds index b2d88a5..f155800 100644 --- a/board/psyent/pk1c20/u-boot.lds +++ b/board/psyent/pk1c20/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios2/start.o (.text) + arch/nios/cpu2/start.o (.text) *(.text) *(.text.*) *(.gnu.linkonce.t*) diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds index 04a641a..1881e65 100644 --- a/board/purple/u-boot.lds +++ b/board/purple/u-boot.lds @@ -34,13 +34,13 @@ SECTIONS . = ALIGN(4); .text : { - cpu/mips/start.o (.text) + arch/mips/cpu/start.o (.text) board/purple/lowlevel_init.o (.text) - cpu/mips/cache.o (.text) + arch/mips/cpu/cache.o (.text) common/main.o (.text) common/dlmalloc.o (.text) common/cmd_boot.o (.text) - lib_generic/zlib.o (.text) + lib/zlib.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/quantum/u-boot.lds b/board/quantum/u-boot.lds index 47247ec..f7de95d 100644 --- a/board/quantum/u-boot.lds +++ b/board/quantum/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) /* XXX ? . = env_offset; */ diff --git a/board/quantum/u-boot.lds.debug b/board/quantum/u-boot.lds.debug index ec01fe2..a2b7bc7 100644 --- a/board/quantum/u-boot.lds.debug +++ b/board/quantum/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/r360mpi/u-boot.lds b/board/r360mpi/u-boot.lds index 9089f7d..4fc18fc 100644 --- a/board/r360mpi/u-boot.lds +++ b/board/r360mpi/u-boot.lds @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/cpu_init.o (.text) - cpu/mpc8xx/interrupts.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/cpu_init.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) /*** . = env_offset; common/env_embedded.o (.text) diff --git a/board/rbc823/u-boot.lds b/board/rbc823/u-boot.lds index e0ea600..2161501 100644 --- a/board/rbc823/u-boot.lds +++ b/board/rbc823/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/rmu/u-boot.lds b/board/rmu/u-boot.lds index 47247ec..f7de95d 100644 --- a/board/rmu/u-boot.lds +++ b/board/rmu/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) /* XXX ? . = env_offset; */ diff --git a/board/rmu/u-boot.lds.debug b/board/rmu/u-boot.lds.debug index ec01fe2..a2b7bc7 100644 --- a/board/rmu/u-boot.lds.debug +++ b/board/rmu/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/ronetix/pm9261/led.c b/board/ronetix/pm9261/led.c index 396c3e7..ff21ce6 100644 --- a/board/ronetix/pm9261/led.c +++ b/board/ronetix/pm9261/led.c @@ -26,19 +26,21 @@ #include <common.h> #include <asm/arch/at91sam9261.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> #include <asm/arch/io.h> void coloured_LED_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + writel(1 << AT91SAM9261_ID_PIOC, &pmc->pcer); - at91_set_gpio_output(CONFIG_RED_LED, 1); - at91_set_gpio_output(CONFIG_GREEN_LED, 1); - at91_set_gpio_output(CONFIG_YELLOW_LED, 1); + at91_set_pio_output(CONFIG_RED_LED, 1); + at91_set_pio_output(CONFIG_GREEN_LED, 1); + at91_set_pio_output(CONFIG_YELLOW_LED, 1); - at91_set_gpio_value(CONFIG_RED_LED, 0); - at91_set_gpio_value(CONFIG_GREEN_LED, 1); - at91_set_gpio_value(CONFIG_YELLOW_LED, 1); + at91_set_pio_value(CONFIG_RED_LED, 0); + at91_set_pio_value(CONFIG_GREEN_LED, 1); + at91_set_pio_value(CONFIG_YELLOW_LED, 1); } diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index 8662339..53d8c48 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -27,13 +27,14 @@ #include <common.h> #include <asm/sizes.h> #include <asm/arch/at91sam9261.h> -#include <asm/arch/at91sam9261_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> +#include <asm/arch/at91_matrix.h> +#include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> -#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> #include <asm/arch/io.h> #include <asm/arch/hardware.h> #include <lcd.h> @@ -55,39 +56,48 @@ DECLARE_GLOBAL_DATA_PTR; static void pm9261_nand_hw_init(void) { unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; + at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; /* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa); /* Configure SMC CS3 for NAND/SmartMedia */ - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); + + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 - AT91_SMC_DBW_16 | + AT91_SMC_MODE_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ - AT91_SMC_DBW_8 | + AT91_SMC_MODE_DBW_8 | #endif - AT91_SMC_TDF_(2)); + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); + + writel(1 << AT91SAM9261_ID_PIOA | + 1 << AT91SAM9261_ID_PIOC, + &pmc->pcer); /* Configure RDY/BSY */ - at91_set_gpio_input(AT91_PIN_PA16, 1); + at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1); /* Enable NandFlash */ - at91_set_gpio_output(AT91_PIN_PC14, 1); + at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); - at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ - at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* NANDOE */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* NANDWE */ } #endif @@ -95,23 +105,30 @@ static void pm9261_nand_hw_init(void) #ifdef CONFIG_DRIVER_DM9000 static void pm9261_dm9000_hw_init(void) { + at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Configure SMC CS2 for DM9000 */ - at91_sys_write(AT91_SMC_SETUP(2), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(2), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); - at91_sys_write(AT91_SMC_CYCLE(2), - AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); - at91_sys_write(AT91_SMC_MODE(2), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | - AT91_SMC_TDF_(1)); + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[2].setup); + + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), + &smc->cs[2].pulse); + + writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), + &smc->cs[2].cycle); + + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | + AT91_SMC_MODE_TDF_CYCLE(1), + &smc->cs[2].mode); /* Configure Interrupt pin as input, no pull-up */ - at91_set_gpio_input(AT91_PIN_PA24, 0); + writel(1 << AT91SAM9261_ID_PIOA, &pmc->pcer); + at91_set_pio_input(AT91_PIO_PORTA, 24, 0); } #endif @@ -135,40 +152,42 @@ vidinfo_t panel_info = { void lcd_enable(void) { - at91_set_gpio_value(AT91_PIN_PA22, 0); /* power up */ + at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power up */ } void lcd_disable(void) { - at91_set_gpio_value(AT91_PIN_PA22, 1); /* power down */ + at91_set_pio_value(AT91_PIO_PORTA, 22, 1); /* power down */ } static void pm9261_lcd_hw_init(void) { - at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ - at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ - at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ - at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ - at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ - at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ - at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ - at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ - at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ - at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ - at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ - at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ - at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ - at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ - at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ - at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ - at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ - at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ - at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ - at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ - at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ - at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ - - at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + + at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */ + at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */ + at91_set_a_periph(AT91_PIO_PORTB, 3, 0); /* LCDDEN */ + at91_set_a_periph(AT91_PIO_PORTB, 4, 0); /* LCDCC */ + at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* LCDD2 */ + at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* LCDD3 */ + at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* LCDD4 */ + at91_set_a_periph(AT91_PIO_PORTB, 10, 0); /* LCDD5 */ + at91_set_a_periph(AT91_PIO_PORTB, 11, 0); /* LCDD6 */ + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* LCDD7 */ + at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* LCDD10 */ + at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* LCDD11 */ + at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* LCDD12 */ + at91_set_a_periph(AT91_PIO_PORTB, 18, 0); /* LCDD13 */ + at91_set_a_periph(AT91_PIO_PORTB, 19, 0); /* LCDD14 */ + at91_set_a_periph(AT91_PIO_PORTB, 20, 0); /* LCDD15 */ + at91_set_b_periph(AT91_PIO_PORTB, 23, 0); /* LCDD18 */ + at91_set_b_periph(AT91_PIO_PORTB, 24, 0); /* LCDD19 */ + at91_set_b_periph(AT91_PIO_PORTB, 25, 0); /* LCDD20 */ + at91_set_b_periph(AT91_PIO_PORTB, 26, 0); /* LCDD21 */ + at91_set_b_periph(AT91_PIO_PORTB, 27, 0); /* LCDD22 */ + at91_set_b_periph(AT91_PIO_PORTB, 28, 0); /* LCDD23 */ + + writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */ gd->fb_base = AT91SAM9261_SRAM_BASE; } @@ -222,11 +241,14 @@ void lcd_show_board_info(void) int board_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Enable Ctrlc */ console_init_f(); - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + writel(1 << AT91SAM9261_ID_PIOA | + 1 << AT91SAM9261_ID_PIOC, + &pmc->pcer); /* arch number of PM9261-Board */ gd->bd->bi_arch_number = MACH_TYPE_PM9261; diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds index 0d4a9ef..0c51d48 100644 --- a/board/rsdproto/u-boot.lds +++ b/board/rsdproto/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8260/start.o (.text) + arch/ppc/cpu/mpc8260/start.o (.text) *(.text) *(.got1) /*. = env_offset; */ diff --git a/board/samsung/smdk6400/u-boot-nand.lds b/board/samsung/smdk6400/u-boot-nand.lds index a074420..29a4f61 100644 --- a/board/samsung/smdk6400/u-boot-nand.lds +++ b/board/samsung/smdk6400/u-boot-nand.lds @@ -34,8 +34,8 @@ SECTIONS . = ALIGN(4); .text : { - cpu/arm1176/start.o (.text) - cpu/arm1176/s3c64xx/cpu_init.o (.text) + arch/arm/cpu/arm1176/start.o (.text) + arch/arm/cpu/arm1176/s3c64xx/cpu_init.o (.text) *(.text) } diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c index 35c4e60..007f875 100644 --- a/board/sandburst/common/ppc440gx_i2c.c +++ b/board/sandburst/common/ppc440gx_i2c.c @@ -21,7 +21,7 @@ */ /* - * Ported from cpu/ppc4xx/i2c.c by AS HARNOIS by + * Ported from arch/ppc/cpu/ppc4xx/i2c.c by AS HARNOIS by * Travis B. Sawyer * Sandburst Corporation. */ @@ -31,7 +31,7 @@ #include <i2c.h> #include <command.h> #include "ppc440gx_i2c.h" -#include <asm-ppc/io.h> +#include <asm/io.h> #ifdef CONFIG_I2C_BUS1 diff --git a/board/sandburst/karef/u-boot.lds.debug b/board/sandburst/karef/u-boot.lds.debug index 48fd579..c174398 100644 --- a/board/sandburst/karef/u-boot.lds.debug +++ b/board/sandburst/karef/u-boot.lds.debug @@ -56,19 +56,19 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) board/sandburst/karef/init.o (.text) - cpu/ppc4xx/kgdb.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) + arch/ppc/cpu/ppc4xx/kgdb.o (.text) + arch/ppc/cpu/ppc4xx/traps.o (.text) + arch/ppc/cpu/ppc4xx/interrupts.o (.text) + arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) + arch/ppc/cpu/ppc4xx/cpu_init.o (.text) + arch/ppc/cpu/ppc4xx/speed.o (.text) drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) /* common/env_embedded.o(.text) */ diff --git a/board/sandburst/metrobox/u-boot.lds.debug b/board/sandburst/metrobox/u-boot.lds.debug index 4bc5cea..8458416 100644 --- a/board/sandburst/metrobox/u-boot.lds.debug +++ b/board/sandburst/metrobox/u-boot.lds.debug @@ -56,19 +56,19 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) board/sandburst/metrobox/init.o (.text) - cpu/ppc4xx/kgdb.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) + arch/ppc/cpu/ppc4xx/kgdb.o (.text) + arch/ppc/cpu/ppc4xx/traps.o (.text) + arch/ppc/cpu/ppc4xx/interrupts.o (.text) + arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) + arch/ppc/cpu/ppc4xx/cpu_init.o (.text) + arch/ppc/cpu/ppc4xx/speed.o (.text) drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) /* common/env_embedded.o(.text) */ diff --git a/board/sbc8641d/u-boot.lds b/board/sbc8641d/u-boot.lds index b71a7d6..2f8730b 100644 --- a/board/sbc8641d/u-boot.lds +++ b/board/sbc8641d/u-boot.lds @@ -50,16 +50,16 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc86xx/start.o (.text) - cpu/mpc86xx/traps.o (.text) - cpu/mpc86xx/interrupts.o (.text) - cpu/mpc86xx/cpu_init.o (.text) - cpu/mpc86xx/cpu.o (.text) - cpu/mpc86xx/speed.o (.text) + arch/ppc/cpu/mpc86xx/start.o (.text) + arch/ppc/cpu/mpc86xx/traps.o (.text) + arch/ppc/cpu/mpc86xx/interrupts.o (.text) + arch/ppc/cpu/mpc86xx/cpu_init.o (.text) + arch/ppc/cpu/mpc86xx/cpu.o (.text) + arch/ppc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) *(.text) *(.got1) } diff --git a/board/sc3/u-boot.lds b/board/sc3/u-boot.lds index 16dc384..573fbee 100644 --- a/board/sc3/u-boot.lds +++ b/board/sc3/u-boot.lds @@ -60,18 +60,18 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) board/sc3/init.o (.text) - cpu/ppc4xx/kgdb.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) + arch/ppc/cpu/ppc4xx/kgdb.o (.text) + arch/ppc/cpu/ppc4xx/traps.o (.text) + arch/ppc/cpu/ppc4xx/interrupts.o (.text) + arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) + arch/ppc/cpu/ppc4xx/cpu_init.o (.text) + arch/ppc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) /* . = env_offset;*/ /* common/env_embedded.o(.text)*/ diff --git a/board/siemens/CCM/u-boot.lds b/board/siemens/CCM/u-boot.lds index 2d0efb3..5bd5a75 100644 --- a/board/siemens/CCM/u-boot.lds +++ b/board/siemens/CCM/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/siemens/CCM/u-boot.lds.debug b/board/siemens/CCM/u-boot.lds.debug index 29657e9..460a983 100644 --- a/board/siemens/CCM/u-boot.lds.debug +++ b/board/siemens/CCM/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) /* . = env_offset; common/env_embedded.o(.text) diff --git a/board/siemens/IAD210/u-boot.lds b/board/siemens/IAD210/u-boot.lds index 104b44c..904d45f 100644 --- a/board/siemens/IAD210/u-boot.lds +++ b/board/siemens/IAD210/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - cpu/mpc8xx/interrupts.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + arch/ppc/cpu/mpc8xx/interrupts.o (.text) + arch/ppc/lib/time.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/siemens/SMN42/flash.c b/board/siemens/SMN42/flash.c index 8cf17b8..fc91574 100644 --- a/board/siemens/SMN42/flash.c +++ b/board/siemens/SMN42/flash.c @@ -2,7 +2,7 @@ * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> * * (C) Copyright 2007 Gary Jennejohn garyj@denx.de - * Modified to use the routines in cpu/arm720t/lpc2292/flash.c. + * Modified to use the routines in arch/arm/cpu/arm720t/lpc2292/flash.c. * Heavily modified to support the SMN42 board from Siemens * * This program is free software; you can redistribute it and/or diff --git a/board/siemens/pcu_e/u-boot.lds b/board/siemens/pcu_e/u-boot.lds index cc8ad7d..ff2f566 100644 --- a/board/siemens/pcu_e/u-boot.lds +++ b/board/siemens/pcu_e/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/siemens/pcu_e/u-boot.lds.debug b/board/siemens/pcu_e/u-boot.lds.debug index 987c4dd..fcf2cbb 100644 --- a/board/siemens/pcu_e/u-boot.lds.debug +++ b/board/siemens/pcu_e/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/sixnet/u-boot.lds b/board/sixnet/u-boot.lds index dd632a4..c3e7f50 100644 --- a/board/sixnet/u-boot.lds +++ b/board/sixnet/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/snmc/qs850/u-boot.lds b/board/snmc/qs850/u-boot.lds index 9ef2c20..f2154c4 100644 --- a/board/snmc/qs850/u-boot.lds +++ b/board/snmc/qs850/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/snmc/qs860t/u-boot.lds b/board/snmc/qs860t/u-boot.lds index 9ef2c20..f2154c4 100644 --- a/board/snmc/qs860t/u-boot.lds +++ b/board/snmc/qs860t/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/spc1920/u-boot.lds b/board/spc1920/u-boot.lds index d6711b5..c000746 100644 --- a/board/spc1920/u-boot.lds +++ b/board/spc1920/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/spd8xx/u-boot.lds b/board/spd8xx/u-boot.lds index 7b9455b..c4d8357 100644 --- a/board/spd8xx/u-boot.lds +++ b/board/spd8xx/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/spd8xx/u-boot.lds.debug b/board/spd8xx/u-boot.lds.debug index 0a3b958..61c0d68 100644 --- a/board/spd8xx/u-boot.lds.debug +++ b/board/spd8xx/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/ssv/adnpesc1/u-boot.lds b/board/ssv/adnpesc1/u-boot.lds index 98ee8f8..50c3fe7 100644 --- a/board/ssv/adnpesc1/u-boot.lds +++ b/board/ssv/adnpesc1/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - cpu/nios/start.o (.text) + arch/nios/cpu/start.o (.text) *(.text) } __text_end = .; diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c index 73dddf3..678ec58 100644 --- a/board/stx/stxssa/stxssa.c +++ b/board/stx/stxssa/stxssa.c @@ -259,7 +259,7 @@ board_early_init_f(void) #endif /* Why is the phy reset done _after_ the ethernet - * initialization in lib_ppc/board.c? + * initialization in arch/ppc/lib/board.c? * Do it here so it's done before the TSECs are used. */ reset_phy(); diff --git a/board/stx/stxxtc/u-boot.lds b/board/stx/stxxtc/u-boot.lds index 860c887..c4df378 100644 --- a/board/stx/stxxtc/u-boot.lds +++ b/board/stx/stxxtc/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/stx/stxxtc/u-boot.lds.debug b/board/stx/stxxtc/u-boot.lds.debug index 4ef16f1..ec479b1 100644 --- a/board/stx/stxxtc/u-boot.lds.debug +++ b/board/stx/stxxtc/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/svm_sc8xx/u-boot.lds b/board/svm_sc8xx/u-boot.lds index 02aa9dd..9027095 100644 --- a/board/svm_sc8xx/u-boot.lds +++ b/board/svm_sc8xx/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) . = env_offset; common/env_embedded.o (.ppcenv) diff --git a/board/svm_sc8xx/u-boot.lds.debug b/board/svm_sc8xx/u-boot.lds.debug index ec01fe2..a2b7bc7 100644 --- a/board/svm_sc8xx/u-boot.lds.debug +++ b/board/svm_sc8xx/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/tcm-bf518/config.mk b/board/tcm-bf518/config.mk index f85bef5..3f9d41f 100644 --- a/board/tcm-bf518/config.mk +++ b/board/tcm-bf518/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/tcm-bf537/config.mk b/board/tcm-bf537/config.mk index 3c0b46f..bc046f1 100644 --- a/board/tcm-bf537/config.mk +++ b/board/tcm-bf537/config.mk @@ -26,8 +26,8 @@ # This is not actually used for Blackfin boards so do not change it #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 # Set some default LDR flags based on boot mode. LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/total5200/mt48lc16m16a2-75.h b/board/total5200/mt48lc16m16a2-75.h index 5b0923e..ae237c6 100644 --- a/board/total5200/mt48lc16m16a2-75.h +++ b/board/total5200/mt48lc16m16a2-75.h @@ -23,21 +23,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/total5200/mt48lc32m16a2-75.h b/board/total5200/mt48lc32m16a2-75.h index 4b5ac80..cb4b43d 100644 --- a/board/total5200/mt48lc32m16a2-75.h +++ b/board/total5200/mt48lc32m16a2-75.h @@ -28,13 +28,8 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x514F0000 #define SDRAM_CONFIG1 0xD2322800 #define SDRAM_CONFIG2 0x8AD70000 - -#else -#error CONFIG_MPC5200 is not defined -#endif diff --git a/board/total5200/sdram.c b/board/total5200/sdram.c index dc4c6f1..d883eb6 100644 --- a/board/total5200/sdram.c +++ b/board/total5200/sdram.c @@ -76,7 +76,6 @@ static void mpc5xxx_sdram_start (sdram_conf_t *sdram_conf, int hi_addr) * is something else than 0x00000000. */ -#if defined(CONFIG_MPC5200) long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf) { ulong dramsize = 0; @@ -174,54 +173,3 @@ long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf) return dramsize + dramsize2; } - -#elif defined(CONFIG_MGT5100) - -long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf) -{ - ulong dramsize = 0; -#ifndef CONFIG_SYS_RAMBOOT - ulong test1, test2; - - /* setup and enable SDRAM chip selects */ - *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; - *(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */ - __asm__ volatile ("sync"); - - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = sdram_conf->config1; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = sdram_conf->config2; - - /* address select register */ - *(vu_long *)MPC5XXX_SDRAM_XLBSEL = sdram_conf->addrsel; - __asm__ volatile ("sync"); - - /* find RAM size */ - mpc5xxx_sdram_start(sdram_conf, 0); - test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - mpc5xxx_sdram_start(sdram_conf, 1); - test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); - if (test1 > test2) { - mpc5xxx_sdram_start(sdram_conf, 0); - dramsize = test1; - } else { - dramsize = test2; - } - - /* set SDRAM end address according to size */ - *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); - -#else /* CONFIG_SYS_RAMBOOT */ - - /* Retrieve amount of SDRAM available */ - dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); - -#endif /* CONFIG_SYS_RAMBOOT */ - - return dramsize; -} - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/total5200/sdram.h b/board/total5200/sdram.h index bc21e1d..396a190 100644 --- a/board/total5200/sdram.h +++ b/board/total5200/sdram.h @@ -28,12 +28,7 @@ typedef struct { ulong control; ulong config1; ulong config2; -#if defined(CONFIG_MPC5200) ulong tapdelay; -#endif -#if defined(CONFIG_MGT5100) - ulong addrsel; -#endif } sdram_conf_t; long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf); diff --git a/board/total5200/total5200.c b/board/total5200/total5200.c index c524d63..61b5b80 100644 --- a/board/total5200/total5200.c +++ b/board/total5200/total5200.c @@ -47,26 +47,17 @@ phys_size_t initdram (int board_type) sdram_conf.control = SDRAM_CONTROL; sdram_conf.config1 = SDRAM_CONFIG1; sdram_conf.config2 = SDRAM_CONFIG2; -#if defined(CONFIG_MPC5200) sdram_conf.tapdelay = 0; -#endif -#if defined(CONFIG_MGT5100) - sdram_conf.addrsel = SDRAM_ADDRSEL; -#endif return mpc5xxx_sdram_init (&sdram_conf); } int checkboard (void) { -#if defined(CONFIG_MPC5200) #if CONFIG_TOTAL5200_REV==2 puts ("Board: Total5200 Rev.2 "); #else puts ("Board: Total5200 "); #endif -#elif defined(CONFIG_MGT5100) - puts ("Board: Total5100 "); -#endif /* * Retrieve FPGA Revision. @@ -85,20 +76,6 @@ int checkboard (void) return 0; } -#if defined(CONFIG_MGT5100) -int board_early_init_r(void) -{ - /* - * Now, when we are in RAM, enable CS0 - * because CS_BOOT cannot be written. - */ - *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */ - *(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */ - - return 0; -} -#endif - #ifdef CONFIG_PCI static struct pci_controller hose; @@ -266,9 +243,7 @@ static const S1D_REGS init_regs [] = void video_get_info_str (int line_number, char *info) { if (line_number == 1) { -#ifdef CONFIG_MGT5100 - strcpy (info, " Total5100"); -#elif CONFIG_TOTAL5200_REV==1 +#if CONFIG_TOTAL5200_REV==1 strcpy (info, " Total5200"); #elif CONFIG_TOTAL5200_REV==2 strcpy (info, " Total5200 Rev.2"); diff --git a/board/tqc/tqm5200/mt48lc16m16a2-75.h b/board/tqc/tqm5200/mt48lc16m16a2-75.h index 3f1e169..48b4321 100644 --- a/board/tqc/tqm5200/mt48lc16m16a2-75.h +++ b/board/tqc/tqm5200/mt48lc16m16a2-75.h @@ -23,7 +23,6 @@ #define SDRAM_DDR 0 /* is SDR */ -#if defined(CONFIG_MPC5200) /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x00CD0000 /* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */ @@ -33,15 +32,3 @@ /*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */ #define SDRAM_CONFIG2 0x8AD70000 /*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */ - -#elif defined(CONFIG_MGT5100) -/* Settings for XLB = 66 MHz */ -#define SDRAM_MODE 0x008D0000 -#define SDRAM_CONTROL 0x504F0000 -#define SDRAM_CONFIG1 0xC2222600 -#define SDRAM_CONFIG2 0x88B70004 -#define SDRAM_ADDRSEL 0x02000000 - -#else -#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined -#endif diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c index 4fd8cd6..e564879 100644 --- a/board/tqc/tqm834x/tqm834x.c +++ b/board/tqc/tqm834x/tqm834x.c @@ -28,7 +28,7 @@ #include <asm/mpc8349_pci.h> #include <i2c.h> #include <miiphy.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> #include <pci.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/tqc/tqm8xx/u-boot.lds b/board/tqc/tqm8xx/u-boot.lds index 2df8d84..a2277c2 100644 --- a/board/tqc/tqm8xx/u-boot.lds +++ b/board/tqc/tqm8xx/u-boot.lds @@ -55,14 +55,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/tqc/tqm8xx/u-boot.lds.debug b/board/tqc/tqm8xx/u-boot.lds.debug index a2d940f..57cc305 100644 --- a/board/tqc/tqm8xx/u-boot.lds.debug +++ b/board/tqc/tqm8xx/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/trab/Makefile b/board/trab/Makefile index 27d75f3..0b13dc4 100644 --- a/board/trab/Makefile +++ b/board/trab/Makefile @@ -48,7 +48,7 @@ $(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)trab_fkt.srec: $(OBJS_FKT) $(LIB) $(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e trab_fkt $^ $(LIB) \ -L$(obj)../../examples/standalone -lstubs \ - -L$(obj)../../lib_generic -lgeneric \ + -L$(obj)../../lib -lgeneric \ $(PLATFORM_LIBS) $(OBJCOPY) -O srec $(<:.o=) $@ diff --git a/board/trab/rs485.c b/board/trab/rs485.c index ad0c136..6a3a4cd 100644 --- a/board/trab/rs485.c +++ b/board/trab/rs485.c @@ -2,7 +2,7 @@ * (C) Copyright 2003 * Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de> * - * Based on cpu/arm920t/serial.c, by Gary Jennejohn + * Based on arch/arm/cpu/arm920t/serial.c, by Gary Jennejohn * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> * * This program is free software; you can redistribute it and/or modify diff --git a/board/trab/rs485.h b/board/trab/rs485.h index 16d69bb..19e3244 100644 --- a/board/trab/rs485.h +++ b/board/trab/rs485.h @@ -2,7 +2,7 @@ * (C) Copyright 2003 * Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de> * - * Based on cpu/arm920t/serial.c, by Gary Jennejohn + * Based on arch/arm/cpu/arm920t/serial.c, by Gary Jennejohn * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> * * This program is free software; you can redistribute it and/or modify diff --git a/board/trab/u-boot.lds b/board/trab/u-boot.lds index c3d5c49..cd50e85 100644 --- a/board/trab/u-boot.lds +++ b/board/trab/u-boot.lds @@ -32,10 +32,10 @@ SECTIONS . = ALIGN(4); .text : { - cpu/arm920t/start.o (.text) - lib_generic/zlib.o (.text) - lib_generic/crc32.o (.text) - lib_generic/string.o (.text) + arch/arm/cpu/arm920t/start.o (.text) + lib/zlib.o (.text) + lib/crc32.o (.text) + lib/string.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/uc100/u-boot.lds b/board/uc100/u-boot.lds index e3ea52a..f67b1d9 100644 --- a/board/uc100/u-boot.lds +++ b/board/uc100/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) common/env_embedded.o (.text) diff --git a/board/uc100/u-boot.lds.debug b/board/uc100/u-boot.lds.debug index edaa402..84b338a 100644 --- a/board/uc100/u-boot.lds.debug +++ b/board/uc100/u-boot.lds.debug @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) common/env_embedded.o(.text) diff --git a/board/uc101/config.mk b/board/uc101/config.mk index 4fe1831..aebf304 100644 --- a/board/uc101/config.mk +++ b/board/uc101/config.mk @@ -39,4 +39,4 @@ TEXT_BASE = 0xFFF00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds +LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds index 6f2ea9a..bc47060 100644 --- a/board/v37/u-boot.lds +++ b/board/v37/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) - cpu/mpc8xx/traps.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) + arch/ppc/lib/cache.o (.text) + arch/ppc/lib/time.o (.text) /* . = env_offset; diff --git a/board/w7o/u-boot.lds.debug b/board/w7o/u-boot.lds.debug index 8bb4929..369c15a 100644 --- a/board/w7o/u-boot.lds.debug +++ b/board/w7o/u-boot.lds.debug @@ -57,9 +57,9 @@ SECTIONS mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c index a818808..96a12d7 100644 --- a/board/w7o/w7o.c +++ b/board/w7o/w7o.c @@ -157,7 +157,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in cpu/ppc4xx + * in arch/ppc/cpu/ppc4xx */ sdram_init(); diff --git a/board/westel/amx860/u-boot.lds b/board/westel/amx860/u-boot.lds index 2d0efb3..5bd5a75 100644 --- a/board/westel/amx860/u-boot.lds +++ b/board/westel/amx860/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + arch/ppc/lib/ppcstring.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + lib/zlib.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/westel/amx860/u-boot.lds.debug b/board/westel/amx860/u-boot.lds.debug index 653e0be..b331d5a 100644 --- a/board/westel/amx860/u-boot.lds.debug +++ b/board/westel/amx860/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/mpc8xx/start.o (.text) + arch/ppc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) + lib/vsprintf.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/xes/xpedite1000/u-boot.lds.debug b/board/xes/xpedite1000/u-boot.lds.debug index d00834e..c3f6fef 100644 --- a/board/xes/xpedite1000/u-boot.lds.debug +++ b/board/xes/xpedite1000/u-boot.lds.debug @@ -55,18 +55,18 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) + arch/ppc/cpu/ppc4xx/start.o (.text) board/xes/xpedite1000/init.o (.text) - cpu/ppc4xx/kgdb.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) + arch/ppc/cpu/ppc4xx/kgdb.o (.text) + arch/ppc/cpu/ppc4xx/traps.o (.text) + arch/ppc/cpu/ppc4xx/interrupts.o (.text) + arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) + arch/ppc/cpu/ppc4xx/cpu_init.o (.text) + arch/ppc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) /* common/env_embedded.o(.text) */ diff --git a/board/xes/xpedite5170/u-boot.lds b/board/xes/xpedite5170/u-boot.lds index b71a7d6..2f8730b 100644 --- a/board/xes/xpedite5170/u-boot.lds +++ b/board/xes/xpedite5170/u-boot.lds @@ -50,16 +50,16 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc86xx/start.o (.text) - cpu/mpc86xx/traps.o (.text) - cpu/mpc86xx/interrupts.o (.text) - cpu/mpc86xx/cpu_init.o (.text) - cpu/mpc86xx/cpu.o (.text) - cpu/mpc86xx/speed.o (.text) + arch/ppc/cpu/mpc86xx/start.o (.text) + arch/ppc/cpu/mpc86xx/traps.o (.text) + arch/ppc/cpu/mpc86xx/interrupts.o (.text) + arch/ppc/cpu/mpc86xx/cpu_init.o (.text) + arch/ppc/cpu/mpc86xx/cpu.o (.text) + arch/ppc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) + lib/crc32.o (.text) + arch/ppc/lib/extable.o (.text) + lib/zlib.o (.text) *(.text) *(.got1) } diff --git a/board/xilinx/microblaze-generic/u-boot.lds b/board/xilinx/microblaze-generic/u-boot.lds index c20c6dd..ee41145 100644 --- a/board/xilinx/microblaze-generic/u-boot.lds +++ b/board/xilinx/microblaze-generic/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS .text ALIGN(0x4): { __text_start = .; - cpu/microblaze/start.o (.text) + arch/microblaze/cpu/start.o (.text) *(.text) __text_end = .; } diff --git a/board/xilinx/ml300/init.S b/board/xilinx/ml300/init.S deleted file mode 100644 index a282c9a..0000000 --- a/board/xilinx/ml300/init.S +++ /dev/null @@ -1,44 +0,0 @@ -/* - * init.S: Stubs for U-Boot initialization - * - * Author: Xilinx, Inc. - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * - * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A - * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS - * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, - * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE - * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING - * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. - * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO - * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY - * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM - * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND - * FITNESS FOR A PARTICULAR PURPOSE. - * - * - * Xilinx hardware products are not intended for use in life support - * appliances, devices, or systems. Use in such applications is - * expressly prohibited. - * - * - * (c) Copyright 2002-2004 Xilinx Inc. - * All rights reserved. - * - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * - */ - - .globl ext_bus_cntlr_init -ext_bus_cntlr_init: - blr diff --git a/board/xilinx/ml300/ml300.c b/board/xilinx/ml300/ml300.c deleted file mode 100644 index e64becc..0000000 --- a/board/xilinx/ml300/ml300.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * ml300.c: U-Boot platform support for Xilinx ML300 board - * - * Author: Xilinx, Inc. - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * - * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A - * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS - * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, - * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE - * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING - * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. - * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO - * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY - * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM - * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND - * FITNESS FOR A PARTICULAR PURPOSE. - * - * - * Xilinx hardware products are not intended for use in life support - * appliances, devices, or systems. Use in such applications is - * expressly prohibited. - * - * - * (c) Copyright 2002-2004 Xilinx Inc. - * All rights reserved. - * - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ - -#include <config.h> -#include <common.h> -#include <asm/processor.h> - -#ifdef CONFIG_ENV_IS_IN_EEPROM -extern void convert_env(void); -#endif - -int -board_pre_init(void) -{ - return 0; -} - -int -checkboard(void) -{ - char tmp[64]; /* long enough for environment variables */ - char *s, *e; - int i = getenv_r("L", tmp, sizeof (tmp)); - - if (i < 0) { - printf("### No HW ID - assuming ML300"); - } else { - for (e = tmp; *e; ++e) { - if (*e == ' ') - break; - } - - printf("### Board Serial# is "); - - for (s = tmp; s < e; ++s) { - putc(*s); - } - - } - putc('\n'); - - return (0); -} - -phys_size_t -initdram(int board_type) -{ - return 128 * 1024 * 1024; -} - -int -testdram(void) -{ - printf("test: xxx MB - ok\n"); - - return (0); -} - -/* implement functions originally in cpu/ppc4xx/speed.c */ -void -get_sys_info(sys_info_t * sysInfo) -{ - sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ; - - /* only correct if the PLB and OPB run at the same frequency */ - sysInfo->freqPLB = XPAR_UARTNS550_0_CLOCK_FREQ_HZ; - sysInfo->freqPCI = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 3; -} - -ulong -get_PCI_freq(void) -{ - ulong val; - PPC4xx_SYS_INFO sys_info; - - get_sys_info(&sys_info); - val = sys_info.freqPCI; - return val; -} - -#ifdef CONFIG_MISC_INIT_R - -int -misc_init_r() -{ - /* convert env name and value to u-boot standard */ - convert_env(); - return 0; -} - -#endif diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c deleted file mode 100644 index 4215513..0000000 --- a/board/xilinx/ml300/serial.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Author: Xilinx, Inc. - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * - * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A - * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS - * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, - * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE - * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING - * ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. - * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO - * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY - * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM - * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND - * FITNESS FOR A PARTICULAR PURPOSE. - * - * - * Xilinx hardware products are not intended for use in life support - * appliances, devices, or systems. Use in such applications is - * expressly prohibited. - * - * - * (c) Copyright 2002-2004 Xilinx Inc. - * All rights reserved. - * - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ - -#include <common.h> -#include <asm/u-boot.h> -#include <asm/processor.h> -#include <command.h> -#include <config.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define USE_CHAN1 \ - ((defined XPAR_UARTNS550_0_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN1)) -#define USE_CHAN2 \ - ((defined XPAR_UARTNS550_1_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN2)) - -#if USE_CHAN1 -#include <ns16550.h> -#endif - -#if USE_CHAN1 -const NS16550_t COM_PORTS[] = { (NS16550_t) (XPAR_UARTNS550_0_BASEADDR + 3) -#if USE_CHAN2 - , (NS16550_t) (XPAR_UARTNS550_1_BASEADDR + 3) -#endif -}; -#endif - -int -serial_init(void) -{ -#if USE_CHAN1 - int clock_divisor; - - clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate; - (void) NS16550_init(COM_PORTS[0], clock_divisor); -#if USE_CHAN2 - clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate; - (void) NS16550_init(COM_PORTS[1], clock_divisor); -#endif -#endif - return 0; - -} - -void -serial_putc(const char c) -{ - if (c == '\n') - NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r'); - - NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], c); -} - -int -serial_getc(void) -{ - return NS16550_getc(COM_PORTS[CONFIG_SYS_DUART_CHAN]); -} - -int -serial_tstc(void) -{ - return NS16550_tstc(COM_PORTS[CONFIG_SYS_DUART_CHAN]); -} - -void -serial_setbrg(void) -{ -#if USE_CHAN1 - int clock_divisor; - - clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate; - NS16550_reinit(COM_PORTS[0], clock_divisor); -#if USE_CHAN2 - clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate; - NS16550_reinit(COM_PORTS[1], clock_divisor); -#endif -#endif -} - -void -serial_puts(const char *s) -{ - while (*s) { - serial_putc(*s++); - } -} - -#if defined(CONFIG_CMD_KGDB) -void -kgdb_serial_init(void) -{ -} - -void -putDebugChar(int c) -{ - serial_putc(c); -} - -void -putDebugStr(const char *str) -{ - serial_puts(str); -} - -int -getDebugChar(void) -{ - return serial_getc(); -} - -void -kgdb_interruptible(int yes) -{ - return; -} -#endif diff --git a/board/xilinx/ml300/xparameters.h b/board/xilinx/ml300/xparameters.h deleted file mode 100644 index 2c56737..0000000 --- a/board/xilinx/ml300/xparameters.h +++ /dev/null @@ -1,196 +0,0 @@ -/******************************************************************* -* -* CAUTION: This file is automatically generated by libgen. -* Version: Xilinx EDK 6.2 EDK_Gm.11 -* DO NOT EDIT. -* -* Copyright (c) 2003 Xilinx, Inc. All rights reserved. -* -* Description: Driver parameters -* -*******************************************************************/ - -/******************************************************************/ - -/* U-Boot Redefines */ - -/******************************************************************/ - -#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000) -#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR -#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ -#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID -#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000) -#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR -#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ -#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID - -/******************************************************************/ - -#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR -#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR -#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR -#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR -#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR -#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT -#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST -#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST -#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ - -/******************************************************************/ - -#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400 -#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF -#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0 - -/******************************************************************/ - -#define XPAR_XPCI_NUM_INSTANCES 1 -#define XPAR_XPCI_CLOCK_HZ 33333333 -#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0 -#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000 -#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF -#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000 -#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004 -#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000 -#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000 -#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF -#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000 -#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF - -/******************************************************************/ - -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 - -/******************************************************************/ - -#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0 -#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000 -#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7) -#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1 -#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8) -#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F) -#define XPAR_XGPIO_NUM_INSTANCES 2 - -/******************************************************************/ - -#define XPAR_XIIC_NUM_INSTANCES 1 -#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000 -#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF -#define XPAR_OPB_IIC_0_DEVICE_ID 0 -#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0 - -/******************************************************************/ - -#define XPAR_XUARTNS550_NUM_INSTANCES 2 -#define XPAR_XUARTNS550_CLOCK_HZ 100000000 -#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000 -#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF -#define XPAR_OPB_UART16550_0_DEVICE_ID 0 -#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000 -#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF -#define XPAR_OPB_UART16550_1_DEVICE_ID 1 - -/******************************************************************/ - -#define XPAR_XSPI_NUM_INSTANCES 1 -#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000 -#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F -#define XPAR_OPB_SPI_0_DEVICE_ID 0 -#define XPAR_OPB_SPI_0_FIFO_EXIST 1 -#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0 -#define XPAR_OPB_SPI_0_NUM_SS_BITS 1 - -/******************************************************************/ - -#define XPAR_XPS2_NUM_INSTANCES 2 -#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0 -#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000 -#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F) -#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1 -#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000) -#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F) - -/******************************************************************/ - -#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1 -#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000 -#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007 -#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0 - -/******************************************************************/ - -#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000 -#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF -#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000 -#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF -#define XPAR_PLB_DDR_0_BASEADDR 0x00000000 -#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF - -/******************************************************************/ - -#define XPAR_XINTC_HAS_IPR 1 -#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18 -#define XPAR_XINTC_USE_DCR 0 -#define XPAR_XINTC_NUM_INSTANCES 1 -#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0 -#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF -#define XPAR_DCR_INTC_0_DEVICE_ID 0 -#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000 - -/******************************************************************/ - -#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0 -#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1 -#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2 -#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3 -#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4 -#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5 -#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6 -#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7 -#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8 -#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9 -#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10 -#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11 -#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12 -#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13 -#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14 -#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15 -#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16 -#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17 - -/******************************************************************/ - -#define XPAR_XTFT_NUM_INSTANCES 1 -#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200 -#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207 -#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0 - -/******************************************************************/ - -#define XPAR_XSYSACE_MEM_WIDTH 8 -#define XPAR_XSYSACE_NUM_INSTANCES 1 -#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000 -#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF -#define XPAR_OPB_SYSACE_0_DEVICE_ID 0 -#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8 - -/******************************************************************/ - -#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000 - -/******************************************************************/ diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds index 02044e4..8fafbd5 100644 --- a/board/xilinx/ppc405-generic/u-boot-rom.lds +++ b/board/xilinx/ppc405-generic/u-boot-rom.lds @@ -33,7 +33,7 @@ SECTIONS .bootpg 0xFFFFF000 : { - cpu/ppc4xx/start.o (.bootpg) + arch/ppc/cpu/ppc4xx/start.o (.bootpg) } = 0xffff /* Read-only sections, merged into text segment: */ diff --git a/board/xilinx/ppc440-generic/init.S b/board/xilinx/ppc440-generic/init.S index 1409467..54f2d7f 100644 --- a/board/xilinx/ppc440-generic/init.S +++ b/board/xilinx/ppc440-generic/init.S @@ -19,7 +19,7 @@ #include <ppc_asm.tmpl> #include <config.h> -#include <asm-ppc/mmu.h> +#include <asm/mmu.h> .section .bootpg,"ax" .globl tlbtab diff --git a/board/xilinx/ppc440-generic/u-boot-rom.lds b/board/xilinx/ppc440-generic/u-boot-rom.lds index 57c809e..0cbed8e 100644 --- a/board/xilinx/ppc440-generic/u-boot-rom.lds +++ b/board/xilinx/ppc440-generic/u-boot-rom.lds @@ -33,7 +33,7 @@ SECTIONS .bootpg 0xFFFFF000 : { - cpu/ppc4xx/start.o (.bootpg) + arch/ppc/cpu/ppc4xx/start.o (.bootpg) } = 0xffff /* Read-only sections, merged into text segment: */ diff --git a/board/xilinx/xilinx_iic/iic_adapter.c b/board/xilinx/xilinx_iic/iic_adapter.c deleted file mode 100644 index 58aaeb7..0000000 --- a/board/xilinx/xilinx_iic/iic_adapter.c +++ /dev/null @@ -1,529 +0,0 @@ -/****************************************************************************** -* -* Author: Xilinx, Inc. -* -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of the GNU General Public License as published by the -* Free Software Foundation; either version 2 of the License, or (at your -* option) any later version. -* -* -* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A -* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS -* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, -* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE -* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING -* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. -* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO -* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY -* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM -* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND -* FITNESS FOR A PARTICULAR PURPOSE. -* -* -* Xilinx hardware products are not intended for use in life support -* appliances, devices, or systems. Use in such applications is -* expressly prohibited. -* -* -* (c) Copyright 2002-2004 Xilinx Inc. -* All rights reserved. -* -* -* You should have received a copy of the GNU General Public License along -* with this program; if not, write to the Free Software Foundation, Inc., -* 675 Mass Ave, Cambridge, MA 02139, USA. -* -******************************************************************************/ - -#include <config.h> -#include <common.h> -#include <environment.h> -#include <net.h> - -#ifdef CONFIG_ENV_IS_IN_EEPROM -#include <i2c.h> -#include "xiic_l.h" - -#define IIC_DELAY 5000 - -static u8 envStep = 0; /* 0 means crc has not been read */ -const u8 hex[] = "0123456789ABCDEF"; /* lookup table for ML300 CRC */ - -/************************************************************************ - * Use Xilinx provided driver to send data to EEPROM using iic bus. - */ -static void -send(u32 adr, u8 * data, u32 len) -{ - u8 sendBuf[34]; /* first 2-bit is address and others are data */ - u32 pos, wlen; - u32 ret; - - wlen = 32; - for (pos = 0; pos < len; pos += 32) { - if ((len - pos) < 32) - wlen = len - pos; - - /* Put address and data bits together */ - sendBuf[0] = (u8) ((adr + pos) >> 8); - sendBuf[1] = (u8) (adr + pos); - memcpy(&sendBuf[2], &data[pos], wlen); - - /* Send to EEPROM through iic bus */ - ret = XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, - sendBuf, wlen + 2); - - udelay(IIC_DELAY); - } -} - -/************************************************************************ - * Use Xilinx provided driver to read data from EEPROM using the iic bus. - */ -static void -receive(u32 adr, u8 * data, u32 len) -{ - u8 address[2]; - u32 ret; - - address[0] = (u8) (adr >> 8); - address[1] = (u8) adr; - - /* Provide EEPROM address */ - ret = - XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, address, - 2); - /* Receive data from EEPROM */ - ret = - XIic_Recv(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, data, len); -} - -/************************************************************************ - * Convert a hexadecimal string to its equivalent integer value. - */ -static u8 -axtoi(u8 * hexStg) -{ - u8 n; /* position in string */ - u8 m; /* position in digit[] to shift */ - u8 count; /* loop index */ - u8 intValue; /* integer value of hex string */ - u8 digit[2]; /* hold values to convert */ - - for (n = 0; n < 2; n++) { - if (hexStg[n] == '\0') - break; - if (hexStg[n] > 0x29 && hexStg[n] < 0x40) - digit[n] = hexStg[n] & 0x0f; - else if (hexStg[n] >= 'a' && hexStg[n] <= 'f') - digit[n] = (hexStg[n] & 0x0f) + 9; - else if (hexStg[n] >= 'A' && hexStg[n] <= 'F') - digit[n] = (hexStg[n] & 0x0f) + 9; - else - break; - } - - intValue = 0; - count = n; - m = n - 1; - n = 0; - while (n < count) { - intValue = intValue | (digit[n] << (m << 2)); - m--; /* adjust the position to set */ - n++; /* next digit to process */ - } - - return (intValue); -} - -/************************************************************************ - * Convert an integer string to its equivalent value. - */ -static u8 -atoi(uchar * string) -{ - u8 res = 0; - while (*string >= '0' && *string <= '9') { - res *= 10; - res += *string - '0'; - string++; - } - - return res; -} - -/************************************************************************ - * Key-value pairs are separated by "=" sign. - */ -static void -findKey(uchar * buffer, int *loc, u8 len) -{ - u32 i; - - for (i = 0; i < len; i++) - if (buffer[i] == '=') { - *loc = i; - return; - } - - /* return -1 is no "=" sign found */ - *loc = -1; -} - -/************************************************************************ - * Compute a new ML300 CRC when user calls the saveenv command. - * Also update EEPROM with new CRC value. - */ -static u8 -update_crc(u32 len, uchar * data) -{ - uchar temp[6] = { 'C', '=', 0x00, 0x00, 0x00, 0x00 }; - u32 crc; /* new crc value */ - u32 i; - - crc = 0; - - /* calculate new CRC */ - for (i = 0; i < len; i++) - crc += data[i]; - - /* CRC includes key for check sum */ - crc += 'C' + '='; - - /* compose new CRC to be updated */ - temp[2] = hex[(crc >> 4) & 0xf]; - temp[3] = hex[crc & 0xf]; - - /* check to see if env size exceeded */ - if (len + 6 > ENV_SIZE) { - printf("ERROR: not enough space to store CRC on EEPROM"); - return 1; - } - - memcpy(data + len, temp, 6); - return 0; -} - -/************************************************************************ - * Read out ML300 CRC and compare it with a runtime calculated ML300 CRC. - * If equal, then pass back a u-boot CRC value, otherwise pass back - * junk to indicate CRC error. -*/ -static void -read_crc(uchar * buffer, int len) -{ - u32 addr, n; - u32 crc; /* runtime crc */ - u8 old[2] = { 0xff, 0xff }; /* current CRC in EEPROM */ - u8 stop; /* indication of end of env data */ - u8 pre; /* previous EEPROM data bit */ - int i, loc; - - addr = CONFIG_ENV_OFFSET; /* start from first env address */ - n = 0; - pre = 1; - stop = 1; - crc = 0; - - /* calculate runtime CRC according to ML300 and read back - old CRC stored in the EEPROM */ - while (n < CONFIG_ENV_SIZE) { - receive(addr, buffer, len); - - /* found two null chars, end of env */ - if ((pre || buffer[0]) == 0) - break; - - findKey(buffer, &loc, len); - - /* found old check sum, read and store old CRC */ - if ((loc == 0 && pre == 'C') - || (loc > 0 && buffer[loc - 1] == 'C')) - receive(addr + loc + 1, old, 2); - - pre = buffer[len - 1]; - - /* calculate runtime ML300 CRC */ - crc += buffer[0]; - i = 1; - do { - crc += buffer[i]; - stop = buffer[i] || buffer[i - 1]; - i++; - } while (stop && (i < len)); - - if (stop == 0) - break; - - n += len; - addr += len; - } - - /* exclude old CRC from runtime calculation */ - crc -= (old[0] + old[1]); - - /* match CRC values, send back u-boot CRC */ - if ((old[0] == hex[(crc >> 4) & 0xf]) - && (old[1] == hex[crc & 0xf])) { - crc = 0; - n = 0; - addr = - CONFIG_ENV_OFFSET - offsetof(env_t, crc) + offsetof(env_t, - data); - /* calculate u-boot crc */ - while (n < ENV_SIZE) { - receive(addr, buffer, len); - crc = crc32(crc, buffer, len); - n += len; - addr += len; - } - - memcpy(buffer, &crc, 4); - } -} - -/************************************************************************ - * Convert IP address to hexadecimals. - */ -static void -ip_ml300(uchar * s, uchar * res) -{ - char temp[2]; - u8 i; - - res[0] = 0x00; - - for (i = 0; i < 4; i++) { - sprintf(temp, "%02x", atoi(s)); - s = (uchar *)strchr((char *)s, '.') + 1; - strcat((char *)res, temp); - } -} - -/************************************************************************ - * Change 0xff (255), a dummy null char to 0x00. - */ -static void -change_null(uchar * s) -{ - if (s != NULL) { - change_null((uchar *)strchr((char *)s + 1, 255)); - *(strchr((char *)s, 255)) = '\0'; - } -} - -/************************************************************************ - * Update environment variable name and values to u-boot standard. - */ -void -convert_env(void) -{ - char *s; /* pointer to env value */ - char temp[20]; /* temp storage for addresses */ - - /* E -> ethaddr */ - s = getenv("E"); - if (s != NULL) { - sprintf(temp, "%c%c.%c%c.%c%c.%c%c.%c%c.%c%c", - s[0], s[1], s[ 2], s[ 3], - s[4], s[5], s[ 6], s[ 7], - s[8], s[9], s[10], s[11] ); - setenv("ethaddr", temp); - setenv("E", NULL); - } - - /* L -> serial# */ - s = getenv("L"); - if (s != NULL) { - setenv("serial#", s); - setenv("L", NULL); - } - - /* I -> ipaddr */ - s = getenv("I"); - if (s != NULL) { - sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)), - axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6))); - setenv("ipaddr", temp); - setenv("I", NULL); - } - - /* S -> serverip */ - s = getenv("S"); - if (s != NULL) { - sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)), - axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6))); - setenv("serverip", temp); - setenv("S", NULL); - } - - /* A -> bootargs */ - s = getenv("A"); - if (s != NULL) { - setenv("bootargs", s); - setenv("A", NULL); - } - - /* F -> bootfile */ - s = getenv("F"); - if (s != NULL) { - setenv("bootfile", s); - setenv("F", NULL); - } - - /* M -> bootcmd */ - s = getenv("M"); - if (s != NULL) { - setenv("bootcmd", s); - setenv("M", NULL); - } - - /* Don't include C (CRC) */ - setenv("C", NULL); -} - -/************************************************************************ - * Save user modified environment values back to EEPROM. - */ -static void -save_env(void) -{ - char eprom[ENV_SIZE]; /* buffer to be written back to EEPROM */ - char *s, temp[20]; - char ff[] = { 0xff, 0x00 }; /* dummy null value */ - u32 len; /* length of env to be written to EEPROM */ - - eprom[0] = 0x00; - - /* ethaddr -> E */ - s = getenv("ethaddr"); - if (s != NULL) { - strcat(eprom, "E="); - sprintf(temp, "%c%c%c%c%c%c%c%c%c%c%c%c", - *s, *(s + 1), *(s + 3), *(s + 4), *(s + 6), *(s + 7), - *(s + 9), *(s + 10), *(s + 12), *(s + 13), *(s + 15), - *(s + 16)); - strcat(eprom, temp); - strcat(eprom, ff); - } - - /* serial# -> L */ - s = getenv("serial#"); - if (s != NULL) { - strcat(eprom, "L="); - strcat(eprom, s); - strcat(eprom, ff); - } - - /* ipaddr -> I */ - s = getenv("ipaddr"); - if (s != NULL) { - strcat(eprom, "I="); - ip_ml300((uchar *)s, (uchar *)temp); - strcat(eprom, temp); - strcat(eprom, ff); - } - - /* serverip -> S */ - s = getenv("serverip"); - if (s != NULL) { - strcat(eprom, "S="); - ip_ml300((uchar *)s, (uchar *)temp); - strcat(eprom, temp); - strcat(eprom, ff); - } - - /* bootargs -> A */ - s = getenv("bootargs"); - if (s != NULL) { - strcat(eprom, "A="); - strcat(eprom, s); - strcat(eprom, ff); - } - - /* bootfile -> F */ - s = getenv("bootfile"); - if (s != NULL) { - strcat(eprom, "F="); - strcat(eprom, s); - strcat(eprom, ff); - } - - /* bootcmd -> M */ - s = getenv("bootcmd"); - if (s != NULL) { - strcat(eprom, "M="); - strcat(eprom, s); - strcat(eprom, ff); - } - - len = strlen(eprom); /* find env length without crc */ - change_null((uchar *)eprom); /* change 0xff to 0x00 */ - - /* update EEPROM env values if there is enough space */ - if (update_crc(len, (uchar *)eprom) == 0) - send(CONFIG_ENV_OFFSET, (uchar *)eprom, len + 6); -} - -/************************************************************************ - * U-boot call for EEPROM read associated activities. - */ -int -i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - - if (envStep == 0) { - /* first read call is for crc */ - read_crc(buffer, len); - ++envStep; - return 0; - } else if (envStep == 1) { - /* then read out EEPROM content for runtime u-boot CRC calculation */ - receive(addr, buffer, len); - - if (addr + len - CONFIG_ENV_OFFSET == CONFIG_ENV_SIZE) - /* end of runtime crc read */ - ++envStep; - return 0; - } - - if (len < 2) { - /* when call getenv_r */ - receive(addr, buffer, len); - } else if (addr + len < CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) { - /* calling env_relocate(), but don't read out - crc value from EEPROM */ - receive(addr, buffer + 4, len); - } else { - receive(addr, buffer + 4, len - 4); - } - - return 0; - -} - -/************************************************************************ - * U-boot call for EEPROM write acativities. - */ -int -i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - /* save env on last page write called by u-boot */ - if (addr + len >= CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) - save_env(); - - return 0; -} - -/************************************************************************ - * Dummy function. - */ -int -i2c_probe(uchar chip) -{ - return 1; -} - -#endif |