summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
Diffstat (limited to 'board')
-rw-r--r--board/altera/socfpga/Makefile (renamed from board/altera/socfpga_cyclone5/Makefile)0
-rw-r--r--board/altera/socfpga/socfpga_cyclone5.c (renamed from board/altera/socfpga_cyclone5/socfpga_cyclone5.c)0
-rw-r--r--board/highbank/highbank.c33
3 files changed, 31 insertions, 2 deletions
diff --git a/board/altera/socfpga_cyclone5/Makefile b/board/altera/socfpga/Makefile
index 101fc7c..101fc7c 100644
--- a/board/altera/socfpga_cyclone5/Makefile
+++ b/board/altera/socfpga/Makefile
diff --git a/board/altera/socfpga_cyclone5/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c
index 576066b..576066b 100644
--- a/board/altera/socfpga_cyclone5/socfpga_cyclone5.c
+++ b/board/altera/socfpga/socfpga_cyclone5.c
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index 8cdcea8..4b272c7 100644
--- a/board/highbank/highbank.c
+++ b/board/highbank/highbank.c
@@ -12,13 +12,21 @@
#include <asm/sizes.h>
#include <asm/io.h>
+#define HB_AHCI_BASE 0xffe08000
+
#define HB_SREG_A9_PWR_REQ 0xfff3cf00
#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
+#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
+
#define HB_PWR_SUSPEND 0
#define HB_PWR_SOFT_RESET 1
#define HB_PWR_HARD_RESET 2
#define HB_PWR_SHUTDOWN 3
+#define PWRDOM_STAT_SATA 0x80000000
+#define PWRDOM_STAT_PCI 0x40000000
+#define PWRDOM_STAT_EMMC 0x20000000
+
DECLARE_GLOBAL_DATA_PTR;
/*
@@ -43,13 +51,17 @@ int board_eth_init(bd_t *bis)
return rc;
}
+#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
char envbuffer[16];
u32 boot_choice;
+ u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
- ahci_init(0xffe08000);
- scsi_scan(1);
+ if (reg & PWRDOM_STAT_SATA) {
+ ahci_init(HB_AHCI_BASE);
+ scsi_scan(1);
+ }
boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
sprintf(envbuffer, "bootcmd%d", boot_choice);
@@ -61,6 +73,7 @@ int misc_init_r(void)
return 0;
}
+#endif
int dram_init(void)
{
@@ -74,6 +87,22 @@ void dram_init_banksize(void)
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
}
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *fdt, bd_t *bd)
+{
+ static const char disabled[] = "disabled";
+ u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
+
+ if (!(reg & PWRDOM_STAT_SATA))
+ do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
+ disabled, sizeof(disabled), 1);
+
+ if (!(reg & PWRDOM_STAT_EMMC))
+ do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
+ disabled, sizeof(disabled), 1);
+}
+#endif
+
void reset_cpu(ulong addr)
{
writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);