diff options
Diffstat (limited to 'board')
37 files changed, 386 insertions, 1565 deletions
diff --git a/board/actux1/actux1.c b/board/actux1/actux1.c index 2f631b7..bc68eb3 100644 --- a/board/actux1/actux1.c +++ b/board/actux1/actux1.c @@ -59,8 +59,6 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_ACTUX1; - /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; diff --git a/board/actux2/actux2.c b/board/actux2/actux2.c index 9040a09..9e9e600 100644 --- a/board/actux2/actux2.c +++ b/board/actux2/actux2.c @@ -59,8 +59,6 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_ACTUX2; - /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c index 64e5215..7559c1d 100644 --- a/board/actux3/actux3.c +++ b/board/actux3/actux3.c @@ -57,8 +57,6 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_ACTUX3; - /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; diff --git a/board/actux4/actux4.c b/board/actux4/actux4.c index d20d881..6303c1e 100644 --- a/board/actux4/actux4.c +++ b/board/actux4/actux4.c @@ -54,8 +54,6 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_ACTUX4; - /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; diff --git a/board/ait/cam_enc_4xx/cam_enc_4xx.c b/board/ait/cam_enc_4xx/cam_enc_4xx.c index 5586576..32b28f9 100644 --- a/board/ait/cam_enc_4xx/cam_enc_4xx.c +++ b/board/ait/cam_enc_4xx/cam_enc_4xx.c @@ -21,6 +21,7 @@ #include <common.h> #include <errno.h> +#include <hush.h> #include <linux/mtd/nand.h> #include <nand.h> #include <miiphy.h> @@ -503,7 +504,7 @@ struct fit_images_info { size_t size; }; -static struct fit_images_info images[10]; +static struct fit_images_info imgs[10]; struct menu_display { char title[50]; @@ -554,7 +555,7 @@ static char *menu_handle(struct menu_display *display) { struct menu *m; int i; - char *choice = NULL; + void *choice = NULL; char key[2]; int ret; char *s; @@ -606,7 +607,7 @@ static char *menu_handle(struct menu_display *display) sprintf(key, "%d", 1); menu_default_set(m, key); - if (menu_get_choice(m, (void **)&choice) != 1) + if (menu_get_choice(m, &choice) != 1) debug("Problem picking a choice!\n"); menu_destroy(m); @@ -653,7 +654,7 @@ static int ait_writeublheader(void) sprintf(s, "%lx", i); ret = setenv("header_addr", s); if (ret == 0) - ret = run_command2("run img_writeheader", 0); + ret = run_command("run img_writeheader", 0); if (ret != 0) break; } @@ -688,16 +689,16 @@ static int ait_menu_install_images(void) * img_writeramdisk: write ramdisk to ubi volume */ - while (images[count].type != IH_TYPE_INVALID) { + while (imgs[count].type != IH_TYPE_INVALID) { printf("Installing %s\n", - genimg_get_type_name(images[count].type)); - sprintf(s, "%p", images[count].data); + genimg_get_type_name(imgs[count].type)); + sprintf(s, "%p", imgs[count].data); setenv("img_addr_r", s); - sprintf(s, "%lx", (unsigned long)images[count].size); + sprintf(s, "%lx", (unsigned long)imgs[count].size); setenv("filesize", s); - switch (images[count].subtype) { + switch (imgs[count].subtype) { case FIT_SUBTYPE_DF_ENV_IMAGE: - ret = run_command2("run img_writedfenv", 0); + ret = run_command("run img_writedfenv", 0); break; case FIT_SUBTYPE_RAMDISK_IMAGE: t = getenv("img_volume"); @@ -713,16 +714,16 @@ static int ait_menu_install_images(void) if (ret != 0) break; - ret = run_command2("run img_writeramdisk", 0); + ret = run_command("run img_writeramdisk", 0); break; case FIT_SUBTYPE_SPL_IMAGE: - ret = run_command2("run img_writespl", 0); + ret = run_command("run img_writespl", 0); break; case FIT_SUBTYPE_UBL_HEADER: ret = ait_writeublheader(); break; case FIT_SUBTYPE_UBOOT_IMAGE: - ret = run_command2("run img_writeuboot", 0); + ret = run_command("run img_writeuboot", 0); break; default: /* not supported type */ @@ -731,8 +732,19 @@ static int ait_menu_install_images(void) count++; } /* now save dvn_* and img_volume env vars to new values */ - if (ret == 0) - ret = run_command2("run savenewvers", 0); + if (ret == 0) { + t = getenv("x_dvn_boot_vers"); + if (t) + setenv("dvn_boot_vers", t); + + t = getenv("x_dvn_app_vers"); + if (t) + setenv("dvn_boot_vers", t); + + setenv("x_dvn_boot_vers", NULL); + setenv("x_dvn_app_vers", NULL); + ret = run_command("run savenewvers", 0); + } return ret; } @@ -749,6 +761,8 @@ static int ait_menu_evaluate_load(char *choice) break; case '2': /* cancel, back to main */ + setenv("x_dvn_boot_vers", NULL); + setenv("x_dvn_app_vers", NULL); break; } @@ -865,7 +879,7 @@ static int ait_menu_check_image(void) int found_uboot = -1; int found_ramdisk = -1; - memset(images, 0, sizeof(images)); + memset(imgs, 0, sizeof(imgs)); s = getenv("fit_addr_r"); fit_addr = s ? (unsigned long)simple_strtol(s, NULL, 16) : \ CONFIG_BOARD_IMG_ADDR_R; @@ -911,7 +925,7 @@ static int ait_menu_check_image(void) fit_image_print(addr, noffset, ""); fit_image_get_type(addr, noffset, - &images[count].type); + &imgs[count].type); /* Mandatory properties */ ret = fit_get_desc(addr, noffset, &desc); printf("Description: "); @@ -925,33 +939,33 @@ static int ait_menu_check_image(void) if (ret) { printf("unavailable\n"); } else { - images[count].subtype = ait_subtype_nr(subtype); + imgs[count].subtype = ait_subtype_nr(subtype); printf("%s %d\n", subtype, - images[count].subtype); + imgs[count].subtype); } - sprintf(images[count].desc, "%s", desc); + sprintf(imgs[count].desc, "%s", desc); ret = fit_image_get_data(addr, noffset, - &images[count].data, - &images[count].size); + &imgs[count].data, + &imgs[count].size); printf("Data Size: "); if (ret) printf("unavailable\n"); else - genimg_print_size(images[count].size); - printf("Data @ %p\n", images[count].data); + genimg_print_size(imgs[count].size); + printf("Data @ %p\n", imgs[count].data); count++; } } for (i = 0; i < count; i++) { - if (images[i].subtype == FIT_SUBTYPE_UBOOT_IMAGE) + if (imgs[i].subtype == FIT_SUBTYPE_UBOOT_IMAGE) found_uboot = i; - if (images[i].type == IH_TYPE_RAMDISK) { + if (imgs[i].type == IH_TYPE_RAMDISK) { found_ramdisk = i; - images[i].subtype = FIT_SUBTYPE_RAMDISK_IMAGE; + imgs[i].subtype = FIT_SUBTYPE_RAMDISK_IMAGE; } } @@ -959,31 +973,31 @@ static int ait_menu_check_image(void) if (found_uboot >= 0) { s = getenv("dvn_boot_vers"); if (s) { - ret = strcmp(s, images[found_uboot].desc); + ret = strcmp(s, imgs[found_uboot].desc); if (ret != 0) { - setenv("dvn_boot_vers", - images[found_uboot].desc); + setenv("x_dvn_boot_vers", + imgs[found_uboot].desc); } else { found_uboot = -1; printf("no new uboot version\n"); } } else { - setenv("dvn_boot_vers", images[found_uboot].desc); + setenv("dvn_boot_vers", imgs[found_uboot].desc); } } if (found_ramdisk >= 0) { s = getenv("dvn_app_vers"); if (s) { - ret = strcmp(s, images[found_ramdisk].desc); + ret = strcmp(s, imgs[found_ramdisk].desc); if (ret != 0) { - setenv("dvn_app_vers", - images[found_ramdisk].desc); + setenv("x_dvn_app_vers", + imgs[found_ramdisk].desc); } else { found_ramdisk = -1; printf("no new ramdisk version\n"); } } else { - setenv("dvn_app_vers", images[found_ramdisk].desc); + setenv("dvn_app_vers", imgs[found_ramdisk].desc); } } if ((found_uboot == -1) && (found_ramdisk == -1)) @@ -1005,7 +1019,7 @@ static int ait_menu_evaluate_update(char *choice) break; case '2': /* load image */ - ret = run_command2("run load_img", 0); + ret = run_command("run load_img", 0); printf("ret: %d\n", ret); if (ret) return MENU_UPDATE; @@ -1073,9 +1087,9 @@ int menu_show(int bootdelay) { int ret; - run_command2("run saveparms", 0); + run_command("run saveparms", 0); ret = ait_menu_show(&ait_main, bootdelay); - run_command2("run restoreparms", 0); + run_command("run restoreparms", 0); if (ret == MENU_EXIT_BOOTCMD) return 0; @@ -1085,8 +1099,17 @@ int menu_show(int bootdelay) void menu_display_statusline(struct menu *m) { - printf("State: dvn_boot_vers: %s dvn_app_vers: %s\n", - getenv("dvn_boot_vers"), getenv("dvn_app_vers")); + char *s1, *s2; + + s1 = getenv("x_dvn_boot_vers"); + if (!s1) + s1 = getenv("dvn_boot_vers"); + + s2 = getenv("x_dvn_app_vers"); + if (!s2) + s2 = getenv("dvn_app_vers"); + + printf("State: dvn_boot_vers: %s dvn_app_vers: %s\n", s1, s2); return; } #endif diff --git a/board/ait/cam_enc_4xx/config.mk b/board/ait/cam_enc_4xx/config.mk index b1f9b6c..744b927 100644 --- a/board/ait/cam_enc_4xx/config.mk +++ b/board/ait/cam_enc_4xx/config.mk @@ -12,4 +12,11 @@ PAD_TO := 12320 UBL_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/ublimage.cfg ifndef CONFIG_SPL_BUILD ALL-y += $(obj)u-boot.ubl +else +# as SPL_TEXT_BASE is not page-aligned, we need for some +# linkers the -n flag (Do not page align data), to prevent +# the following error message: +# arm-linux-ld: u-boot-spl: Not enough room for program headers, try linking +# with -N +LDFLAGS_u-boot-spl += -n endif diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds b/board/ait/cam_enc_4xx/u-boot-spl.lds index 6f6e065..52c986e 100644 --- a/board/ait/cam_enc_4xx/u-boot-spl.lds +++ b/board/ait/cam_enc_4xx/u-boot-spl.lds @@ -32,7 +32,7 @@ OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { - . = 0x00000000; + . = CONFIG_SPL_TEXT_BASE; . = ALIGN(4); .text : diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c index 9b6c4c0..43632c2 100644 --- a/board/davinci/ea20/ea20.c +++ b/board/davinci/ea20/ea20.c @@ -35,7 +35,7 @@ #include <asm/arch/emac_defs.h> #include <asm/io.h> #include <asm/arch/davinci_misc.h> -#include <asm/arch/gpio.h> +#include <asm/gpio.h> #include <asm/arch/da8xx-fb.h> DECLARE_GLOBAL_DATA_PTR; @@ -172,37 +172,24 @@ static const struct lpsc_resource lpsc[] = { int board_early_init_f(void) { - struct davinci_gpio *gpio6_base = - (struct davinci_gpio *)DAVINCI_GPIO_BANK67; - /* PinMux for GPIO */ if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) return 1; /* Set the RESETOUTn low */ - writel((readl(&gpio6_base->set_data) & ~(1 << 15)), - &gpio6_base->set_data); - writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir); + gpio_direction_output(111, 0); /* Set U0_SW0 low for UART0 as console*/ - writel((readl(&gpio6_base->set_data) & ~(1 << 10)), - &gpio6_base->set_data); - writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir); + gpio_direction_output(106, 0); /* Set U0_SW1 low for UART0 as console*/ - writel((readl(&gpio6_base->set_data) & ~(1 << 12)), - &gpio6_base->set_data); - writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir); + gpio_direction_output(108, 0); /* Set LCD_B_PWR low to power down LCD Backlight*/ - writel((readl(&gpio6_base->set_data) & ~(1 << 6)), - &gpio6_base->set_data); - writel((readl(&gpio6_base->dir) & ~(1 << 6)), &gpio6_base->dir); + gpio_direction_output(102, 0); /* Set DISP_ON low to disable LCD output*/ - writel((readl(&gpio6_base->set_data) & ~(1 << 1)), - &gpio6_base->set_data); - writel((readl(&gpio6_base->dir) & ~(1 << 1)), &gpio6_base->dir); + gpio_direction_output(97, 0); #ifndef CONFIG_USE_IRQ irq_init(); @@ -264,12 +251,10 @@ int board_early_init_f(void) &davinci_syscfg_regs->mstpri[2]); /* Set LCD_B_PWR low to power up LCD Backlight*/ - writel((readl(&gpio6_base->set_data) | (1 << 6)), - &gpio6_base->set_data); + gpio_set_value(102, 1); /* Set DISP_ON low to disable LCD output*/ - writel((readl(&gpio6_base->set_data) | (1 << 1)), - &gpio6_base->set_data); + gpio_set_value(97, 1); return 0; } @@ -291,17 +276,12 @@ int board_init(void) int board_late_init(void) { - struct davinci_gpio *gpio8_base = - (struct davinci_gpio *)DAVINCI_GPIO_BANK8; - /* PinMux for HALTEN */ if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0) return 1; /* Set HALTEN to high */ - writel((readl(&gpio8_base->set_data) | (1 << 6)), - &gpio8_base->set_data); - writel((readl(&gpio8_base->dir) & ~(1 << 6)), &gpio8_base->dir); + gpio_direction_output(134, 1); setenv("stdout", "serial"); diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c index 86d7d87..a04fe18 100644 --- a/board/denx/m28evk/spl_boot.c +++ b/board/denx/m28evk/spl_boot.c @@ -31,7 +31,7 @@ #include <asm/arch/sys_proto.h> #define MUX_CONFIG_LED (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) -#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA) +#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) #define MUX_CONFIG_TSC (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) #define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP) #define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP) @@ -68,19 +68,17 @@ const iomux_cfg_t iomux_setup[] = { MX28_PAD_LCD_D21__LCD_D21 | MUX_CONFIG_LCD, MX28_PAD_LCD_D22__LCD_D22 | MUX_CONFIG_LCD, MX28_PAD_LCD_D23__LCD_D23 | MUX_CONFIG_LCD, - MX28_PAD_LCD_RD_E__LCD_VSYNC | MUX_CONFIG_LCD, - MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MUX_CONFIG_LCD, - MX28_PAD_LCD_RS__LCD_DOTCLK | MUX_CONFIG_LCD, - MX28_PAD_LCD_CS__LCD_CS | MUX_CONFIG_LCD, - MX28_PAD_LCD_VSYNC__LCD_VSYNC | MUX_CONFIG_LCD, - MX28_PAD_LCD_HSYNC__LCD_HSYNC | MUX_CONFIG_LCD, MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MUX_CONFIG_LCD, - MX28_PAD_LCD_ENABLE__GPIO_1_31 | MUX_CONFIG_LCD, - MX28_PAD_LCD_RESET__GPIO_3_30 | MUX_CONFIG_LCD, + MX28_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD, /* UART1 */ +#ifdef CONFIG_DENX_M28_V10 + MX28_PAD_AUART0_CTS__DUART_RX, + MX28_PAD_AUART0_RTS__DUART_TX, +#else MX28_PAD_PWM0__DUART_RX, MX28_PAD_PWM1__DUART_TX, +#endif MX28_PAD_AUART0_TX__DUART_RTS, MX28_PAD_AUART0_RX__DUART_CTS, diff --git a/board/dvlhost/dvlhost.c b/board/dvlhost/dvlhost.c index 561e47f..c2c67cc 100644 --- a/board/dvlhost/dvlhost.c +++ b/board/dvlhost/dvlhost.c @@ -46,8 +46,6 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_DVLHOST; - /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c index fd021a3..e99f437 100644 --- a/board/egnite/ethernut5/ethernut5.c +++ b/board/egnite/ethernut5/ethernut5.c @@ -77,6 +77,7 @@ #include <spi.h> #include <dataflash.h> #include <mmc.h> +#include <atmel_mci.h> #include <asm/arch/at91sam9260.h> #include <asm/arch/at91sam9260_matrix.h> diff --git a/board/emk/top9000/top9000.c b/board/emk/top9000/top9000.c index e0b4cf2..86a8d0b 100644 --- a/board/emk/top9000/top9000.c +++ b/board/emk/top9000/top9000.c @@ -29,6 +29,7 @@ #include <net.h> #include <netdev.h> #include <mmc.h> +#include <atmel_mci.h> #include <i2c.h> #include <spi.h> #include <asm/io.h> diff --git a/board/enbw/enbw_cmc/enbw_cmc.c b/board/enbw/enbw_cmc/enbw_cmc.c index 16d1b08..6c0d931 100644 --- a/board/enbw/enbw_cmc/enbw_cmc.c +++ b/board/enbw/enbw_cmc/enbw_cmc.c @@ -525,7 +525,7 @@ void bootcount_store(ulong a) /* * write RTC kick register to enable write - * for RTC Scratch registers. Cratch0 and 1 are + * for RTC Scratch registers. Scratch0 and 1 are * used for bootcount values. */ writel(RTC_KICK0R_WE, ®->kick0r); diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index e90e39e..2d21584 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -287,7 +287,7 @@ int board_init(void) int board_eth_init(bd_t *bis) { - int rc = 0; + int rc = -ENODEV; weim_smc911x_iomux(); weim_cs1_settings(); diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index f884bb5..1d09a72 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -140,12 +140,30 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); } +iomux_v3_cfg_t usb_pads[] = { + MX6Q_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); } +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(GPIO_NUMBER(7, 12), 0); + mdelay(2); + gpio_set_value(GPIO_NUMBER(7, 12), 1); + + return 0; +} +#endif + #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR, 1}, @@ -197,6 +215,11 @@ int board_mmc_init(bd_t *bis) } #endif +u32 get_board_rev(void) +{ + return 0x63000 ; +} + #ifdef CONFIG_MXC_SPI iomux_v3_cfg_t ecspi1_pads[] = { /* SS1 */ @@ -241,10 +264,6 @@ int board_eth_init(bd_t *bis) if (ret) printf("FEC MXC: %s:failed\n", __func__); -#ifdef CONFIG_MXC_SPI - setup_spi(); -#endif - return 0; } @@ -260,6 +279,10 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + return 0; } diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c index b0aa182..f41bf05 100644 --- a/board/highbank/highbank.c +++ b/board/highbank/highbank.c @@ -17,9 +17,18 @@ #include <common.h> #include <ahci.h> +#include <netdev.h> #include <scsi.h> #include <asm/sizes.h> +#include <asm/io.h> + +#define HB_SREG_A9_PWR_REQ 0xfff3cf00 +#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 +#define HB_PWR_SUSPEND 0 +#define HB_PWR_SOFT_RESET 1 +#define HB_PWR_HARD_RESET 2 +#define HB_PWR_SHUTDOWN 3 DECLARE_GLOBAL_DATA_PTR; @@ -47,8 +56,20 @@ int board_eth_init(bd_t *bis) int misc_init_r(void) { + char envbuffer[16]; + u32 boot_choice; + ahci_init(0xffe08000); scsi_scan(1); + + boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; + sprintf(envbuffer, "bootcmd%d", boot_choice); + if (getenv(envbuffer)) { + sprintf(envbuffer, "run bootcmd%d", boot_choice); + setenv("bootcmd", envbuffer); + } else + setenv("bootcmd", ""); + return 0; } @@ -66,4 +87,6 @@ void dram_init_banksize(void) void reset_cpu(ulong addr) { + writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); + asm(" wfi"); } diff --git a/board/jornada/u-boot.lds b/board/jornada/u-boot.lds deleted file mode 100644 index c75b21f..0000000 --- a/board/jornada/u-boot.lds +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * 2004 (c) MontaVista Software, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - cpu/sa1100/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { *(.data) } - - . = ALIGN(4); - .got : { *(.got) } - - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - __bss_start = .; - .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } - __bss_end__ = .; -} diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index e8253a0..85dd359 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -33,6 +33,8 @@ #include <asm/arch/pinmux.h> #include <asm/arch/uart.h> #include <spi.h> +#include <asm/arch/usb.h> +#include <i2c.h> #include "board.h" DECLARE_GLOBAL_DATA_PTR; @@ -50,6 +52,12 @@ int timer_init(void) return 0; } +void __pin_mux_usb(void) +{ +} + +void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb"))); + /* * Routine: board_init * Description: Early hardware init. @@ -68,6 +76,17 @@ int board_init(void) #endif /* boot param addr */ gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100); +#ifdef CONFIG_TEGRA_I2C +#ifndef CONFIG_SYS_I2C_INIT_BOARD +#error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards" +#endif + i2c_init_board(); +#endif + +#ifdef CONFIG_USB_EHCI_TEGRA + pin_mux_usb(); + board_usb_init(gd->fdt_blob); +#endif return 0; } diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h index a638af2..09fb158 100644 --- a/board/nvidia/common/board.h +++ b/board/nvidia/common/board.h @@ -27,4 +27,10 @@ void gpio_config_uart(void); void gpio_early_init_uart(void); +/* + * Set up any pin muxing needed for USB (for now, since fdt doesn't support + * it). Boards can overwrite the default fucction which does nothing. + */ +void pin_mux_usb(void); + #endif /* BOARD_H */ diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra2-seaboard.dts new file mode 100644 index 0000000..6ba3ec4 --- /dev/null +++ b/board/nvidia/dts/tegra2-seaboard.dts @@ -0,0 +1,92 @@ +/dts-v1/; + +/memreserve/ 0x1c000000 0x04000000; +/include/ ARCH_CPU_DTS + +/ { + model = "NVIDIA Seaboard"; + compatible = "nvidia,seaboard", "nvidia,tegra20"; + + chosen { + bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; + }; + + aliases { + /* This defines the order of our USB ports */ + usb0 = "/usb@c5008000"; + usb1 = "/usb@c5000000"; + + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x40000000 >; + }; + + /* This is not used in U-Boot, but is expected to be in kernel .dts */ + i2c@7000d000 { + clock-frequency = <100000>; + pmic@34 { + compatible = "ti,tps6586x"; + reg = <0x34>; + + clk_32k: clock { + compatible = "fixed-clock"; + /* + * leave out for now due to CPP: + * #clock-cells = <0>; + */ + clock-frequency = <32768>; + }; + }; + }; + + clocks { + osc { + clock-frequency = <12000000>; + }; + }; + + clock@60006000 { + clocks = <&clk_32k &osc>; + }; + + serial@70006300 { + clock-frequency = < 216000000 >; + }; + + sdhci@c8000400 { + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + }; + + sdhci@c8000600 { + support-8bit; + }; + + usb@c5000000 { + nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ + dr_mode = "otg"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + i2c@7000c000 { + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + clock-frequency = <100000>; + }; +}; diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 9ab6825..94efb1e 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -90,3 +90,9 @@ int board_mmc_init(bd_t *bd) return 0; } #endif + +void pin_mux_usb(void) +{ + /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */ + pinmux_tristate_disable(PINGRP_SLXK); +} diff --git a/board/omicron/calimain/calimain.c b/board/omicron/calimain/calimain.c index 97ba74a..54415ce 100644 --- a/board/omicron/calimain/calimain.c +++ b/board/omicron/calimain/calimain.c @@ -166,7 +166,7 @@ void bootcount_store(ulong a) /* * write RTC kick register to enable write - * for RTC Scratch registers. Cratch0 and 1 are + * for RTC Scratch registers. Scratch0 and 1 are * used for bootcount values. */ writel(RTC_KICK0R_WE, ®->kick0r); diff --git a/board/prodrive/pdnb3/nand.c b/board/prodrive/pdnb3/nand.c index 2efe027..6d1f203 100644 --- a/board/prodrive/pdnb3/nand.c +++ b/board/prodrive/pdnb3/nand.c @@ -96,16 +96,8 @@ static void pdnb3_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) { int i; - if (len % 4) { - for (i = 0; i < len; i++) - buf[i] = readb(&(pdnb3_ndfc->data)); - } else { - ulong *ptr = (ulong *)buf; - int count = len >> 2; - - for (i = 0; i < count; i++) - *ptr++ = readl(&(pdnb3_ndfc->data)); - } + for (i = 0; i < len; i++) + buf[i] = readb(&(pdnb3_ndfc->data)); } static int pdnb3_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) @@ -121,12 +113,10 @@ static int pdnb3_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int le static int pdnb3_nand_dev_ready(struct mtd_info *mtd) { - volatile u_char val; - /* * Blocking read to wait for NAND to be ready */ - val = readb(&(pdnb3_ndfc->wait)); + readb(&(pdnb3_ndfc->wait)); /* * Return always true diff --git a/board/prodrive/pdnb3/pdnb3.c b/board/prodrive/pdnb3/pdnb3.c index 3aaebf2..d3ee133 100644 --- a/board/prodrive/pdnb3/pdnb3.c +++ b/board/prodrive/pdnb3/pdnb3.c @@ -46,9 +46,6 @@ static unsigned long old_val = 0; */ int board_init(void) { - /* arch number of PDNB3 */ - gd->bd->bi_arch_number = MACH_TYPE_PDNB3; - /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 928c08f..32786e2 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -224,11 +224,51 @@ static void board_uart_init(void) (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); int i; - /* UART1 GPIOs (part1) : GPA0CON[7:4] 0x2222 */ - for (i = 4; i < 8; i++) { + /* + * UART0 GPIOs : GPA0CON[3:0] 0x2222 + * Must set CFG17 switches to select UART0 to use. + */ + for (i = 0; i <= 3; i++) { s5p_gpio_set_pull(&gpio1->a0, i, GPIO_PULL_NONE); s5p_gpio_cfg_pin(&gpio1->a0, i, GPIO_FUNC(0x2)); } + + /* + * UART1 GPIOs : GPA0CON[5:4] 0x22 + * Must set CFG17 switches to select UART1 to use. + * + * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down + * in order to use them (so that those pins can be used for I2C). + */ + for (i = 4; i <= 5; i++) { + s5p_gpio_set_pull(&gpio1->a0, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio1->a0, i, GPIO_FUNC(0x2)); + } + + /* + * UART2 GPIOs : GPA1CON[1:0] 0x22 + * Must set CFG17 switches to select UART2 to use. + * + * This only sets RXD/TXD, as RTS/CTS need a resistor soldered down + * in order to use them (so that those pins can be used for I2C). + */ + for (i = 0; i <= 1; i++) { + s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC(0x2)); + } + + /* + * UART3 GPIOs : GPA1CON[5:4] 0x22 + * Must set CFG16 switches to select UART3 to use. + */ + for (i = 4; i <= 5; i++) { + s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE); + s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC(0x2)); + } + + /* + * There's no mux for UART4--it's internal only + */ } #ifdef CONFIG_BOARD_EARLY_INIT_F diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c index 50c70ab..b927586 100644 --- a/board/technexion/twister/twister.c +++ b/board/technexion/twister/twister.c @@ -136,3 +136,26 @@ int board_mmc_init(bd_t *bis) return omap_mmc_init(0); } #endif + +#ifdef CONFIG_SPL_OS_BOOT +/* + * Do board specific preperation before SPL + * Linux boot + */ +void spl_board_prepare_for_linux(void) +{ + /* init cs for extern lan */ + enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], + CONFIG_SMC911X_BASE, GPMC_SIZE_16M); +} +int spl_start_uboot(void) +{ + int val = 0; + if (!gpio_request(CONFIG_SPL_OS_BOOT_KEY, "U-Boot key")) { + gpio_direction_input(CONFIG_SPL_OS_BOOT_KEY); + val = gpio_get_value(CONFIG_SPL_OS_BOOT_KEY); + gpio_free(CONFIG_SPL_OS_BOOT_KEY); + } + return val; +} +#endif diff --git a/board/teejet/mt_ventoux/mt_ventoux.h b/board/teejet/mt_ventoux/mt_ventoux.h index 34c1ec5..9b2e43e 100644 --- a/board/teejet/mt_ventoux/mt_ventoux.h +++ b/board/teejet/mt_ventoux/mt_ventoux.h @@ -31,12 +31,11 @@ const omap3_sysinfo sysinfo = { /* FPGA CS1 configuration */ #define FPGA_GPMC_CONFIG1 0x00001200 -#define FPGA_GPMC_CONFIG2 0x00111a00 -#define FPGA_GPMC_CONFIG3 0x00010100 -#define FPGA_GPMC_CONFIG4 0x06041a04 -#define FPGA_GPMC_CONFIG5 0x0019101a -#define FPGA_GPMC_CONFIG6 0x890503c0 -#define FPGA_GPMC_CONFIG7 0x00000860 +#define FPGA_GPMC_CONFIG2 0x00161f00 +#define FPGA_GPMC_CONFIG3 0x00040400 +#define FPGA_GPMC_CONFIG4 0x120c1f08 +#define FPGA_GPMC_CONFIG5 0x001e161f +#define FPGA_GPMC_CONFIG6 0x96080fcf #define FPGA_BASE_ADDR 0x20000000 diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 114ab7e..8b07eef 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -254,7 +254,8 @@ void beagle_display_init(void) /* * Enable DVI power */ -static void beagle_dvi_pup() { +static void beagle_dvi_pup(void) +{ uchar val; switch (get_board_revision()) { diff --git a/board/ti/omap1610inn/Makefile b/board/ti/omap1610inn/Makefile deleted file mode 100644 index 2b8641f..0000000 --- a/board/ti/omap1610inn/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := omap1610innovator.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/ti/omap1610inn/config.mk b/board/ti/omap1610inn/config.mk deleted file mode 100644 index ee0aa0a..0000000 --- a/board/ti/omap1610inn/config.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> -# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> -# -# (C) Copyright 2003 -# Texas Instruments, <www.ti.com> -# Kshitij Gupta <Kshitij@ti.com> -# -# TI Innovator board with OMAP1610 (ARM925EJS) cpu -# see http://www.ti.com/ for more information on Texas Instruments -# -# Innovator has 1 bank of 256 MB SDRAM -# Physical Address: -# 1000'0000 to 2000'0000 -# -# -# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000 -# (mem base + reserved) -# -# we load ourself to 1108'0000 -# -# - - -CONFIG_SYS_TEXT_BASE = 0x11080000 diff --git a/board/ti/omap1610inn/flash.c b/board/ti/omap1610inn/flash.c deleted file mode 100644 index a99a91c..0000000 --- a/board/ti/omap1610inn/flash.c +++ /dev/null @@ -1,495 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2003 - * Texas Instruments, <www.ti.com> - * Kshitij Gupta <Kshitij@ti.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/byteorder/swab.h> - -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */ -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Board support for 1 or 2 flash devices */ -#undef FLASH_PORT_WIDTH32 -#define FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -#define FLASH_PORT_WIDTH ushort -#define FLASH_PORT_WIDTHV vu_short -#define SWAP(x) __swab16(x) -#else -#define FLASH_PORT_WIDTH ulong -#define FLASH_PORT_WIDTHV vu_long -#define SWAP(x) __swab32(x) -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - - -/* Flash Organization Structure */ -typedef struct OrgDef { - unsigned int sector_number; - unsigned int sector_size; -} OrgDef; - - -/* Flash Organizations */ -OrgDef OrgIntel_28F256L18T[] = { - {4, 32 * 1024}, /* 4 * 32kBytes sectors */ - {255, 128 * 1024}, /* 255 * 128kBytes sectors */ -}; - - -/*----------------------------------------------------------------------- - * Functions - */ -unsigned long flash_init (void); -static ulong flash_get_size (FPW * addr, flash_info_t * info); -static int write_data (flash_info_t * info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t * info); -void inline spin_wheel (void); -void flash_print_info (flash_info_t * info); -void flash_unprotect_sectors (FPWV * addr); -int flash_erase (flash_info_t * info, int s_first, int s_last); -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt); -void flash_unlock(flash_info_t * info); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((FPW *) CONFIG_SYS_FLASH_BASE, &flash_info[i]); - flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[i]); - /* to reset the lock bit */ - flash_unlock(&flash_info[i]); - break; - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_unlock(flash_info_t * info) -{ - int j; - for (j=2;j<CONFIG_SYS_MAX_FLASH_SECT;j++){ - FPWV *addr = (FPWV *) (info->start[j]); - flash_unprotect_sectors (addr); - *addr = (FPW) 0x00500050;/* clear status register */ - *addr = (FPW) 0x00FF00FF;/* resest to read mode */ - } -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - if (i > 255) { - info->start[i] = base + (i * 0x8000); - info->protect[i] = 0; - } else { - info->start[i] = base + - (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F256L18T: - printf ("FLASH 28F256L18T\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW * addr, flash_info_t * info) -{ - volatile FPW value; - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW) 0x00AA00AA; - addr[0x2AAA] = (FPW) 0x00550055; - addr[0x5555] = (FPW) 0x00900090; - - mb (); - value = addr[0]; - - switch (value) { - - case (FPW) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb (); - value = addr[1]; /* device ID */ - switch (value) { - - case (FPW) (INTEL_ID_28F256L18T): - info->flash_id += FLASH_28F256L18T; - info->sector_count = 259; - info->size = 0x02000000; - break; /* => 32 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - - return (info->size); -} - - -/* unprotects a sector for write and erase - * on some intel parts, this unprotects the entire chip, but it - * wont hurt to call this additional times per sector... - */ -void flash_unprotect_sectors (FPWV * addr) -{ -#define PD_FINTEL_WSMS_READY_MASK 0x0080 - - *addr = (FPW) 0x00500050; /* clear status register */ - - /* this sends the clear lock bit command */ - *addr = (FPW) 0x00600060; - *addr = (FPW) 0x00D000D0; -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag, prot, sect; - ulong type, start; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *) (info->start[sect]); - FPW status; - - printf ("Erasing sector %2d ... ", sect); - - flash_unprotect_sectors (addr); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - *addr = (FPW) 0x00500050;/* clear status register */ - *addr = (FPW) 0x00200020;/* erase setup */ - *addr = (FPW) 0x00D000D0;/* erase confirm */ - - while (((status = - *addr) & (FPW) 0x00800080) != - (FPW) 0x00800080) { - if (get_timer(start) > - CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - /* suspend erase */ - *addr = (FPW) 0x00B000B0; - /* reset to read mode */ - *addr = (FPW) 0x00FF00FF; - rcode = 1; - break; - } - } - - /* clear status register cmd. */ - *addr = (FPW) 0x00500050; - *addr = (FPW) 0x00FF00FF;/* resest to read mode */ - printf (" done\n"); - } - } - if (flag) - enable_interrupts(); - - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 - wp = (addr & ~1); - port_width = 2; -#else - wp = (addr & ~3); - port_width = 4; -#endif - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data (info, wp, SWAP (data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t * info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *) dest; - ulong status; - int flag, rc = 0; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf("not erased at %08lx (%x)\n", (ulong) addr, *addr); - return 2; - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - *addr = (FPW) 0x00400040; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - rc = 1; - goto done; - } - } -done: - if (flag) - enable_interrupts(); - - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return rc; -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/ti/omap1610inn/lowlevel_init.S b/board/ti/omap1610inn/lowlevel_init.S deleted file mode 100644 index b376ba5..0000000 --- a/board/ti/omap1610inn/lowlevel_init.S +++ /dev/null @@ -1,452 +0,0 @@ -/* - * Board specific setup info - * - * (C) Copyright 2003 - * Texas Instruments, <www.ti.com> - * Kshitij Gupta <Kshitij@ti.com> - * - * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> - -#if defined(CONFIG_OMAP1610) -#include <./configs/omap1510.h> -#endif - - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ - -.globl lowlevel_init -lowlevel_init: - - - /*------------------------------------------------------* - *mask all IRQs by setting all bits in the INTMR default* - *------------------------------------------------------*/ - mov r1, #0xffffffff - ldr r0, =REG_IHL1_MIR - str r1, [r0] - ldr r0, =REG_IHL2_MIR - str r1, [r0] - - /*------------------------------------------------------* - * Set up ARM CLM registers (IDLECT1) * - *------------------------------------------------------*/ - ldr r0, REG_ARM_IDLECT1 - ldr r1, VAL_ARM_IDLECT1 - str r1, [r0] - - /*------------------------------------------------------* - * Set up ARM CLM registers (IDLECT2) * - *------------------------------------------------------*/ - ldr r0, REG_ARM_IDLECT2 - ldr r1, VAL_ARM_IDLECT2 - str r1, [r0] - - /*------------------------------------------------------* - * Set up ARM CLM registers (IDLECT3) * - *------------------------------------------------------*/ - ldr r0, REG_ARM_IDLECT3 - ldr r1, VAL_ARM_IDLECT3 - str r1, [r0] - -#ifdef CONFIG_CS_AUTOBOOT /* do the setup depending on boot mode */ - ldr r0, CONF_STATUS - ldr r1, [r0] - tst r1, #0x02 - beq disable_wd /* booting from RAM, skip setup */ -#endif - - mov r1, #0x01 /* PER_EN bit */ - ldr r0, REG_ARM_RSTCT2 - strh r1, [r0] /* CLKM; Peripheral reset. */ - - /* Set CLKM to Sync-Scalable */ - /* I supposedly need to enable the dsp clock before switching */ - mov r1, #0x0000 - ldr r0, REG_ARM_SYSST - strh r1, [r0] - mov r0, #0x400 -1: - subs r0, r0, #0x1 /* wait for any bubbles to finish */ - bne 1b - ldr r1, VAL_ARM_CKCTL - ldr r0, REG_ARM_CKCTL - strh r1, [r0] - - /* a few nops to let settle */ - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - - /* setup DPLL 1 */ - /* Ramp up the clock to 96Mhz */ - ldr r1, VAL_DPLL1_CTL - ldr r0, REG_DPLL1_CTL - strh r1, [r0] - ands r1, r1, #0x10 /* Check if PLL is enabled. */ - beq lock_end /* Do not look for lock if BYPASS selected */ -2: - ldrh r1, [r0] - ands r1, r1, #0x01 /* Check the LOCK bit.*/ - beq 2b /* loop until bit goes hi. */ -lock_end: - - - /*------------------------------------------------------* - * Turn off the watchdog during init... * - *------------------------------------------------------*/ -disable_wd: - ldr r0, REG_WATCHDOG - ldr r1, WATCHDOG_VAL1 - str r1, [r0] - ldr r1, WATCHDOG_VAL2 - str r1, [r0] - ldr r0, REG_WSPRDOG - ldr r1, WSPRDOG_VAL1 - str r1, [r0] - ldr r0, REG_WWPSDOG - -watch1Wait: - ldr r1, [r0] - tst r1, #0x10 - bne watch1Wait - - ldr r0, REG_WSPRDOG - ldr r1, WSPRDOG_VAL2 - str r1, [r0] - ldr r0, REG_WWPSDOG -watch2Wait: - ldr r1, [r0] - tst r1, #0x10 - bne watch2Wait - - - /* Set memory timings corresponding to the new clock speed */ - - /* Check execution location to determine current execution location - * and branch to appropriate initialization code. - */ - /* Load physical SDRAM base. */ - mov r0, #0x10000000 - /* Get current execution location. */ - mov r1, pc - /* Compare. */ - cmp r1, r0 - /* Skip over EMIF-fast initialization if running from SDRAM. */ - bge skip_sdram - - /* - * Delay for SDRAM initialization. - */ - mov r3, #0x1800 /* value should be checked */ -3: - subs r3, r3, #0x1 /* Decrement count */ - bne 3b - - - /* - * Set SDRAM control values. Disable refresh before MRS command. - */ - - /* mobile ddr operation */ - ldr r0, REG_SDRAM_OPERATION - mov r2, #07 - str r2, [r0] - - /* config register */ - ldr r0, REG_SDRAM_CONFIG - ldr r1, SDRAM_CONFIG_VAL - str r1, [r0] - - /* manual command register */ - ldr r0, REG_SDRAM_MANUAL_CMD - /* issue set cke high */ - mov r1, #CMD_SDRAM_CKE_SET_HIGH - str r1, [r0] - /* issue nop */ - mov r1, #CMD_SDRAM_NOP - str r1, [r0] - - mov r2, #0x0100 -waitMDDR1: - subs r2, r2, #1 - bne waitMDDR1 /* delay loop */ - - /* issue precharge */ - mov r1, #CMD_SDRAM_PRECHARGE - str r1, [r0] - - /* issue autorefresh x 2 */ - mov r1, #CMD_SDRAM_AUTOREFRESH - str r1, [r0] - str r1, [r0] - - /* mrs register ddr mobile */ - ldr r0, REG_SDRAM_MRS - mov r1, #0x33 - str r1, [r0] - - /* emrs1 low-power register */ - ldr r0, REG_SDRAM_EMRS1 - /* self refresh on all banks */ - mov r1, #0 - str r1, [r0] - - ldr r0, REG_DLL_URD_CONTROL - ldr r1, DLL_URD_CONTROL_VAL - str r1, [r0] - - ldr r0, REG_DLL_LRD_CONTROL - ldr r1, DLL_LRD_CONTROL_VAL - str r1, [r0] - - ldr r0, REG_DLL_WRT_CONTROL - ldr r1, DLL_WRT_CONTROL_VAL - str r1, [r0] - - /* delay loop */ - mov r2, #0x0100 -waitMDDR2: - subs r2, r2, #1 - bne waitMDDR2 - - /* - * Delay for SDRAM initialization. - */ - mov r3, #0x1800 -4: - subs r3, r3, #1 /* Decrement count. */ - bne 4b - b common_tc - -skip_sdram: - - ldr r0, REG_SDRAM_CONFIG - ldr r1, SDRAM_CONFIG_VAL - str r1, [r0] - -common_tc: - /* slow interface */ - ldr r1, VAL_TC_EMIFS_CS0_CONFIG - ldr r0, REG_TC_EMIFS_CS0_CONFIG - str r1, [r0] /* Chip Select 0 */ - - ldr r1, VAL_TC_EMIFS_CS1_CONFIG - ldr r0, REG_TC_EMIFS_CS1_CONFIG - str r1, [r0] /* Chip Select 1 */ - ldr r1, VAL_TC_EMIFS_CS3_CONFIG - ldr r0, REG_TC_EMIFS_CS3_CONFIG - str r1, [r0] /* Chip Select 3 */ - -#ifdef CONFIG_H2_OMAP1610 - /* inserting additional 2 clock cycle hold time for LAN */ - ldr r0, REG_TC_EMIFS_CS1_ADVANCED - ldr r1, VAL_TC_EMIFS_CS1_ADVANCED - str r1, [r0] -#endif - /* Start MPU Timer 1 */ - ldr r0, REG_MPU_LOAD_TIMER - ldr r1, VAL_MPU_LOAD_TIMER - str r1, [r0] - - ldr r0, REG_MPU_CNTL_TIMER - ldr r1, VAL_MPU_CNTL_TIMER - str r1, [r0] - - /* back to arch calling code */ - mov pc, lr - - /* the literal pools origin */ - .ltorg - -#ifdef CONFIG_CS_AUTOBOOT -CONF_STATUS: - .word 0xfffe1130 /* 32 bits */ -#endif - -REG_TC_EMIFS_CONFIG: /* 32 bits */ - .word 0xfffecc0c -REG_TC_EMIFS_CS0_CONFIG: /* 32 bits */ - .word 0xfffecc10 -REG_TC_EMIFS_CS1_CONFIG: /* 32 bits */ - .word 0xfffecc14 -REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */ - .word 0xfffecc18 -REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */ - .word 0xfffecc1c - -#ifdef CONFIG_H2_OMAP1610 -REG_TC_EMIFS_CS1_ADVANCED: /* 32 bits */ - .word 0xfffecc54 -#endif - -/* MPU clock/reset/power mode control registers */ -REG_ARM_CKCTL: /* 16 bits */ - .word 0xfffece00 - -REG_ARM_IDLECT3: /* 16 bits */ - .word 0xfffece24 -REG_ARM_IDLECT2: /* 16 bits */ - .word 0xfffece08 -REG_ARM_IDLECT1: /* 16 bits */ - .word 0xfffece04 - -REG_ARM_RSTCT2: /* 16 bits */ - .word 0xfffece14 -REG_ARM_SYSST: /* 16 bits */ - .word 0xfffece18 -/* DPLL control registers */ -REG_DPLL1_CTL: /* 16 bits */ - .word 0xfffecf00 - -/* Watch Dog register */ -/* secure watchdog stop */ -REG_WSPRDOG: - .word 0xfffeb048 -/* watchdog write pending */ -REG_WWPSDOG: - .word 0xfffeb034 - -WSPRDOG_VAL1: - .word 0x0000aaaa -WSPRDOG_VAL2: - .word 0x00005555 - -/* SDRAM config is: auto refresh enabled, 16 bit 4 bank, - counter @8192 rows, 10 ns, 8 burst */ -REG_SDRAM_CONFIG: - .word 0xfffecc20 - -/* Operation register */ -REG_SDRAM_OPERATION: - .word 0xfffecc80 - -/* Manual command register */ -REG_SDRAM_MANUAL_CMD: - .word 0xfffecc84 - -/* SDRAM MRS (New) config is: CAS latency is 2, burst length 8 */ -REG_SDRAM_MRS: - .word 0xfffecc70 - -/* SDRAM MRS (New) config is: CAS latency is 2, burst length 8 */ -REG_SDRAM_EMRS1: - .word 0xfffecc78 - -/* WRT DLL register */ -REG_DLL_WRT_CONTROL: - .word 0xfffecc68 -DLL_WRT_CONTROL_VAL: - .word 0x03f00002 - -/* URD DLL register */ -REG_DLL_URD_CONTROL: - .word 0xfffeccc0 -DLL_URD_CONTROL_VAL: - .word 0x00800002 - -/* LRD DLL register */ -REG_DLL_LRD_CONTROL: - .word 0xfffecccc - -REG_WATCHDOG: - .word 0xfffec808 - -REG_MPU_LOAD_TIMER: - .word 0xfffec504 -REG_MPU_CNTL_TIMER: - .word 0xfffec500 - -/* 96 MHz Samsung Mobile DDR */ -SDRAM_CONFIG_VAL: - .word 0x001200f4 - -DLL_LRD_CONTROL_VAL: - .word 0x00800002 - -VAL_ARM_CKCTL: - .word 0x3000 -VAL_DPLL1_CTL: - .word 0x2830 - -#ifdef CONFIG_INNOVATOROMAP1610 -VAL_TC_EMIFS_CS0_CONFIG: - .word 0x002130b0 -VAL_TC_EMIFS_CS1_CONFIG: - .word 0x00001131 -VAL_TC_EMIFS_CS2_CONFIG: - .word 0x000055f0 -VAL_TC_EMIFS_CS3_CONFIG: - .word 0x88011131 -#endif - -#ifdef CONFIG_H2_OMAP1610 -VAL_TC_EMIFS_CS0_CONFIG: - .word 0x00203331 -VAL_TC_EMIFS_CS1_CONFIG: - .word 0x8180fff3 -VAL_TC_EMIFS_CS2_CONFIG: - .word 0xf800f22a -VAL_TC_EMIFS_CS3_CONFIG: - .word 0x88011131 -VAL_TC_EMIFS_CS1_ADVANCED: - .word 0x00000022 -#endif - -VAL_TC_EMIFF_SDRAM_CONFIG: - .word 0x010290fc -VAL_TC_EMIFF_MRS: - .word 0x00000027 - -VAL_ARM_IDLECT1: - .word 0x00000400 - -VAL_ARM_IDLECT2: - .word 0x00000886 -VAL_ARM_IDLECT3: - .word 0x00000015 - -WATCHDOG_VAL1: - .word 0x000000f5 -WATCHDOG_VAL2: - .word 0x000000a0 - -VAL_MPU_LOAD_TIMER: - .word 0xffffffff -VAL_MPU_CNTL_TIMER: - .word 0xffffffa1 - -/* command values */ -.equ CMD_SDRAM_NOP, 0x00000000 -.equ CMD_SDRAM_PRECHARGE, 0x00000001 -.equ CMD_SDRAM_AUTOREFRESH, 0x00000002 -.equ CMD_SDRAM_CKE_SET_HIGH, 0x00000007 diff --git a/board/ti/omap1610inn/omap1610innovator.c b/board/ti/omap1610inn/omap1610innovator.c deleted file mode 100644 index 16e8237..0000000 --- a/board/ti/omap1610inn/omap1610innovator.c +++ /dev/null @@ -1,309 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> - * - * (C) Copyright 2003 - * Texas Instruments, <www.ti.com> - * Kshitij Gupta <Kshitij@ti.com> - * - * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#if defined(CONFIG_OMAP1610) -#include <./configs/omap1510.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_CS_AUTOBOOT -unsigned long omap_flash_base; -#endif - -void flash__init (void); -void ether__init (void); -void set_muxconf_regs (void); -void peripheral_power_enable (void); - -#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF) - -static inline void delay (unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); -} - -/* - * Miscellaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x10000100; - - /* Configure MUX settings */ - set_muxconf_regs (); - peripheral_power_enable (); - -/* this speeds up your boot a quite a bit. However to make it - * work, you need make sure your kernel startup flush bug is fixed. - * ... rkw ... - */ - icache_enable (); - - flash__init (); - ether__init (); - return 0; -} - - -int misc_init_r (void) -{ - /* currently empty */ - return (0); -} - -/****************************** - Routine: - Description: -******************************/ -void flash__init (void) -{ -#define EMIFS_GlB_Config_REG 0xfffecc0c - unsigned int regval; - -#ifdef CONFIG_CS_AUTOBOOT - /* Check swapping of CS0 and CS3, set flash base accordingly */ - omap_flash_base = ((*((u32 *)OMAP_EMIFS_CONFIG_REG) & 0x02) == 0) ? - PHYS_FLASH_1_BM0 : PHYS_FLASH_1_BM1; -#endif - regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG); - /* Turn off write protection for flash devices. */ - regval = regval | 0x0001; - *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval; -} -/************************************************************* - Routine:ether__init - Description: take the Ethernet controller out of reset and wait - for the EEPROM load to complete. -*************************************************************/ -void ether__init (void) -{ -#define ETH_CONTROL_REG 0x0400030b - -#ifdef CONFIG_H2_OMAP1610 - #define LAN_RESET_REGISTER 0x0400001c - - /* The debug board on which the lan chip resides may not be powered - * ON at the same time as the OMAP chip. So wait in a loop until the - * lan reset register (on the debug board) is available (powered on) - * and reset the lan chip. - */ - - *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000; - do { - *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001; - udelay (3); - } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001); - - do { - *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000; - udelay (3); - } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000); -#endif - - *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01; - udelay (3); -} - -/****************************** - Routine: - Description: -******************************/ -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - -/****************************************************** - Routine: set_muxconf_regs - Description: Setting up the configuration Mux registers - specific to the hardware -*******************************************************/ -void set_muxconf_regs (void) -{ - volatile unsigned int *MuxConfReg; - /* set each registers to its reset value; */ - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0); - /* setup for UART1 */ - *MuxConfReg &= ~(0x02000000); /* bit 25 */ - /* setup for UART2 */ - *MuxConfReg &= ~(0x01000000); /* bit 24 */ - /* Disable Uwire CS Hi-Z */ - *MuxConfReg |= 0x08000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6); - /*setup mux for UART3 */ - *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */ - *MuxConfReg &= ~0x0000003e; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8); - /* Disable Uwire CS Hi-Z */ - *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */ - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9); - /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */ - /* hardware will actually use TX and RTS based on bit 25 in */ - /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */ - *MuxConfReg |= 0x00201000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C); - /* setup for UART2 */ - /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */ - /* hardware will actually use TX and RTS based on bit 24 in */ - /* FUNC_MUX_CTRL_0. */ - *MuxConfReg |= 0x09000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1); - *MuxConfReg = 0x00000000; - /* mux setup for SD/MMC driver */ - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2); - *MuxConfReg &= 0xFFFE0FFF; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0); - /* bit 13 for MMC2 XOR_CLK */ - *MuxConfReg &= ~(0x00002000); - /* bit 29 for UART 1 */ - *MuxConfReg &= ~(0x00002000); - MuxConfReg = - (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0); - /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */ - *MuxConfReg |= 0x000C0000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL); - *MuxConfReg &= ~(0x00000070); - *MuxConfReg &= ~(0x00000008); - *MuxConfReg |= 0x00000003; - *MuxConfReg |= 0x00000180; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0); - /* bit 17, software controls VBUS */ - *MuxConfReg &= ~(0x00020000); - /* Enable USB 48 and 12M clocks */ - *MuxConfReg |= 0x00000200; - *MuxConfReg &= ~(0x00000180); - /*2.75V for MMCSDIO1 */ - MuxConfReg = - (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0); - *MuxConfReg = 0x00001FE7; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4); - *MuxConfReg = 0x00000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4); - *MuxConfReg = 0x00000000; - /* Turn on UART2 48 MHZ clock */ - MuxConfReg = - (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0); - *MuxConfReg |= 0x40000000; - MuxConfReg = - (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL); - /* setup for USB VBus detection OMAP161x */ - *MuxConfReg |= 0x00040000; /* bit 18 */ - MuxConfReg = - (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2); - /* PullUps for SD/MMC driver */ - *MuxConfReg |= ~(0xFFFE0FFF); - MuxConfReg = - (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0); - *MuxConfReg = COMP_MODE_ENABLE; -} - -/****************************************************** - Routine: peripheral_power_enable - Description: Enable the power for UART1 -*******************************************************/ -void peripheral_power_enable (void) -{ -#define UART1_48MHZ_ENABLE ((unsigned short)0x0200) -#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834) - - *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_LAN91C96 - rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE); -#endif - return rc; -} -#endif diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index 10f189e..d75e86b 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -41,6 +41,7 @@ #include <asm/arch/mem.h> #include <asm/mach-types.h> #include "devkit8000.h" +#include <asm/gpio.h> #ifdef CONFIG_DRIVER_DM9000 #include <net.h> #include <netdev.h> @@ -73,6 +74,13 @@ int board_init(void) return 0; } +/* Configure GPMC registers for DM9000 */ +static void gpmc_dm9000_config(void) +{ + enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], + CONFIG_DM9000_BASE, GPMC_SIZE_16M); +} + /* * Routine: misc_init_r * Description: Configure board specific parts @@ -144,6 +152,35 @@ int board_eth_init(bd_t *bis) } #endif +#ifdef CONFIG_SPL_OS_BOOT +/* + * Do board specific preperation before SPL + * Linux boot + */ +void spl_board_prepare_for_linux(void) +{ + gpmc_dm9000_config(); +} + +/* + * devkit8000 specific implementation of spl_start_uboot() + * + * RETURN + * 0 if the button is not pressed + * 1 if the button is pressed + */ +int spl_start_uboot(void) +{ + int val = 0; + if (!gpio_request(CONFIG_SPL_OS_BOOT_KEY, "U-Boot key")) { + gpio_direction_input(CONFIG_SPL_OS_BOOT_KEY); + val = gpio_get_value(CONFIG_SPL_OS_BOOT_KEY); + gpio_free(CONFIG_SPL_OS_BOOT_KEY); + } + return !val; +} +#endif + /* * Routine: get_board_mem_timings * Description: If we use SPL then there is no x-loader nor config header diff --git a/board/vpac270/onenand.c b/board/vpac270/onenand.c index c2ae9a7..47f44c3 100644 --- a/board/vpac270/onenand.c +++ b/board/vpac270/onenand.c @@ -60,6 +60,3 @@ void __attribute__((noreturn)) hang(void) for (;;) ; } - -void icache_disable(void) {} -void dcache_disable(void) {} diff --git a/board/zipitz2/u-boot.lds b/board/zipitz2/u-boot.lds deleted file mode 100644 index e1a1ff1..0000000 --- a/board/zipitz2/u-boot.lds +++ /dev/null @@ -1,56 +0,0 @@ -/* - * (C) Copyright 2000-2005 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - cpu/pxa/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { *(.data) } - - . = ALIGN(4); - .got : { *(.got) } - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - __bss_start = .; - .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } - __bss_end__ = .; -} diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c index b093c2f..82dfa82 100644 --- a/board/zipitz2/zipitz2.c +++ b/board/zipitz2/zipitz2.c @@ -28,6 +28,7 @@ #include <serial.h> #include <asm/arch/hardware.h> #include <asm/arch/pxa.h> +#include <asm/arch/regs-mmc.h> #include <spi.h> #include <asm/io.h> @@ -79,6 +80,14 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; } +#ifdef CONFIG_CMD_MMC +int board_mmc_init(bd_t *bis) +{ + pxa_mmc_register(0); + return 0; +} +#endif + #ifdef CONFIG_CMD_SPI struct { |