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-rw-r--r--board/actux1/actux1.c1
-rw-r--r--board/actux2/actux2.c8
-rw-r--r--board/actux3/actux3.c1
-rw-r--r--board/ads5121/Makefile4
-rw-r--r--board/ads5121/ads5121.c1
-rw-r--r--board/ads5121/pci.c213
-rw-r--r--board/amcc/acadia/memory.c2
-rw-r--r--board/amcc/taihu/taihu.c2
-rw-r--r--board/atum8548/atum8548.c3
-rw-r--r--board/esd/common/fpga.c343
-rw-r--r--board/freescale/mpc8323erdb/mpc8323erdb.c5
-rw-r--r--board/freescale/mpc832xemds/mpc832xemds.c5
-rw-r--r--board/freescale/mpc8349emds/mpc8349emds.c4
-rw-r--r--board/freescale/mpc8349itx/mpc8349itx.c6
-rw-r--r--board/freescale/mpc8360emds/mpc8360emds.c4
-rw-r--r--board/freescale/mpc8360erdk/mpc8360erdk.c1
-rw-r--r--board/freescale/mpc837xemds/mpc837xemds.c3
-rw-r--r--board/freescale/mpc837xerdb/mpc837xerdb.c3
-rw-r--r--board/freescale/mpc8540ads/mpc8540ads.c5
-rw-r--r--board/freescale/mpc8541cds/mpc8541cds.c4
-rw-r--r--board/freescale/mpc8544ds/mpc8544ds.c4
-rw-r--r--board/freescale/mpc8548cds/mpc8548cds.c4
-rw-r--r--board/freescale/mpc8555cds/mpc8555cds.c4
-rw-r--r--board/freescale/mpc8560ads/mpc8560ads.c4
-rw-r--r--board/freescale/mpc8568mds/mpc8568mds.c4
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c6
-rw-r--r--board/freescale/mpc8641hpcn/mpc8641hpcn.c6
-rw-r--r--board/m501sk/Makefile14
-rw-r--r--board/mgcoge/mgcoge.c25
-rw-r--r--board/mgsuvd/mgsuvd.c23
-rw-r--r--board/mpc8540eval/mpc8540eval.c6
-rw-r--r--board/mx1fs2/flash.c2
-rw-r--r--board/mx1fs2/mx1fs2.c2
-rw-r--r--board/pm854/pm854.c5
-rw-r--r--board/pm856/pm856.c6
-rw-r--r--board/sbc8349/sbc8349.c5
-rw-r--r--board/sbc8548/sbc8548.c10
-rw-r--r--board/sbc8560/sbc8560.c6
-rw-r--r--board/sbc8641d/sbc8641d.c12
-rw-r--r--board/scb9328/flash.c5
-rw-r--r--board/siemens/SCM/scm.h36
-rw-r--r--board/stxgp3/stxgp3.c5
-rw-r--r--board/stxssa/stxssa.c5
-rw-r--r--board/tqm5200/tqm5200.c16
-rw-r--r--board/tqm834x/tqm834x.c2
-rw-r--r--board/tqm85xx/sdram.c1
-rw-r--r--board/tqm85xx/tqm85xx.c2
-rw-r--r--board/w7o/w7o.h3
48 files changed, 506 insertions, 335 deletions
diff --git a/board/actux1/actux1.c b/board/actux1/actux1.c
index b555fdb..d1d7f6c 100644
--- a/board/actux1/actux1.c
+++ b/board/actux1/actux1.c
@@ -89,7 +89,6 @@ int board_init (void)
*/
int checkboard (void)
{
- char revision;
char *s = getenv ("serial#");
puts ("Board: AcTux-1 rev.");
diff --git a/board/actux2/actux2.c b/board/actux2/actux2.c
index f3a81a8..99daef6 100644
--- a/board/actux2/actux2.c
+++ b/board/actux2/actux2.c
@@ -96,11 +96,15 @@ int board_init (void)
*/
int checkboard (void)
{
- char revision;
char *s = getenv ("serial#");
puts ("Board: AcTux-2 rev.");
putc (ACTUX2_BOARDREL + 'A' - 1);
+
+ if (s != NULL) {
+ puts (", serial# ");
+ puts (s);
+ }
putc ('\n');
return (0);
@@ -127,8 +131,6 @@ u32 get_board_rev (void)
void reset_phy (void)
{
- int i;
-
/* init IcPlus IP175C ethernet switch to native IP175C mode */
miiphy_write ("NPE0", 29, 31, 0x175C);
}
diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c
index 647e4e7..812bc2b 100644
--- a/board/actux3/actux3.c
+++ b/board/actux3/actux3.c
@@ -111,7 +111,6 @@ int board_init (void)
*/
int checkboard (void)
{
- char revision;
char *s = getenv ("serial#");
puts ("Board: AcTux-3 rev.");
diff --git a/board/ads5121/Makefile b/board/ads5121/Makefile
index cd8148c..b93bee1 100644
--- a/board/ads5121/Makefile
+++ b/board/ads5121/Makefile
@@ -25,8 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-COBJS := $(BOARD).o
+COBJS-y := $(BOARD).o
+COBJS-$(CONFIG_PCI) += pci.o
+COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c
index 462f41d..8629b03 100644
--- a/board/ads5121/ads5121.c
+++ b/board/ads5121/ads5121.c
@@ -34,6 +34,7 @@
CLOCK_SCCR1_PSCFIFO_EN | \
CLOCK_SCCR1_DDR_EN | \
CLOCK_SCCR1_FEC_EN | \
+ CLOCK_SCCR1_PCI_EN | \
CLOCK_SCCR1_TPR_EN)
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
diff --git a/board/ads5121/pci.c b/board/ads5121/pci.c
new file mode 100644
index 0000000..a338604
--- /dev/null
+++ b/board/ads5121/pci.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2006, 2007. All rights reserved.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#include <asm/mmu.h>
+#include <asm/global_data.h>
+#include <pci.h>
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <fdt_support.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* System RAM mapped to PCI space */
+#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
+
+static struct pci_controller pci_hose;
+
+
+/**************************************************************************
+ * pci_init_board()
+ *
+ */
+void
+pci_init_board(void)
+{
+ volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ volatile law512x_t *pci_law;
+ volatile pot512x_t *pci_pot;
+ volatile pcictrl512x_t *pci_ctrl;
+ volatile pciconf512x_t *pci_conf;
+ u16 reg16;
+ u32 reg32;
+ u32 dev;
+ struct pci_controller *hose;
+
+ /* Set PCI divider for 33MHz */
+ reg32 = immr->clk.scfr[0];
+ reg32 &= ~(SCFR1_PCI_DIV_MASK);
+ reg32 |= SCFR1_PCI_DIV << SCFR1_PCI_DIV_SHIFT;
+ immr->clk.scfr[0] = reg32;
+
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = &immr->pci_ctrl;
+ pci_conf = &immr->pci_conf;
+
+ hose = &pci_hose;
+
+ /*
+ * Release PCI RST Output signal
+ */
+ pci_ctrl->gcr = 0;
+ udelay(2000);
+ pci_ctrl->gcr = 1;
+
+ /* We need to wait at least a 1sec based on PCI specs */
+ {
+ int i;
+
+ for (i = 0; i < 1000; i++)
+ udelay(1000);
+ }
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
+
+ pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_16M;
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI mem space - prefetch */
+ pci_pot[0].potar = (CFG_PCI_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[0].pobar = (CFG_PCI_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[0].pocmr = POCMR_EN | POCMR_PRE | POCMR_CM_256M;
+
+ /* PCI IO space */
+ pci_pot[1].potar = (CFG_PCI_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[1].pobar = (CFG_PCI_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[1].pocmr = POCMR_EN | POCMR_IO | POCMR_CM_16M;
+
+ /* PCI mmio - non-prefetch mem space */
+ pci_pot[2].potar = (CFG_PCI_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[2].pobar = (CFG_PCI_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[2].pocmr = POCMR_EN | POCMR_CM_256M;
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[0].pitar1 = 0x0;
+ pci_ctrl[0].pibar1 = 0x0;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+ PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEM_BASE,
+ CFG_PCI_MEM_PHYS,
+ CFG_PCI_MEM_SIZE,
+ PCI_REGION_MEM|PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI_MMIO_BASE,
+ CFG_PCI_MMIO_PHYS,
+ CFG_PCI_MMIO_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI_IO_BASE,
+ CFG_PCI_IO_PHYS,
+ CFG_PCI_IO_SIZE,
+ PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 3,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ gd->ram_size,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 4;
+
+ pci_setup_indirect(hose,
+ (CFG_IMMR + 0x8300),
+ (CFG_IMMR + 0x8304));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, &reg16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+ printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+void ft_pci_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+ int tmp[2];
+ const char *path;
+
+ nodeoffset = fdt_path_offset(blob, "/aliases");
+ if (nodeoffset >= 0) {
+ path = fdt_getprop(blob, nodeoffset, "pci", NULL);
+ if (path) {
+ tmp[0] = cpu_to_be32(pci_hose.first_busno);
+ tmp[1] = cpu_to_be32(pci_hose.last_busno);
+ do_fixup_by_path(blob, path, "bus-range",
+ &tmp, sizeof(tmp), 1);
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ do_fixup_by_path(blob, path, "clock-frequency",
+ &tmp, sizeof(tmp[0]), 1);
+ }
+ }
+}
+#endif /* CONFIG_OF_LIBFDT */
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c
index 9346d2c..709d41e 100644
--- a/board/amcc/acadia/memory.c
+++ b/board/amcc/acadia/memory.c
@@ -117,7 +117,9 @@ long int initdram(int board_type)
return (CFG_MBYTES_RAM << 20);
}
+#ifndef CONFIG_NAND_SPL
int testdram(void)
{
return (0);
}
+#endif
diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c
index ea83671..eedde59 100644
--- a/board/amcc/taihu/taihu.c
+++ b/board/amcc/taihu/taihu.c
@@ -162,7 +162,7 @@ void spi_sda(int bit)
unsigned char spi_read(void)
{
- return (unsigned char)gpio_read_out_bit(SPI_DIN_GPIO15);
+ return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
}
void taihu_spi_chipsel(int cs)
diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index f11abd8..2f6ae29 100644
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -30,7 +30,7 @@
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
#include <asm/io.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -39,7 +39,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
long int fixed_sdram(void);
int board_early_init_f (void)
diff --git a/board/esd/common/fpga.c b/board/esd/common/fpga.c
index ad56402..9e2be7e 100644
--- a/board/esd/common/fpga.c
+++ b/board/esd/common/fpga.c
@@ -37,22 +37,22 @@
#define MAX_ONES 226
#ifdef CFG_FPGA_PRG
-# define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
-# define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (ppc output) */
-# define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (ppc output) */
-# define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (ppc input) */
-# define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (ppc input) */
+# define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (ppc output) */
+# define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (ppc output) */
+# define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (ppc output) */
+# define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (ppc input) */
+# define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (ppc input) */
#else
-# define FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */
-# define FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */
-# define FPGA_DATA 0x01000000 /* FPGA data pin (ppc output) */
-# define FPGA_DONE 0x00800000 /* FPGA done pin (ppc input) */
-# define FPGA_INIT 0x00400000 /* FPGA init pin (ppc input) */
+# define FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */
+# define FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */
+# define FPGA_DATA 0x01000000 /* FPGA data pin (ppc output) */
+# define FPGA_DONE 0x00800000 /* FPGA done pin (ppc input) */
+# define FPGA_INIT 0x00400000 /* FPGA init pin (ppc input) */
#endif
-#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
-#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
-#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
+#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
+#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
+#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
#ifndef SET_FPGA
# define SET_FPGA(data) out32(GPIO0_OR, data)
@@ -76,13 +76,13 @@
SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_HIGH); /* set clock to 0 */ \
SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_HIGH); /* set data to 1 */ \
SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH);} /* set data to 1 */
+ SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH);} /* set data to 1 */
#define FPGA_WRITE_0 { \
SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_HIGH); /* set clock to 0 */ \
SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_LOW | FPGA_DATA_LOW); /* set data to 0 */ \
SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_LOW); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH);} /* set data to 1 */
+ SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH);} /* set data to 1 */
#ifndef FPGA_DONE_STATE
# define FPGA_DONE_STATE (in32(GPIO0_IR) & FPGA_DONE)
@@ -92,191 +92,182 @@
#endif
-static int fpga_boot(unsigned char *fpgadata, int size)
+static int fpga_boot (const unsigned char *fpgadata, int size)
{
- int i,index,len;
- int count;
+ int i, index, len;
+ int count;
+ unsigned char b;
+
#ifdef CFG_FPGA_SPARTAN2
- int j;
+ int j;
#else
- unsigned char b;
- int bit;
+ int bit;
#endif
- /* display infos on fpgaimage */
- index = 15;
- for (i=0; i<4; i++)
- {
- len = fpgadata[index];
- DBG("FPGA: %s\n", &(fpgadata[index+1]));
- index += len+3;
- }
+ /* display infos on fpgaimage */
+ index = 15;
+ for (i = 0; i < 4; i++) {
+ len = fpgadata[index];
+ DBG ("FPGA: %s\n", &(fpgadata[index + 1]));
+ index += len + 3;
+ }
#ifdef CFG_FPGA_SPARTAN2
- /* search for preamble 0xFFFFFFFF */
- while (1)
- {
- if ((fpgadata[index] == 0xff) && (fpgadata[index+1] == 0xff) &&
- (fpgadata[index+2] == 0xff) && (fpgadata[index+3] == 0xff))
- break; /* preamble found */
- else
- index++;
- }
+ /* search for preamble 0xFFFFFFFF */
+ while (1) {
+ if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
+ && (fpgadata[index + 2] == 0xff)
+ && (fpgadata[index + 3] == 0xff))
+ break; /* preamble found */
+ else
+ index++;
+ }
#else
- /* search for preamble 0xFF2X */
- for (index = 0; index < size-1 ; index++)
- {
- if ((fpgadata[index] == 0xff) && ((fpgadata[index+1] & 0xf0) == 0x30))
- break;
- }
- index += 2;
+ /* search for preamble 0xFF2X */
+ for (index = 0; index < size - 1; index++) {
+ if ((fpgadata[index] == 0xff)
+ && ((fpgadata[index + 1] & 0xf0) == 0x30))
+ break;
+ }
+ index += 2;
#endif
- DBG("FPGA: configdata starts at position 0x%x\n",index);
- DBG("FPGA: length of fpga-data %d\n", size-index);
+ DBG ("FPGA: configdata starts at position 0x%x\n", index);
+ DBG ("FPGA: length of fpga-data %d\n", size - index);
- /*
- * Setup port pins for fpga programming
- */
+ /*
+ * Setup port pins for fpga programming
+ */
#ifndef CONFIG_M5249
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */
+ out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */
+ out32 (GPIO0_TCR, in32 (GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */
#endif
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set pins to high */
-
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
-
- /*
- * Init fpga by asserting and deasserting PROGRAM*
- */
- SET_FPGA(FPGA_PRG_LOW | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set prog active */
-
- /* Wait for FPGA init line low */
- count = 0;
- while (FPGA_INIT_STATE)
- {
- udelay(1000); /* wait 1ms */
- /* Check for timeout - 100us max, so use 3ms */
- if (count++ > 3)
- {
- DBG("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_LOW;
+ SET_FPGA (FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set pins to high */
+
+ DBG ("%s, ", (FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE");
+ DBG ("%s\n", (FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT");
+
+ /*
+ * Init fpga by asserting and deasserting PROGRAM*
+ */
+ SET_FPGA (FPGA_PRG_LOW | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set prog active */
+
+ /* Wait for FPGA init line low */
+ count = 0;
+ while (FPGA_INIT_STATE) {
+ udelay (1000); /* wait 1ms */
+ /* Check for timeout - 100us max, so use 3ms */
+ if (count++ > 3) {
+ DBG ("FPGA: Booting failed!\n");
+ return ERROR_FPGA_PRG_INIT_LOW;
+ }
}
- }
-
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
-
- /* deassert PROGRAM* */
- SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set prog inactive */
-
- /* Wait for FPGA end of init period . */
- count = 0;
- while (!(FPGA_INIT_STATE))
- {
- udelay(1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3)
- {
- DBG("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_HIGH;
+
+ DBG ("%s, ", (FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE");
+ DBG ("%s\n", (FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT");
+
+ /* deassert PROGRAM* */
+ SET_FPGA (FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set prog inactive */
+
+ /* Wait for FPGA end of init period . */
+ count = 0;
+ while (!(FPGA_INIT_STATE)) {
+ udelay (1000); /* wait 1ms */
+ /* Check for timeout */
+ if (count++ > 3) {
+ DBG ("FPGA: Booting failed!\n");
+ return ERROR_FPGA_PRG_INIT_HIGH;
+ }
}
- }
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
+ DBG ("%s, ", (FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE");
+ DBG ("%s\n", (FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT");
- DBG("write configuration data into fpga\n");
- /* write configuration-data into fpga... */
+ DBG ("write configuration data into fpga\n");
+ /* write configuration-data into fpga... */
#ifdef CFG_FPGA_SPARTAN2
- /*
- * Load uncompressed image into fpga
- */
- for (i=index; i<size; i++)
- {
- for (j=0; j<8; j++)
- {
- if ((fpgadata[i] & 0x80) == 0x80)
- {
- FPGA_WRITE_1;
- }
- else
- {
- FPGA_WRITE_0;
- }
- fpgadata[i] <<= 1;
+ /*
+ * Load uncompressed image into fpga
+ */
+ for (i = index; i < size; i++) {
+ b = fpgadata[i];
+ for (j = 0; j < 8; j++) {
+ if ((b & 0x80) == 0x80) {
+ FPGA_WRITE_1;
+ } else {
+ FPGA_WRITE_0;
+ }
+ b <<= 1;
+ }
}
- }
#else
- /* send 0xff 0x20 */
- FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1;
- FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1; FPGA_WRITE_1;
- FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_1; FPGA_WRITE_0;
- FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_0; FPGA_WRITE_0;
-
- /*
- ** Bit_DeCompression
- ** Code 1 .. maxOnes : n '1's followed by '0'
- ** maxOnes + 1 .. maxOnes + 1 : n - 1 '1's no '0'
- ** maxOnes + 2 .. 254 : n - (maxOnes + 2) '0's followed by '1'
- ** 255 : '1'
- */
-
- for (i=index; i<size; i++)
- {
- b = fpgadata[i];
- if ((b >= 1) && (b <= MAX_ONES))
- {
- for(bit=0; bit<b; bit++)
- {
- FPGA_WRITE_1;
- }
- FPGA_WRITE_0;
- }
- else if (b == (MAX_ONES+1))
- {
- for(bit=1; bit<b; bit++)
- {
- FPGA_WRITE_1;
- }
- }
- else if ((b >= (MAX_ONES+2)) && (b <= 254))
- {
- for(bit=0; bit<(b-(MAX_ONES+2)); bit++)
- {
- FPGA_WRITE_0;
- }
- FPGA_WRITE_1;
- }
- else if (b == 255)
- {
- FPGA_WRITE_1;
+ /* send 0xff 0x20 */
+ FPGA_WRITE_1;
+ FPGA_WRITE_1;
+ FPGA_WRITE_1;
+ FPGA_WRITE_1;
+ FPGA_WRITE_1;
+ FPGA_WRITE_1;
+ FPGA_WRITE_1;
+ FPGA_WRITE_1;
+ FPGA_WRITE_0;
+ FPGA_WRITE_0;
+ FPGA_WRITE_1;
+ FPGA_WRITE_0;
+ FPGA_WRITE_0;
+ FPGA_WRITE_0;
+ FPGA_WRITE_0;
+ FPGA_WRITE_0;
+
+ /*
+ ** Bit_DeCompression
+ ** Code 1 .. maxOnes : n '1's followed by '0'
+ ** maxOnes + 1 .. maxOnes + 1 : n - 1 '1's no '0'
+ ** maxOnes + 2 .. 254 : n - (maxOnes + 2) '0's followed by '1'
+ ** 255 : '1'
+ */
+
+ for (i = index; i < size; i++) {
+ b = fpgadata[i];
+ if ((b >= 1) && (b <= MAX_ONES)) {
+ for (bit = 0; bit < b; bit++) {
+ FPGA_WRITE_1;
+ }
+ FPGA_WRITE_0;
+ } else if (b == (MAX_ONES + 1)) {
+ for (bit = 1; bit < b; bit++) {
+ FPGA_WRITE_1;
+ }
+ } else if ((b >= (MAX_ONES + 2)) && (b <= 254)) {
+ for (bit = 0; bit < (b - (MAX_ONES + 2)); bit++) {
+ FPGA_WRITE_0;
+ }
+ FPGA_WRITE_1;
+ } else if (b == 255) {
+ FPGA_WRITE_1;
+ }
}
- }
#endif
- DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
- DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
-
- /*
- * Check if fpga's DONE signal - correctly booted ?
- */
-
- /* Wait for FPGA end of programming period . */
- count = 0;
- while (!(FPGA_DONE_STATE))
- {
- udelay(1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3)
- {
- DBG("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_DONE;
+ DBG ("%s, ", (FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE");
+ DBG ("%s\n", (FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT");
+
+ /*
+ * Check if fpga's DONE signal - correctly booted ?
+ */
+
+ /* Wait for FPGA end of programming period . */
+ count = 0;
+ while (!(FPGA_DONE_STATE)) {
+ udelay (1000); /* wait 1ms */
+ /* Check for timeout */
+ if (count++ > 3) {
+ DBG ("FPGA: Booting failed!\n");
+ return ERROR_FPGA_PRG_DONE;
+ }
}
- }
- DBG("FPGA: Booting successful!\n");
- return 0;
+ DBG ("FPGA: Booting successful!\n");
+ return 0;
}
diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
index 2fc4fd6..88d5e8f 100644
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -13,18 +13,13 @@
#include <ioports.h>
#include <mpc83xx.h>
#include <i2c.h>
-#include <spd.h>
#include <miiphy.h>
#include <command.h>
#include <libfdt.h>
#if defined(CONFIG_PCI)
#include <pci.h>
#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include <spd_sdram.h>
-#else
#include <asm/mmu.h>
-#endif
const qe_iop_conf_t qe_iop_conf_tab[] = {
/* UCC3 */
diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c
index 6adf7e7..c10b30f 100644
--- a/board/freescale/mpc832xemds/mpc832xemds.c
+++ b/board/freescale/mpc832xemds/mpc832xemds.c
@@ -16,17 +16,12 @@
#include <ioports.h>
#include <mpc83xx.h>
#include <i2c.h>
-#include <spd.h>
#include <miiphy.h>
#include <command.h>
#if defined(CONFIG_PCI)
#include <pci.h>
#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include <spd_sdram.h>
-#else
#include <asm/mmu.h>
-#endif
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 9f4ac8e..6c82596 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -28,11 +28,9 @@
#include <asm/mpc8349_pci.h>
#include <i2c.h>
#include <spi.h>
-#include <spd.h>
#include <miiphy.h>
-#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
-#endif
+
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index 8c19ad6..972361f 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -24,19 +24,13 @@
#include <ioports.h>
#include <mpc83xx.h>
#include <i2c.h>
-#include <spd.h>
#include <miiphy.h>
-
#ifdef CONFIG_PCI
#include <asm/mpc8349_pci.h>
#include <pci.h>
#endif
-
-#ifdef CONFIG_SPD_EEPROM
#include <spd_sdram.h>
-#else
#include <asm/mmu.h>
-#endif
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
index f909a33..d90cdb3 100644
--- a/board/freescale/mpc8360emds/mpc8360emds.c
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -15,16 +15,12 @@
#include <ioports.h>
#include <mpc83xx.h>
#include <i2c.h>
-#include <spd.h>
#include <miiphy.h>
#if defined(CONFIG_PCI)
#include <pci.h>
#endif
-#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
-#else
#include <asm/mmu.h>
-#endif
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
diff --git a/board/freescale/mpc8360erdk/mpc8360erdk.c b/board/freescale/mpc8360erdk/mpc8360erdk.c
index 98ec6ab..8005a50 100644
--- a/board/freescale/mpc8360erdk/mpc8360erdk.c
+++ b/board/freescale/mpc8360erdk/mpc8360erdk.c
@@ -18,7 +18,6 @@
#include <ioports.h>
#include <mpc83xx.h>
#include <i2c.h>
-#include <spd.h>
#include <miiphy.h>
#include <asm/io.h>
#include <asm/mmu.h>
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 6925d23..e57a53f 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -12,10 +12,7 @@
#include <common.h>
#include <i2c.h>
-#include <spd.h>
-#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
-#endif
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 2d42595..bed0fc3 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -14,11 +14,8 @@
#include <common.h>
#include <i2c.h>
-#include <spd.h>
#include <asm/io.h>
-#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
-#endif
#if defined(CFG_DRAM_TEST)
int
diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c
index 35f5eea..a951b9e 100644
--- a/board/freescale/mpc8540ads/mpc8540ads.c
+++ b/board/freescale/mpc8540ads/mpc8540ads.c
@@ -29,7 +29,7 @@
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -37,8 +37,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
-
void local_bus_init(void);
void sdram_init(void);
long int fixed_sdram(void);
@@ -73,7 +71,6 @@ long int
initdram(int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
puts("Initializing\n");
diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index 9ab98d4..62c8d63 100644
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -27,7 +27,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -39,8 +39,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
-
void local_bus_init(void);
void sdram_init(void);
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 66cb536..8107016 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -27,7 +27,7 @@
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
#include <asm/io.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -38,8 +38,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
-
void sdram_init(void);
int board_early_init_f (void)
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 47e2dd8..dc39fbe 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -27,7 +27,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -42,8 +42,6 @@ extern void ddr_enable_ecc(unsigned int dram_size);
DECLARE_GLOBAL_DATA_PTR;
-extern long int spd_sdram(void);
-
void local_bus_init(void);
void sdram_init(void);
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index 74c220d..8acbba4 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -25,7 +25,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -37,8 +37,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
-
void local_bus_init(void);
void sdram_init(void);
diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c
index bb7f11b..8d4b8a8 100644
--- a/board/freescale/mpc8560ads/mpc8560ads.c
+++ b/board/freescale/mpc8560ads/mpc8560ads.c
@@ -30,7 +30,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -39,7 +39,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
void local_bus_init(void);
void sdram_init(void);
@@ -275,7 +274,6 @@ long int
initdram(int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
puts("Initializing\n");
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index 3c3726b..4568aa1 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -27,7 +27,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <i2c.h>
#include <ioports.h>
#include <libfdt.h>
@@ -102,8 +102,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
-
void local_bus_init(void);
void sdram_init(void);
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 16acbbe..d9a740e 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -27,10 +27,10 @@
#include <asm/immap_86xx.h>
#include <asm/immap_fsl_pci.h>
#include <i2c.h>
-#include <spd.h>
#include <asm/io.h>
#include <libfdt.h>
#include <fdt_support.h>
+#include <spd_sdram.h>
#include "../common/pixis.h"
@@ -38,10 +38,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include "spd_sdram.h"
-#endif
-
void sdram_init(void);
long int fixed_sdram(void);
void mpc8610hpcd_diu_init(void);
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 0e451dc..31e7d67 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -25,7 +25,7 @@
#include <asm/processor.h>
#include <asm/immap_86xx.h>
#include <asm/immap_fsl_pci.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <asm/io.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -36,10 +36,6 @@
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include "spd_sdram.h"
-#endif
-
void sdram_init(void);
long int fixed_sdram(void);
diff --git a/board/m501sk/Makefile b/board/m501sk/Makefile
index da7987b..b403095 100644
--- a/board/m501sk/Makefile
+++ b/board/m501sk/Makefile
@@ -23,12 +23,16 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := m501sk.o eeprom.o
+COBJS := m501sk.o eeprom.o
SOBJS := memsetup.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
@@ -40,9 +44,9 @@ distclean: clean
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/board/mgcoge/mgcoge.c b/board/mgcoge/mgcoge.c
index 0207a3a..e7c3fa0 100644
--- a/board/mgcoge/mgcoge.c
+++ b/board/mgcoge/mgcoge.c
@@ -278,6 +278,17 @@ int checkboard(void)
return 0;
}
+/*
+ * Early board initalization.
+ */
+int board_early_init_r(void)
+{
+ /* setup the UPIOx */
+ *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0;
+ *(char *)(CFG_PIGGY_BASE + 0x03) = 0x15;
+ return 0;
+}
+
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
/*
* update "memory" property in the blob
@@ -286,7 +297,7 @@ void ft_blob_update(void *blob, bd_t *bd)
{
int ret, nodeoffset = 0;
ulong memory_data[2] = {0};
- ulong flash_data[4] = {0};
+ ulong flash_data[8] = {0};
memory_data[0] = cpu_to_be32(bd->bi_memstart);
memory_data[1] = cpu_to_be32(bd->bi_memsize);
@@ -304,9 +315,13 @@ void ft_blob_update(void *blob, bd_t *bd)
printf("ft_blob_update(): cannot find /memory node "
"err:%s\n", fdt_strerror(nodeoffset));
}
- /* update Flash size */
- flash_data[2] = cpu_to_be32(bd->bi_flashstart);
- flash_data[3] = cpu_to_be32(bd->bi_flashsize);
+ /* update Flash addr, size */
+ flash_data[2] = cpu_to_be32(CFG_FLASH_BASE);
+ flash_data[3] = cpu_to_be32(CFG_FLASH_SIZE);
+ flash_data[4] = cpu_to_be32(1);
+ flash_data[5] = cpu_to_be32(0);
+ flash_data[6] = cpu_to_be32(CFG_FLASH_BASE_1);
+ flash_data[7] = cpu_to_be32(CFG_FLASH_SIZE_1);
nodeoffset = fdt_path_offset (blob, "/localbus");
if (nodeoffset >= 0) {
ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data,
@@ -331,7 +346,7 @@ void ft_blob_update(void *blob, bd_t *bd)
}
else {
/* memory node is required in dts */
- printf("ft_blob_update(): cannot find /localbus node "
+ printf("ft_blob_update(): cannot find /soc/cpm/ethernet node "
"err:%s\n", fdt_strerror(nodeoffset));
}
diff --git a/board/mgsuvd/mgsuvd.c b/board/mgsuvd/mgsuvd.c
index 9fd164b..e0123bf 100644
--- a/board/mgsuvd/mgsuvd.c
+++ b/board/mgsuvd/mgsuvd.c
@@ -134,6 +134,17 @@ long int initdram (int board_type)
return (size);
}
+/*
+ * Early board initalization.
+ */
+int board_early_init_r(void)
+{
+ /* setup the UPIOx */
+ *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0;
+ *(char *)(CFG_PIGGY_BASE + 0x03) = 0x35;
+ return 0;
+}
+
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
/*
* update "memory" property in the blob
@@ -179,31 +190,31 @@ void ft_blob_update(void *blob, bd_t *bd)
}
/* BRG */
brg_data[0] = cpu_to_be32(bd->bi_busfreq);
- nodeoffset = fdt_path_offset (blob, "/soc866/cpm");
+ nodeoffset = fdt_path_offset (blob, "/soc/cpm");
if (nodeoffset >= 0) {
ret = fdt_setprop(blob, nodeoffset, "brg-frequency", brg_data,
sizeof(brg_data));
if (ret < 0)
- printf("ft_blob_update): cannot set /soc866/cpm/brg-frequency "
+ printf("ft_blob_update): cannot set /soc/cpm/brg-frequency "
"property err:%s\n", fdt_strerror(ret));
}
else {
/* memory node is required in dts */
- printf("ft_blob_update(): cannot find /localbus node "
+ printf("ft_blob_update(): cannot find /soc/cpm node "
"err:%s\n", fdt_strerror(nodeoffset));
}
/* MAC Adresse */
- nodeoffset = fdt_path_offset (blob, "/soc866/cpm/ethernet");
+ nodeoffset = fdt_path_offset (blob, "/soc/cpm/ethernet");
if (nodeoffset >= 0) {
ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr,
sizeof(uchar) * 6);
if (ret < 0)
- printf("ft_blob_update): cannot set /soc866/cpm/scc/mac-address "
+ printf("ft_blob_update): cannot set /soc/cpm/scc/mac-address "
"property err:%s\n", fdt_strerror(ret));
}
else {
/* memory node is required in dts */
- printf("ft_blob_update(): cannot find /localbus node "
+ printf("ft_blob_update(): cannot find /soc/cpm/ethernet node "
"err:%s\n", fdt_strerror(nodeoffset));
}
}
diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c
index 64dfe09..8328b3a 100644
--- a/board/mpc8540eval/mpc8540eval.c
+++ b/board/mpc8540eval/mpc8540eval.c
@@ -26,9 +26,7 @@
#include <common.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
-#include <spd.h>
-
-extern long int spd_sdram (void);
+#include <spd_sdram.h>
long int fixed_sdram (void);
@@ -66,7 +64,7 @@ int checkboard (void)
long int initdram (int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
+
#if !defined(CONFIG_RAM_AS_FLASH)
volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
sys_info_t sysinfo;
diff --git a/board/mx1fs2/flash.c b/board/mx1fs2/flash.c
index 3806310..47885bc 100644
--- a/board/mx1fs2/flash.c
+++ b/board/mx1fs2/flash.c
@@ -173,7 +173,7 @@ flash_print_info(flash_info_t * info)
int i;
uchar *boottype;
uchar *bootletter;
- uchar *fmt;
+ char *fmt;
uchar botbootletter[] = "B";
uchar topbootletter[] = "T";
uchar botboottype[] = "bottom boot sector";
diff --git a/board/mx1fs2/mx1fs2.c b/board/mx1fs2/mx1fs2.c
index 1c026f0..90a33c2 100644
--- a/board/mx1fs2/mx1fs2.c
+++ b/board/mx1fs2/mx1fs2.c
@@ -48,7 +48,7 @@ static void logo_init(void)
imx_gpio_mode(PD14_PF_FLM_VSYNC);
imx_gpio_mode(PD13_PF_LP_HSYNC);
imx_gpio_mode(PD6_PF_LSCLK);
- imx_gpio_mode(GPIO_PORTD | GPIO_OUT | GPIO_GPIO);
+ imx_gpio_mode(GPIO_PORTD | GPIO_OUT | GPIO_DR);
imx_gpio_mode(PD11_PF_CONTRAST);
imx_gpio_mode(PD10_PF_SPL_SPR);
diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c
index 999d8b5..5e7bf34 100644
--- a/board/pm854/pm854.c
+++ b/board/pm854/pm854.c
@@ -29,14 +29,12 @@
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
-#include <spd.h>
+#include <spd_sdram.h>
#if defined(CONFIG_DDR_ECC)
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
-
void local_bus_init(void);
void sdram_init(void);
long int fixed_sdram(void);
@@ -77,7 +75,6 @@ long int
initdram(int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
puts("Initializing\n");
diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c
index bfde695..792d1e5 100644
--- a/board/pm856/pm856.c
+++ b/board/pm856/pm856.c
@@ -30,15 +30,13 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
#if defined(CONFIG_DDR_ECC)
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
-extern long int spd_sdram(void);
-
void local_bus_init(void);
long int fixed_sdram(void);
@@ -231,7 +229,7 @@ long int
initdram(int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
+
puts("Initializing\n");
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index 5446c20..e89b6e82 100644
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -30,11 +30,8 @@
#include <mpc83xx.h>
#include <asm/mpc8349_pci.h>
#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
-#endif
+#include <miiphy.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 65052e6..8a6ced3 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -30,7 +30,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -41,8 +41,6 @@ extern void ddr_enable_ecc(unsigned int dram_size);
DECLARE_GLOBAL_DATA_PTR;
-extern long int spd_sdram(void);
-
void local_bus_init(void);
void sdram_init(void);
long int fixed_sdram (void);
@@ -56,9 +54,10 @@ int checkboard (void)
{
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
+ volatile u_char *rev= (void *)CFG_BD_REV;
printf ("Board: Wind River SBC8548 Rev. 0x%01x\n",
- (volatile)(*(u_char *)CFG_BD_REV) >> 4);
+ (*rev) >> 4);
/*
* Initialize local bus.
@@ -533,12 +532,12 @@ void
ft_pci_setup(void *blob, bd_t *bd)
{
int node, tmp[2];
- const char *path;
node = fdt_path_offset(blob, "/aliases");
tmp[0] = 0;
if (node >= 0) {
#ifdef CONFIG_PCI1
+ const char *path;
path = fdt_getprop(blob, node, "pci0", NULL);
if (path) {
tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
@@ -546,6 +545,7 @@ ft_pci_setup(void *blob, bd_t *bd)
}
#endif
#ifdef CONFIG_PCIE1
+ const char *path;
path = fdt_getprop(blob, node, "pci1", NULL);
if (path) {
tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c
index 47df884..8df4f3a 100644
--- a/board/sbc8560/sbc8560.c
+++ b/board/sbc8560/sbc8560.c
@@ -27,13 +27,11 @@
*/
-extern long int spd_sdram (void);
-
#include <common.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
long int fixed_sdram (void);
@@ -262,7 +260,7 @@ int checkboard (void)
long int initdram (int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
+
#if 0
#if !defined(CONFIG_RAM_AS_FLASH)
volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 78656e9..b3dd9c8 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -34,7 +34,7 @@
#include <asm/processor.h>
#include <asm/immap_86xx.h>
#include <asm/immap_fsl_pci.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <libfdt.h>
#include <fdt_support.h>
@@ -42,10 +42,6 @@
extern void ddr_enable_ecc (unsigned int dram_size);
#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include "spd_sdram.h"
-#endif
-
void sdram_init (void);
long int fixed_sdram (void);
@@ -230,7 +226,8 @@ void pci_init_board(void)
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
uint devdisr = gur->devdisr;
- uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
+ uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
+ >> MPC8641_PORDEVSR_IO_SEL_SHIFT;
#ifdef CONFIG_PCI1
{
@@ -238,7 +235,8 @@ void pci_init_board(void)
extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pci1_hose;
#ifdef DEBUG
- uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17;
+ uint host1_agent = (gur->porbmsr & MPC8641_PORBMSR_HA)
+ >> MPC8641_PORBMSR_HA_SHIFT;
uint pex1_agent = (host1_agent == 0) || (host1_agent == 1);
#endif
if ((io_sel == 2 || io_sel == 3 || io_sel == 5
diff --git a/board/scb9328/flash.c b/board/scb9328/flash.c
index 1b56f8c..304190c 100644
--- a/board/scb9328/flash.c
+++ b/board/scb9328/flash.c
@@ -44,6 +44,7 @@
#if ( SCB9328_FLASH_BUS_WIDTH == 1 )
# define FLASH_BUS vu_char
+# define FLASH_BUS_RET u_char
# if ( SCB9328_FLASH_INTERLEAVE == 1 )
# define FLASH_CMD( x ) x
# else
@@ -53,6 +54,7 @@
#elif ( SCB9328_FLASH_BUS_WIDTH == 2 )
# define FLASH_BUS vu_short
+# define FLASH_BUS_RET u_short
# if ( SCB9328_FLASH_INTERLEAVE == 1 )
# define FLASH_CMD( x ) x
# elif ( SCB9328_FLASH_INTERLEAVE == 2 )
@@ -64,6 +66,7 @@
#elif ( SCB9328_FLASH_BUS_WIDTH == 4 )
# define FLASH_BUS vu_long
+# define FLASH_BUS_RET u_long
# if ( SCB9328_FLASH_INTERLEAVE == 1 )
# define FLASH_CMD( x ) x
# elif ( SCB9328_FLASH_INTERLEAVE == 2 )
@@ -81,7 +84,7 @@
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-static FLASH_BUS flash_status_reg (void)
+static FLASH_BUS_RET flash_status_reg (void)
{
FLASH_BUS *addr = (FLASH_BUS *) 0;
diff --git a/board/siemens/SCM/scm.h b/board/siemens/SCM/scm.h
index 70c12e6..cb5e03e 100644
--- a/board/siemens/SCM/scm.h
+++ b/board/siemens/SCM/scm.h
@@ -29,7 +29,7 @@
/*----------------*/
/* Message */
-typedef struct can_msg {
+struct can_msg {
uchar ctrl_0;
uchar ctrl_1;
uchar arbit_0;
@@ -38,7 +38,9 @@ typedef struct can_msg {
uchar arbit_3;
uchar config;
uchar data[8];
-} can_msg_t;
+} __attribute__ ((packed));
+
+typedef struct can_msg can_msg_t;
/* CAN Register */
typedef struct can_reg {
@@ -50,35 +52,35 @@ typedef struct can_reg {
ushort gbl_mask_std;
uint gbl_mask_extd;
uint msg15_mask;
- can_msg_t msg1 __attribute__ ((packed));
+ can_msg_t msg1;
uchar clkout;
- can_msg_t msg2 __attribute__ ((packed));
+ can_msg_t msg2;
uchar bus_config;
- can_msg_t msg3 __attribute__ ((packed));
+ can_msg_t msg3;
uchar bit_timing_0;
- can_msg_t msg4 __attribute__ ((packed));
+ can_msg_t msg4;
uchar bit_timing_1;
- can_msg_t msg5 __attribute__ ((packed));
+ can_msg_t msg5;
uchar interrupt;
- can_msg_t msg6 __attribute__ ((packed));
+ can_msg_t msg6;
uchar resv1;
- can_msg_t msg7 __attribute__ ((packed));
+ can_msg_t msg7;
uchar resv2;
- can_msg_t msg8 __attribute__ ((packed));
+ can_msg_t msg8;
uchar resv3;
- can_msg_t msg9 __attribute__ ((packed));
+ can_msg_t msg9;
uchar p1conf;
- can_msg_t msg10 __attribute__ ((packed));
+ can_msg_t msg10;
uchar p2conf;
- can_msg_t msg11 __attribute__ ((packed));
+ can_msg_t msg11;
uchar p1in;
- can_msg_t msg12 __attribute__ ((packed));
+ can_msg_t msg12;
uchar p2in;
- can_msg_t msg13 __attribute__ ((packed));
+ can_msg_t msg13;
uchar p1out;
- can_msg_t msg14 __attribute__ ((packed));
+ can_msg_t msg14;
uchar p2out;
- can_msg_t msg15 __attribute__ ((packed));
+ can_msg_t msg15;
uchar ser_res_addr;
uchar resv_cs[0x8000-0x100]; /* 0x8000 is the min size for CS */
} can_reg_t;
diff --git a/board/stxgp3/stxgp3.c b/board/stxgp3/stxgp3.c
index 3649acf..f04ffa8 100644
--- a/board/stxgp3/stxgp3.c
+++ b/board/stxgp3/stxgp3.c
@@ -29,15 +29,13 @@
*/
-extern long int spd_sdram (void);
-
#include <common.h>
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
#include <asm/io.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
long int fixed_sdram (void);
@@ -281,7 +279,6 @@ long int
initdram (int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
#if defined(CONFIG_DDR_DLL)
{
diff --git a/board/stxssa/stxssa.c b/board/stxssa/stxssa.c
index e2b38a6..08177e1 100644
--- a/board/stxssa/stxssa.c
+++ b/board/stxssa/stxssa.c
@@ -29,15 +29,13 @@
*/
-extern long int spd_sdram (void);
-
#include <common.h>
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
#include <asm/io.h>
-#include <spd.h>
+#include <spd_sdram.h>
#include <miiphy.h>
long int fixed_sdram (void);
@@ -297,7 +295,6 @@ long int
initdram (int board_type)
{
long dram_size = 0;
- extern long spd_sdram (void);
#if defined(CONFIG_DDR_DLL)
{
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index 905a043..33ad2a3 100644
--- a/board/tqm5200/tqm5200.c
+++ b/board/tqm5200/tqm5200.c
@@ -43,6 +43,10 @@
#include "mt48lc16m16a2-75.h"
#endif
+#ifdef CONFIG_OF_LIBFDT
+#include <fdt_support.h>
+#endif /* CONFIG_OF_LIBFDT */
+
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_PS2MULT
@@ -155,10 +159,13 @@ long int initdram (int board_type)
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001c; /* 512MB */
/* find RAM size using SDRAM CS1 only */
- sdram_start(0);
- test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000);
- sdram_start(1);
- test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000);
+ if (!dramsize)
+ sdram_start(0);
+ test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000);
+ if (!dramsize) {
+ sdram_start(1);
+ test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x20000000);
+ }
if (test1 > test2) {
sdram_start(0);
dramsize2 = test1;
@@ -792,5 +799,6 @@ int board_get_height (void)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c
index 7d0b055..aea985c 100644
--- a/board/tqm834x/tqm834x.c
+++ b/board/tqm834x/tqm834x.c
@@ -27,7 +27,6 @@
#include <mpc83xx.h>
#include <asm/mpc8349_pci.h>
#include <i2c.h>
-#include <spd.h>
#include <miiphy.h>
#include <asm-ppc/mmu.h>
#include <pci.h>
@@ -59,7 +58,6 @@ int tqm834x_num_flash_banks;
/* External definitions */
ulong flash_get_size (ulong base, int banknum);
extern flash_info_t flash_info[];
-extern long spd_sdram (void);
/* Local functions */
static int detect_num_flash_banks(void);
diff --git a/board/tqm85xx/sdram.c b/board/tqm85xx/sdram.c
index 2053ade..788a48c 100644
--- a/board/tqm85xx/sdram.c
+++ b/board/tqm85xx/sdram.c
@@ -27,7 +27,6 @@
#include <asm/immap_85xx.h>
#include <asm/processor.h>
#include <asm/mmu.h>
-#include <spd.h>
struct sdram_conf_s {
unsigned long size;
diff --git a/board/tqm85xx/tqm85xx.c b/board/tqm85xx/tqm85xx.c
index 5d5cb1b..8fa0162 100644
--- a/board/tqm85xx/tqm85xx.c
+++ b/board/tqm85xx/tqm85xx.c
@@ -32,7 +32,6 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <ioports.h>
-#include <spd.h>
#include <flash.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -40,7 +39,6 @@ DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[]; /* FLASH chips info */
void local_bus_init (void);
-long int fixed_sdram (void);
ulong flash_get_size (ulong base, int banknum);
#ifdef CONFIG_PS2MULT
diff --git a/board/w7o/w7o.h b/board/w7o/w7o.h
index d6f50e2..d1fed02 100644
--- a/board/w7o/w7o.h
+++ b/board/w7o/w7o.h
@@ -31,9 +31,6 @@
#define PPC405GP_GPIO0_ODR 0xef600718L /* GPIO Open Drain */
#define PPC405GP_GPIO0_IR 0xef60071cL /* GPIO Input */
-/* AMCC 405GP DCRs */
-#define CPC0_CR0 0xb1 /* Chip control register 0 */
-
/* LMG FPGA <=> CPU GPIO signals */
#define LMG_XCV_INIT 0x10000000L
#define LMG_XCV_PROG 0x04000000L