summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
Diffstat (limited to 'board')
-rw-r--r--board/freescale/m5271evb/Makefile8
-rw-r--r--board/freescale/m5271evb/config.mk9
-rw-r--r--board/freescale/m5271evb/m5271evb.c115
-rw-r--r--board/freescale/m5271evb/u-boot.lds85
-rw-r--r--board/idmr/Makefile8
-rw-r--r--board/idmr/config.mk9
-rw-r--r--board/idmr/flash.c342
-rw-r--r--board/idmr/idmr.c152
-rw-r--r--board/idmr/u-boot.lds82
9 files changed, 0 insertions, 810 deletions
diff --git a/board/freescale/m5271evb/Makefile b/board/freescale/m5271evb/Makefile
deleted file mode 100644
index 77138c6..0000000
--- a/board/freescale/m5271evb/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = m5271evb.o
diff --git a/board/freescale/m5271evb/config.mk b/board/freescale/m5271evb/config.mk
deleted file mode 100644
index 957f584..0000000
--- a/board/freescale/m5271evb/config.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-CONFIG_SYS_TEXT_BASE = 0xffe00000
diff --git a/board/freescale/m5271evb/m5271evb.c b/board/freescale/m5271evb/m5271evb.c
deleted file mode 100644
index 5981a27..0000000
--- a/board/freescale/m5271evb/m5271evb.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * (C) Copyright 2000-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/immap.h>
-
-int checkboard (void) {
- puts ("Board: Freescale M5271EVB\n");
- return 0;
-};
-
-phys_size_t initdram (int board_type) {
-
- int i;
-
- /* Enable Address lines 23-21 and lower 16bits of data path */
- mbar_writeByte(MCF_GPIO_PAR_AD, MCF_GPIO_AD_ADDR23 |
- MCF_GPIO_AD_ADDR22 | MCF_GPIO_AD_ADDR21 |
- MCF_GPIO_AD_DATAL);
-
- /* Set CS2 pin to be SD_CS0 */
- mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
- | MCF_GPIO_PAR_CS_PAR_CS2);
-
- /* Configure SDRAM Control Pin Assignemnt Register */
- mbar_writeByte(MCF_GPIO_PAR_SDRAM, MCF_GPIO_SDRAM_CSSDCS_00 |
- MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS |
- MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE |
- MCF_GPIO_SDRAM_SDCS_11);
- asm(" nop");
-
- /*
- * Check to see if the SDRAM has already been initialized
- * by a run control tool
- */
- if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) {
- /* Initialize DRAM Control Register: DCR */
- mbar_writeShort(MCF_SDRAMC_DCR,
- MCF_SDRAMC_DCR_RTIM(2)
- | MCF_SDRAMC_DCR_RC(0x2E));
- asm(" nop");
-
- /*
- * Initialize DACR0
- *
- * CASL: 01
- * CBM: cmd at A20, bank select bits 21 and up
- * PS: 32bit port size
- */
- mbar_writeLong(MCF_SDRAMC_DACR0,
- MCF_SDRAMC_DACRn_BA(CONFIG_SYS_SDRAM_BASE>>18)
- | MCF_SDRAMC_DACRn_CASL(1)
- | MCF_SDRAMC_DACRn_CBM(3)
- | MCF_SDRAMC_DACRn_PS(0));
- asm(" nop");
-
- /* Initialize DMR0 */
- mbar_writeLong(MCF_SDRAMC_DMR0,
- MCF_SDRAMC_DMRn_BAM_16M
- | MCF_SDRAMC_DMRn_V);
- asm(" nop");
-
- /* Set IP bit in DACR */
- mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
- | MCF_SDRAMC_DACRn_IP);
- asm(" nop");
-
- /* Wait at least 20ns to allow banks to precharge */
- for (i = 0; i < 5; i++)
- asm(" nop");
-
- /* Write to this block to initiate precharge */
- *(u32 *)(CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
- asm(" nop");
-
- /* Set RE bit in DACR */
- mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
- | MCF_SDRAMC_DACRn_RE);
-
- /* Wait for at least 8 auto refresh cycles to occur */
- for (i = 0; i < 2000; i++)
- asm(" nop");
-
- /* Finish the configuration by issuing the MRS */
- mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
- | MCF_SDRAMC_DACRn_MRS);
- asm(" nop");
-
- /*
- * Write to the SDRAM Mode Register A0-A11 = 0x400
- *
- * Write Burst Mode = Programmed Burst Length
- * Op Mode = Standard Op
- * CAS Latency = 2
- * Burst Type = Sequential
- * Burst Length = 1
- */
- *(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xa5a5a5a5;
- asm(" nop");
- }
-
- return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
-};
-
-int testdram (void) {
-
- /* TODO: XXX XXX XXX */
- printf ("DRAM test not implemented!\n");
-
- return (0);
-}
diff --git a/board/freescale/m5271evb/u-boot.lds b/board/freescale/m5271evb/u-boot.lds
deleted file mode 100644
index 3defcd2..0000000
--- a/board/freescale/m5271evb/u-boot.lds
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(m68k)
-
-SECTIONS
-{
- .text :
- {
- arch/m68k/cpu/mcf52x2/start.o (.text*)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/env_embedded.o (.ppcenv)
-
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
-
- .reloc :
- {
- __got_start = .;
- KEEP(*(.got))
- __got_end = .;
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- _sbss = .;
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- _ebss = .;
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/idmr/Makefile b/board/idmr/Makefile
deleted file mode 100644
index 67c2384..0000000
--- a/board/idmr/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = idmr.o flash.o
diff --git a/board/idmr/config.mk b/board/idmr/config.mk
deleted file mode 100644
index 840a37e..0000000
--- a/board/idmr/config.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-CONFIG_SYS_TEXT_BASE = 0xff800000
diff --git a/board/idmr/flash.c b/board/idmr/flash.c
deleted file mode 100644
index 52eb105..0000000
--- a/board/idmr/flash.c
+++ /dev/null
@@ -1,342 +0,0 @@
-/*
- * (C) Copyright 2000-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
-#define FLASH_BANK_SIZE 0x800000
-#define EN29LV640 0x227e227e
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (EN29LV640 & FLASH_TYPEMASK):
- printf ("EN29LV640 (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:
- return;
-}
-
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (EN29LV640 & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured to many flash banks!\n");
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- flash_info[i].start[j] = flashbase + 0x10000 * j;
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + 0x2ffff, &flash_info[0]);
-
- return size;
-}
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result;
- int iflag, prot, sect;
- int rc = ERR_OK;
- int chip1;
- ulong start;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- iflag = disable_interrupts ();
-
- printf ("\n");
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- if (info->protect[sect] == 0) { /* not protected */
- volatile u16 *addr =
- (volatile u16 *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT * CONFIG_SYS_HZ / 1000) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- } while (!chip1);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- printf("Waiting 10 ms...");
- udelay (10000);
-
-/* for (i = 0; i < 10 * 1000 * 1000; ++i)
- asm(" nop");
-*/
-
- printf("done\n");
- if (iflag)
- enable_interrupts ();
-
-
- return rc;
-}
-
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile u16 *addr = (volatile u16 *) dest;
- ulong result;
- int rc = ERR_OK;
- int iflag;
- int chip1;
- ulong start;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait until flash is ready */
- chip1 = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT * CONFIG_SYS_HZ / 1000) {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- } while (!chip1);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- return rc;
-}
-
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, data;
- int rc;
-
- if (addr & 1) {
- printf ("unaligned destination not supported\n");
- return ERR_ALIGN;
- }
-
-#if 0
- if (cnt & 1) {
- printf ("odd transfer sizes not supported\n");
- return ERR_ALIGN;
- }
-#endif
-
- wp = addr;
-
- if (addr & 1) {
- data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
- src);
- if ((rc = write_word (info, wp - 1, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- while (cnt >= 2) {
- data = *((volatile u16 *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 1) {
- data = (*((volatile u8 *) src) << 8) |
- *((volatile u8 *) (wp + 1));
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- return ERR_OK;
-}
diff --git a/board/idmr/idmr.c b/board/idmr/idmr.c
deleted file mode 100644
index 73660d8..0000000
--- a/board/idmr/idmr.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * (C) Copyright 2000-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/immap.h>
-
-int checkboard (void) {
- puts ("Board: iDMR\n");
- return 0;
-};
-
-phys_size_t initdram (int board_type) {
- int i;
-
- /*
- * After reset, CS0 is configured to cover entire address space. We
- * need to configure it to its proper values, so that writes to
- * CONFIG_SYS_SDRAM_BASE and vicinity during SDRAM controller setup below do
- * now fall under CS0 (see 16.3.1 of the MCF5271 Reference Manual).
- */
-
- /* Flash chipselect, CS0 */
- /* ;CSAR0: Flash at 0xFF800000 */
- mbar_writeShort(0x0080, 0xFF80);
-
- /* CSCR0: Flash 6 waits, 16bit */
- mbar_writeShort(0x008A, 0x1980);
-
- /* CSMR0: Flash 8MB, R/W, valid */
- mbar_writeLong(0x0084, 0x007F0001);
-
-
- /*
- * SDRAM configuration proper
- */
-
- /*
- * Address/Data Pin Assignment Reg.: enable address lines 23-21; do
- * not enable data pins D[15:0], as we have 16 bit port to SDRAM
- */
- mbar_writeByte(MCF_GPIO_PAR_AD,
- MCF_GPIO_AD_ADDR23 |
- MCF_GPIO_AD_ADDR22 |
- MCF_GPIO_AD_ADDR21);
-
- /* No need to configure BS pins - reset values are OK */
-
- /* Chip Select Pin Assignment Reg.: set CS[1-7] to GPIO */
- mbar_writeByte(MCF_GPIO_PAR_CS, 0x00);
-
- /* SDRAM Control Pin Assignment Reg. */
- mbar_writeByte(MCF_GPIO_PAR_SDRAM,
- MCF_GPIO_SDRAM_CSSDCS_00 | /* no matter: PAR_CS=0 */
- MCF_GPIO_SDRAM_SDWE |
- MCF_GPIO_SDRAM_SCAS |
- MCF_GPIO_SDRAM_SRAS |
- MCF_GPIO_SDRAM_SCKE |
- MCF_GPIO_SDRAM_SDCS_01);
-
- /*
- * Wait 100us. We run the bus at 50MHz, one cycle is 20ns. So 5
- * iterations will do, but we do 10 just to be safe.
- */
- for (i = 0; i < 10; ++i)
- asm(" nop");
-
-
- /* 1. Initialize DRAM Control Register: DCR */
- mbar_writeShort(MCF_SDRAMC_DCR,
- MCF_SDRAMC_DCR_RTIM(0x10) | /* 65ns */
- MCF_SDRAMC_DCR_RC(0x60)); /* 1562 cycles */
-
-
- /*
- * 2. Initialize DACR0
- *
- * CL: 11 (CL=3: 0x03, 0x02; CL=2: 0x1)
- * CBM: cmd at A20, bank select bits 21 and up
- * PS: 16 bit
- */
- mbar_writeLong(MCF_SDRAMC_DACR0,
- MCF_SDRAMC_DACRn_BA(CONFIG_SYS_SDRAM_BASE>>18) |
- MCF_SDRAMC_DACRn_BA(0x00) |
- MCF_SDRAMC_DACRn_CASL(0x03) |
- MCF_SDRAMC_DACRn_CBM(0x03) |
- MCF_SDRAMC_DACRn_PS(0x03));
-
- /* Initialize DMR0 */
- mbar_writeLong(MCF_SDRAMC_DMR0,
- MCF_SDRAMC_DMRn_BAM_16M |
- MCF_SDRAMC_DMRn_V);
-
-
- /* 3. Set IP bit in DACR to initiate PALL command */
- mbar_writeLong(MCF_SDRAMC_DACR0,
- mbar_readLong(MCF_SDRAMC_DACR0) |
- MCF_SDRAMC_DACRn_IP);
-
- /* Write to this block to initiate precharge */
- *(volatile u16 *)(CONFIG_SYS_SDRAM_BASE) = 0xa5a5;
-
- /*
- * Wait at least 20ns to allow banks to precharge (t_RP = 20ns). We
- * wait a wee longer, just to be safe.
- */
- for (i = 0; i < 5; ++i)
- asm(" nop");
-
-
- /* 4. Set RE bit in DACR */
- mbar_writeLong(MCF_SDRAMC_DACR0,
- mbar_readLong(MCF_SDRAMC_DACR0) |
- MCF_SDRAMC_DACRn_RE);
-
- /*
- * Wait for at least 8 auto refresh cycles to occur, i.e. at least
- * 781 bus cycles.
- */
- for (i = 0; i < 1000; ++i)
- asm(" nop");
-
- /* Finish the configuration by issuing the MRS */
- mbar_writeLong(MCF_SDRAMC_DACR0,
- mbar_readLong(MCF_SDRAMC_DACR0) |
- MCF_SDRAMC_DACRn_MRS);
-
- /*
- * Write to the SDRAM Mode Register A0-A11 = 0x400
- *
- * Write Burst Mode = Programmed Burst Length
- * Op Mode = Standard Op
- * CAS Latency = 3
- * Burst Type = Sequential
- * Burst Length = 1
- */
- *(volatile u32 *)(CONFIG_SYS_SDRAM_BASE + 0x1800) = 0xa5a5a5a5;
-
- return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
-};
-
-
-int testdram (void) {
-
- /* TODO: XXX XXX XXX */
- printf ("DRAM test not implemented!\n");
-
- return (0);
-}
diff --git a/board/idmr/u-boot.lds b/board/idmr/u-boot.lds
deleted file mode 100644
index 4071f70..0000000
--- a/board/idmr/u-boot.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(m68k)
-
-SECTIONS
-{
- .text :
- {
- arch/m68k/cpu/mcf52x2/start.o (.text*)
-
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
-
- .reloc :
- {
- __got_start = .;
- KEEP(*(.got))
- __got_end = .;
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- _sbss = .;
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- _ebss = .;
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
generated by cgit v1.1 at 2024-12-22 22:33:23 +0000