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-rw-r--r--board/RRvision/Kconfig9
-rw-r--r--board/RRvision/MAINTAINERS7
-rw-r--r--board/RRvision/Makefile8
-rw-r--r--board/RRvision/RRvision.c222
-rw-r--r--board/RRvision/flash.c506
-rw-r--r--board/RRvision/u-boot.lds87
-rw-r--r--board/RRvision/video_ad7179.h52
7 files changed, 0 insertions, 891 deletions
diff --git a/board/RRvision/Kconfig b/board/RRvision/Kconfig
deleted file mode 100644
index 7c8a6f6..0000000
--- a/board/RRvision/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_RRVISION
-
-config SYS_BOARD
- default "RRvision"
-
-config SYS_CONFIG_NAME
- default "RRvision"
-
-endif
diff --git a/board/RRvision/MAINTAINERS b/board/RRvision/MAINTAINERS
deleted file mode 100644
index 59b5c5f..0000000
--- a/board/RRvision/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-RRVISION BOARD
-M: Wolfgang Denk <wd@denx.de>
-S: Maintained
-F: board/RRvision/
-F: include/configs/RRvision.h
-F: configs/RRvision_defconfig
-F: configs/RRvision_LCD_defconfig
diff --git a/board/RRvision/Makefile b/board/RRvision/Makefile
deleted file mode 100644
index 908e8f8..0000000
--- a/board/RRvision/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = RRvision.o flash.o
diff --git a/board/RRvision/RRvision.c b/board/RRvision/RRvision.c
deleted file mode 100644
index d94e238..0000000
--- a/board/RRvision/RRvision.c
+++ /dev/null
@@ -1,222 +0,0 @@
-/*
- * (C) Copyright 2001-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] =
-{
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x11ADFC04, 0xEFBBBC00,
- 0x1FF77C47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1FF77C34, 0xEFEABC34, 0x1FB57C35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEFC04, 0x10ADFC04, 0xF0AFFC00,
- 0xF0AFFC00, 0xF1AFFC00, 0xEFBBBC00, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x01B93C04, 0x1FF77C47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1F07FC04, 0xEEAEBC00, 0x10AD7C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BBBC04, 0x1FF77C47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1FF5FC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
- 0xFFFFFC84, 0xFFFFFC07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7FFFFC07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Always return 1 (no second DRAM bank).
- */
-
-int checkboard (void)
-{
- char buf[64];
- int i;
- int l = getenv_f("serial#", buf, sizeof(buf));
-
- puts ("Board: RRvision ");
-
- for (i=0; i < l; ++i) {
- if (buf[i] == ' ')
- break;
- putc (buf[i]);
- }
-
- putc ('\n');
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long reg;
- long int size8, size9;
- long int size = 0;
-
- upmconfig (UPMA, (uint *)sdram_table, sizeof(sdram_table) / sizeof(uint));
-
- /*
- * Preliminary prescaler for refresh (depends on number of
- * banks): This value is selected for four cycles every 62.4 us
- * with two SDRAM banks or four cycles every 31.2 us with one
- * bank. It will be adjusted after memory sizing.
- */
- memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_8K;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller bank 1 the SDRAM bank 2 at physical address 0.
- */
- memctl->memc_or1 = CONFIG_SYS_OR2_PRELIM;
- memctl->memc_br1 = CONFIG_SYS_BR2_PRELIM;
-
- memctl->memc_mamr = CONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay (1);
- memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size
- *
- * try 8 column mode
- */
- size8 = dram_size (CONFIG_SYS_MAMR_8COL,
- SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CONFIG_SYS_MAMR_9COL,
- SDRAM_BASE2_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size = size8;
- memctl->memc_mamr = CONFIG_SYS_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- /*
- * Adjust refresh rate depending on SDRAM type
- * For types > 128 MBit leave it at the current (fast) rate
- */
- if (size < 0x02000000) {
- /* reduce to 15.6 us (62.4 us / quad) */
- memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_4K;
- udelay (1000);
- }
-
- /*
- * Final mapping
- */
- memctl->memc_or1 = ((-size) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
- memctl->memc_br1 = (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- /*
- * No bank 1
- *
- * invalidate bank
- */
- memctl->memc_br3 = 0;
-
- /* adjust refresh rate depending on SDRAM type, one bank */
- reg = memctl->memc_mptpr;
- reg >>= 1; /* reduce to CONFIG_SYS_MPTPR_1BK_8K / _4K */
- memctl->memc_mptpr = reg;
-
- udelay (10000);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
diff --git a/board/RRvision/flash.c b/board/RRvision/flash.c
deleted file mode 100644
index 146a923..0000000
--- a/board/RRvision/flash.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#define DEBUG
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#ifndef CONFIG_ENV_ADDR
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
-#endif
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size & OR_AM_MSK);
- memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
- /* ENV protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- puts ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: puts ("AMD "); break;
- case FLASH_MAN_FUJ: puts ("FUJITSU "); break;
- default: puts ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: puts ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: puts ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: puts ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: puts ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: puts ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: puts ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: puts ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: puts ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: puts ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- puts (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- puts ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- puts ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- ulong value;
- ulong base = (ulong)addr;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-
- value = addr[0];
-
- switch (value) {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = addr[1]; /* device ID */
-
- switch (value) {
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 71;
- info->size = 0x00800000;
- break; /* => 8 MB */
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
- }
-
- /* set up sector start address table */
- switch (value) {
- case AMD_ID_LV400B:
- case AMD_ID_LV800B:
- case AMD_ID_LV160B:
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- break;
- case AMD_ID_LV400T:
- case AMD_ID_LV800T:
- case AMD_ID_LV160T:
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- break;
- case AMD_ID_LV320B:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The first 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < 8)
- ? 2 * ( 8 << 10)
- : 2 * (64 << 10);
- }
- break;
- case AMD_ID_LV320T:
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base;
- /*
- * The last 8 sectors are 8 kB,
- * all the other ones are 64 kB
- */
- base += (i < (info->sector_count - 8))
- ? 2 * (64 << 10)
- : 2 * ( 8 << 10);
- }
- break;
- default:
- return (0);
- break;
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr = (volatile unsigned long *)info->start[0];
-
- *addr = 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- puts ("- missing\n");
- } else {
- puts ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- puts ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
- addr[0] = 0x00300030;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
- while ((addr[0] & 0x00800080) != 0x00800080) {
- if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- puts ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
- addr[0] = 0x00F000F0; /* reset bank */
-
- puts (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds
deleted file mode 100644
index 9470a24..0000000
--- a/board/RRvision/u-boot.lds
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
- arch/powerpc/cpu/mpc8xx/start.o (.text*)
- arch/powerpc/cpu/mpc8xx/traps.o (.text*)
-
- . = env_offset;
- common/env_embedded.o (.ppcenv)
-
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- KEEP(*(.got))
- PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/RRvision/video_ad7179.h b/board/RRvision/video_ad7179.h
deleted file mode 100644
index 1fc1ef4..0000000
--- a/board/RRvision/video_ad7179.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * (C) Copyright 2003 Wolfgang Grandegger <wg@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#define VIDEO_ENCODER_NAME "Analog Devices AD7179"
-
-#define VIDEO_ENCODER_I2C_RATE 100000 /* Max rate is 100Khz */
-#define VIDEO_ENCODER_CB_Y_CR_Y /* Use CB Y CR Y format... */
-
-#define VIDEO_MODE_YUYV /* The only mode supported by this encoder */
-#undef VIDEO_MODE_RGB
-#define VIDEO_MODE_BPP 16
-
-#ifdef VIDEO_MODE_PAL
-#define VIDEO_ACTIVE_COLS 720
-#define VIDEO_ACTIVE_ROWS 576
-#define VIDEO_VISIBLE_COLS 640
-#define VIDEO_VISIBLE_ROWS 480
-#else
-#error "NTSC mode is not supported"
-#endif
-
-static unsigned char video_encoder_data[] = {
- 0x05, /* Mode Register 0 */
- 0x11, /* Mode Register 1 */
- 0x20, /* Mode Register 2 */
- 0x0C, /* Mode Register 3 */
- 0x01, /* Mode Register 4 */
- 0x00, /* Reserved */
- 0x00, /* Reserved */
- 0x04, /* Timing Register 0 */
- 0x00, /* Timing Register 1 */
- 0xCB, /* Subcarrier Frequency Register 0 */
- 0x0A, /* Subcarrier Frequency Register 1 */
- 0x09, /* Subcarrier Frequency Register 2 */
- 0x2A, /* Subcarrier Frequency Register 3 */
- 0x00, /* Subcarrier Phase */
- 0x00, /* Closed Captioning Ext Reg 0 */
- 0x00, /* Closed Captioning Ext Reg 1 */
- 0x00, /* Closed Captioning Reg 0 */
- 0x00, /* Closed Captioning Reg 1 */
- 0x00, /* Pedestal Control Reg 0 */
- 0x00, /* Pedestal Control Reg 1 */
- 0x00, /* Pedestal Control Reg 2 */
- 0x00, /* Pedestal Control Reg 3 */
- 0x00, /* CGMS_WSS Reg 0 */
- 0x00, /* CGMS_WSS Reg 0 */
- 0x00, /* CGMS_WSS Reg 0 */
- 0x00 /* Teletext Req. Control Reg */
-} ;