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-rw-r--r--board/Marvell/gplugd/gplugd.c71
-rw-r--r--board/bf537-stamp/Makefile2
-rw-r--r--board/bf537-stamp/post-memory.c63
-rw-r--r--board/bf537-stamp/post.c174
-rw-r--r--board/efikamx/efikamx.c124
-rw-r--r--board/efikamx/imximage_mx.cfg (renamed from board/efikamx/imximage.cfg)0
-rw-r--r--board/efikamx/imximage_sb.cfg122
-rw-r--r--board/freescale/mx25pdk/Makefile49
-rw-r--r--board/freescale/mx25pdk/imximage.cfg73
-rw-r--r--board/freescale/mx25pdk/lowlevel_init.S21
-rw-r--r--board/freescale/mx25pdk/mx25pdk.c56
-rw-r--r--board/freescale/mx31ads/mx31ads.c7
-rw-r--r--board/freescale/mx31pdk/mx31pdk.c7
-rw-r--r--board/freescale/mx51evk/mx51evk.c1
-rw-r--r--board/freescale/mx53ard/mx53ard.c1
-rw-r--r--board/freescale/mx53evk/mx53evk.c1
-rw-r--r--board/freescale/mx53loco/mx53loco.c1
-rw-r--r--board/freescale/mx53smd/mx53smd.c1
-rw-r--r--board/isee/igep0020/igep0020.c1
-rw-r--r--board/isee/igep0020/igep0020.h9
-rw-r--r--board/karo/tx25/tx25.c3
-rw-r--r--board/logicpd/imx31_litekit/imx31_litekit.c7
-rw-r--r--board/overo/overo.c1
-rw-r--r--board/overo/overo.h11
-rw-r--r--board/syteco/zmx25/zmx25.c8
-rw-r--r--board/timll/devkit8000/devkit8000.c2
-rw-r--r--board/ttcontrol/vision2/vision2.c1
27 files changed, 498 insertions, 319 deletions
diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c
index dc7d89d..b4f7f81 100644
--- a/board/Marvell/gplugd/gplugd.c
+++ b/board/Marvell/gplugd/gplugd.c
@@ -32,6 +32,13 @@
#include <mvmfp.h>
#include <asm/arch/mfp.h>
#include <asm/arch/armada100.h>
+#include <asm/gpio.h>
+#include <miiphy.h>
+
+#ifdef CONFIG_ARMADA100_FEC
+#include <net.h>
+#include <netdev.h>
+#endif /* CONFIG_ARMADA100_FEC */
DECLARE_GLOBAL_DATA_PTR;
@@ -45,6 +52,26 @@ int board_early_init_f(void)
/* Enable Console on UART3 */
MFPO8_UART3_TXD,
MFPO9_UART3_RXD,
+
+ /* Ethernet PHY Interface */
+ MFP086_ETH_TXCLK,
+ MFP087_ETH_TXEN,
+ MFP088_ETH_TXDQ3,
+ MFP089_ETH_TXDQ2,
+ MFP090_ETH_TXDQ1,
+ MFP091_ETH_TXDQ0,
+ MFP092_ETH_CRS,
+ MFP093_ETH_COL,
+ MFP094_ETH_RXCLK,
+ MFP095_ETH_RXER,
+ MFP096_ETH_RXDQ3,
+ MFP097_ETH_RXDQ2,
+ MFP098_ETH_RXDQ1,
+ MFP099_ETH_RXDQ0,
+ MFP100_ETH_MDC,
+ MFP101_ETH_MDIO,
+ MFP103_ETH_RXDV,
+
MFP_EOC /*End of configuration*/
};
/* configure MFP's */
@@ -58,5 +85,49 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD;
/* adress of boot parameters */
gd->bd->bi_boot_params = armd1_sdram_base(0) + 0x100;
+ /* Assert PHY_RST# */
+ gpio_direction_output(CONFIG_SYS_GPIO_PHY_RST, GPIO_LOW);
+ udelay(10);
+ /* Deassert PHY_RST# */
+ gpio_set_value(CONFIG_SYS_GPIO_PHY_RST, GPIO_HIGH);
return 0;
}
+
+#ifdef CONFIG_ARMADA100_FEC
+int board_eth_init(bd_t *bis)
+{
+ struct armd1apmu_registers *apmu_regs =
+ (struct armd1apmu_registers *)ARMD1_APMU_BASE;
+
+ /* Enable clock of ethernet controller */
+ writel(FE_CLK_RST | FE_CLK_ENA, &apmu_regs->fecrc);
+
+ return armada100_fec_register(ARMD1_FEC_BASE);
+}
+
+#ifdef CONFIG_RESET_PHY_R
+/* Configure and initialize PHY chip 88E3015 */
+void reset_phy(void)
+{
+ u16 phy_adr;
+ const char *name = "armd-fec0";
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xff, 0xff, &phy_adr)) {
+ printf("Err..%s could not read PHY dev address\n", __func__);
+ return;
+ }
+
+ /* Set Ethernet LED in TX blink mode */
+ miiphy_write(name, phy_adr, PHY_LED_MAN_REG, 0x00);
+ miiphy_write(name, phy_adr, PHY_LED_PAR_SEL_REG, PHY_LED_VAL);
+
+ /* reset the phy */
+ miiphy_reset(name, phy_adr);
+ debug("88E3015 Initialized on %s\n", name);
+}
+#endif /* CONFIG_RESET_PHY_R */
+#endif /* CONFIG_ARMADA100_FEC */
diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile
index 2b9328b..49e4414 100644
--- a/board/bf537-stamp/Makefile
+++ b/board/bf537-stamp/Makefile
@@ -31,7 +31,7 @@ LIB = $(obj)lib$(BOARD).o
COBJS-y := $(BOARD).o
COBJS-$(CONFIG_BFIN_IDE) += ide-cf.o
-COBJS-$(CONFIG_HAS_POST) += post.o post-memory.o
+COBJS-$(CONFIG_HAS_POST) += post-memory.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/bf537-stamp/post-memory.c b/board/bf537-stamp/post-memory.c
index 49022dc..2dea92f 100644
--- a/board/bf537-stamp/post-memory.c
+++ b/board/bf537-stamp/post-memory.c
@@ -13,7 +13,6 @@
#define SCLK_NUM 3
void post_out_buff(char *buff);
-int post_key_pressed(void);
void post_init_pll(int mult, int div);
int post_init_sdram(int sclk);
void post_init_uart(int sclk);
@@ -52,7 +51,7 @@ int memory_post_test(int flags)
sclk_temp -= CONFIG_SCLK_DIV;
sclk = sclk * 1000000;
post_init_uart(sclk);
- if (post_key_pressed() == 0)
+ if (post_hotkeys_pressed() == 0)
return 0;
for (m = 0; m < CCLK_NUM; m++) {
@@ -130,66 +129,6 @@ void post_out_buff(char *buff)
;
}
-/* Using sw10-PF5 as the hotkey */
-#define KEY_LOOP 0x80000
-#define KEY_DELAY 0x80
-int post_key_pressed(void)
-{
- int i, n;
- unsigned short value;
-
- bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~PF5);
- bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() & ~PF5);
- bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() | PF5);
- SSYNC();
-
- post_out_buff("########Press SW10 to enter Memory POST########: 3\0");
- for (i = 0; i < KEY_LOOP; i++) {
- value = bfin_read_PORTFIO() & PF5;
- if (bfin_read_UART0_RBR() == 0x0D) {
- value = 0;
- goto key_pressed;
- }
- if (value != 0)
- goto key_pressed;
- for (n = 0; n < KEY_DELAY; n++)
- asm("nop");
- }
- post_out_buff("\b2\0");
-
- for (i = 0; i < KEY_LOOP; i++) {
- value = bfin_read_PORTFIO() & PF5;
- if (bfin_read_UART0_RBR() == 0x0D) {
- value = 0;
- goto key_pressed;
- }
- if (value != 0)
- goto key_pressed;
- for (n = 0; n < KEY_DELAY; n++)
- asm("nop");
- }
- post_out_buff("\b1\0");
-
- for (i = 0; i < KEY_LOOP; i++) {
- value = bfin_read_PORTFIO() & PF5;
- if (bfin_read_UART0_RBR() == 0x0D) {
- value = 0;
- goto key_pressed;
- }
- if (value != 0)
- goto key_pressed;
- for (n = 0; n < KEY_DELAY; n++)
- asm("nop");
- }
- key_pressed:
- post_out_buff("\b0");
- post_out_buff("\n\r\0");
- if (value == 0)
- return 0;
- post_out_buff("Hotkey has been pressed, Enter POST . . . . . .\n\r\0");
- return 1;
-}
-
void post_init_pll(int mult, int div)
{
diff --git a/board/bf537-stamp/post.c b/board/bf537-stamp/post.c
deleted file mode 100644
index 60eed5f..0000000
--- a/board/bf537-stamp/post.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * BF537-STAMP POST code
- *
- * Enter bugs at http://blackfin.uclinux.org/
- *
- * Copyright (c) 2005-2009 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#include <common.h>
-#include <config.h>
-#include <command.h>
-#include <asm/blackfin.h>
-#include <asm/gpio.h>
-
-/* Using sw10-PF5 as the hotkey */
-int post_hotkeys_pressed(void)
-{
- int delay = 3;
- int i;
- unsigned short value;
-
- gpio_request(GPIO_PF5, "post");
- gpio_direction_input(GPIO_PF5);
-
- printf("########Press SW10 to enter Memory POST########: %2d ", delay);
- while (delay--) {
- for (i = 0; i < 100; i++) {
- value = gpio_get_value(GPIO_PF5);
- if (value != 0) {
- break;
- }
- udelay(10000);
- }
- printf("\b\b\b%2d ", delay);
- }
- printf("\b\b\b 0");
- printf("\n");
- if (value == 0)
- return 0;
- else {
- printf("Hotkey has been pressed, Enter POST . . . . . .\n");
- return 1;
- }
-
- gpio_free(GPIO_PF5);
-}
-
-int uart_post_test(int flags)
-{
- return 0;
-}
-
-#define BLOCK_SIZE 0x10000
-#define VERIFY_ADDR 0x2000000
-extern int erase_block_flash(int);
-extern int write_data(long lStart, long lCount, uchar * pnData);
-int flash_post_test(int flags)
-{
- unsigned short *pbuf, *temp;
- int offset, n, i;
- int value = 0;
- int result = 0;
- printf("\n");
- pbuf = (unsigned short *)VERIFY_ADDR;
- temp = pbuf;
- for (n = FLASH_START_POST_BLOCK; n < FLASH_END_POST_BLOCK; n++) {
- offset = (n - 7) * BLOCK_SIZE;
- printf("--------Erase block:%2d..", n);
- erase_block_flash(n);
- printf("OK\r");
- printf("--------Program block:%2d...", n);
- write_data(CONFIG_SYS_FLASH_BASE + offset, BLOCK_SIZE, pbuf);
- printf("OK\r");
- printf("--------Verify block:%2d...", n);
- for (i = 0; i < BLOCK_SIZE; i += 2) {
- if (*(unsigned short *)(CONFIG_SYS_FLASH_BASE + offset + i) !=
- *temp++) {
- value = 1;
- result = 1;
- }
- }
- if (value)
- printf("failed\n");
- else
- printf("OK %3d%%\r",
- (int)(
- (n + 1 -
- FLASH_START_POST_BLOCK) *
- 100 / (FLASH_END_POST_BLOCK -
- FLASH_START_POST_BLOCK)));
-
- temp = pbuf;
- value = 0;
- }
- printf("\n");
- if (result)
- return -1;
- else
- return 0;
-}
-
-/****************************************************
- * LED1 ---- PF6 LED2 ---- PF7 *
- * LED3 ---- PF8 LED4 ---- PF9 *
- * LED5 ---- PF10 LED6 ---- PF11 *
- ****************************************************/
-int led_post_test(int flags)
-{
- unsigned int leds[] = {
- GPIO_PF6, GPIO_PF7, GPIO_PF8,
- GPIO_PF9, GPIO_PF10, GPIO_PF11,
- };
- int i;
-
- for (i = 0; i < ARRAY_SIZE(leds); ++i) {
- gpio_request(leds[i], "post");
- gpio_direction_output(leds[i], 0);
-
- printf("LED%i on", i + 1);
- gpio_set_value(leds[i], 1);
- udelay(1000000);
- printf("\b\b\b\b\b\b\b");
-
- gpio_free(leds[i]);
- }
-
- return 0;
-}
-
-/************************************************
- * SW10 ---- PF5 SW11 ---- PF4 *
- * SW12 ---- PF3 SW13 ---- PF2 *
- ************************************************/
-int button_post_test(int flags)
-{
- unsigned int buttons[] = {
- GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5,
- };
- unsigned int sws[] = { 13, 12, 11, 10, };
- int i, delay = 5;
- unsigned short value = 0;
- int result = 0;
-
- for (i = 0; i < ARRAY_SIZE(buttons); ++i) {
- gpio_request(buttons[i], "post");
- gpio_direction_input(buttons[i]);
-
- delay = 5;
- printf("\n--------Press SW%i: %2d ", sws[i], delay);
- while (delay--) {
- for (i = 0; i < 100; i++) {
- value = gpio_get_value(buttons[i]);
- if (value != 0)
- break;
- udelay(10000);
- }
- printf("\b\b\b%2d ", delay);
- }
- if (value != 0)
- puts("\b\bOK");
- else {
- result = -1;
- puts("\b\bfailed");
- }
-
- gpio_free(buttons[i]);
- }
-
- puts("\n");
-
- return result;
-}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 5be1f6c..0c4e24b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -62,10 +62,13 @@ void efikamx_toggle_led(uint32_t mask);
#define EFIKAMX_BOARD_REV_13 0x3
#define EFIKAMX_BOARD_REV_14 0x4
+#define EFIKASB_BOARD_REV_13 0x1
+#define EFIKASB_BOARD_REV_20 0x2
+
/*
* Board identification
*/
-u32 get_efika_rev(void)
+u32 get_efikamx_rev(void)
{
u32 rev = 0;
/*
@@ -97,6 +100,31 @@ u32 get_efika_rev(void)
return (~rev & 0x7) + 1;
}
+inline u32 get_efikasb_rev(void)
+{
+ u32 rev = 0;
+
+ mxc_request_iomux(MX51_PIN_EIM_CS3, IOMUX_CONFIG_GPIO);
+ mxc_iomux_set_pad(MX51_PIN_EIM_CS3, PAD_CTL_100K_PU);
+ gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_EIM_CS3));
+ rev |= (!!gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS3))) << 0;
+
+ mxc_request_iomux(MX51_PIN_EIM_CS4, IOMUX_CONFIG_GPIO);
+ mxc_iomux_set_pad(MX51_PIN_EIM_CS4, PAD_CTL_100K_PU);
+ gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_EIM_CS4));
+ rev |= (!!gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS4))) << 1;
+
+ return rev;
+}
+
+inline uint32_t get_efika_rev(void)
+{
+ if (machine_is_efikamx())
+ return get_efikamx_rev();
+ else
+ return get_efikasb_rev();
+}
+
u32 get_board_rev(void)
{
return get_cpu_rev() | (get_efika_rev() << 8);
@@ -268,25 +296,36 @@ struct fsl_esdhc_cfg esdhc_cfg[2] = {
{MMC_SDHC2_BASE_ADDR, 1},
};
+static inline uint32_t efika_mmc_cd(void)
+{
+ if (machine_is_efikamx())
+ return MX51_PIN_GPIO1_0;
+ else
+ return MX51_PIN_EIM_CS2;
+}
+
int board_mmc_getcd(u8 *absent, struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+ uint32_t cd = efika_mmc_cd();
if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
- *absent = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0));
+ *absent = gpio_get_value(IOMUX_TO_GPIO(cd));
else
*absent = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_8));
return 0;
}
+
int board_mmc_init(bd_t *bis)
{
int ret;
+ uint32_t cd = efika_mmc_cd();
/* SDHC1 is used on all revisions, setup control pins first */
- mxc_request_iomux(MX51_PIN_GPIO1_0,
+ mxc_request_iomux(cd,
IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
- mxc_iomux_set_pad(MX51_PIN_GPIO1_0,
+ mxc_iomux_set_pad(cd,
PAD_CTL_DRV_HIGH | PAD_CTL_HYS_ENABLE |
PAD_CTL_PUE_KEEPER | PAD_CTL_100K_PU |
PAD_CTL_ODE_OPENDRAIN_NONE |
@@ -298,11 +337,12 @@ int board_mmc_init(bd_t *bis)
PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE |
PAD_CTL_SRE_FAST);
- gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0));
+ gpio_direction_input(IOMUX_TO_GPIO(cd));
gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1));
/* Internal SDHC1 IOMUX + SDHC2 IOMUX on old boards */
- if (get_efika_rev() < EFIKAMX_BOARD_REV_12) {
+ if (machine_is_efikasb() || (machine_is_efikamx() &&
+ (get_efika_rev() < EFIKAMX_BOARD_REV_12))) {
/* SDHC1 IOMUX */
mxc_request_iomux(MX51_PIN_SD1_CMD,
IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
@@ -414,6 +454,7 @@ int board_mmc_init(bd_t *bis)
ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
}
+
return ret;
}
#endif
@@ -493,27 +534,44 @@ static inline void setup_iomux_ata(void) { }
*/
void setup_iomux_led(void)
{
- /* Blue LED */
- mxc_request_iomux(MX51_PIN_CSI1_D9, IOMUX_CONFIG_ALT3);
- gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 0);
-
- /* Green LED */
- mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3);
- gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), 0);
-
- /* Red LED */
- mxc_request_iomux(MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT3);
- gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), 0);
+ if (machine_is_efikamx()) {
+ /* Blue LED */
+ mxc_request_iomux(MX51_PIN_CSI1_D9, IOMUX_CONFIG_ALT3);
+ gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 0);
+
+ /* Green LED */
+ mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3);
+ gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), 0);
+
+ /* Red LED */
+ mxc_request_iomux(MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT3);
+ gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), 0);
+ } else {
+ /* CAPS-LOCK LED */
+ mxc_request_iomux(MX51_PIN_EIM_CS0, IOMUX_CONFIG_GPIO);
+ gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_CS0), 0);
+
+ /* ALARM-LED LED */
+ mxc_request_iomux(MX51_PIN_GPIO1_3, IOMUX_CONFIG_GPIO);
+ gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3), 0);
+ }
}
void efikamx_toggle_led(uint32_t mask)
{
- gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9),
- mask & EFIKAMX_LED_BLUE);
- gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC),
- mask & EFIKAMX_LED_GREEN);
- gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC),
- mask & EFIKAMX_LED_RED);
+ if (machine_is_efikamx()) {
+ gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9),
+ mask & EFIKAMX_LED_BLUE);
+ gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC),
+ mask & EFIKAMX_LED_GREEN);
+ gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC),
+ mask & EFIKAMX_LED_RED);
+ } else {
+ gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS0),
+ mask & EFIKAMX_LED_BLUE);
+ gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3),
+ !(mask & EFIKAMX_LED_GREEN));
+ }
}
/*
@@ -607,7 +665,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX51_EFIKAMX;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
return 0;
@@ -629,7 +686,24 @@ int board_late_init(void)
int checkboard(void)
{
- puts("Board: Efika MX\n");
+ u32 rev = get_efika_rev();
+
+ if (machine_is_efikamx()) {
+ printf("Board: Efika MX, rev1.%i\n", rev & 0xf);
+ return 0;
+ } else {
+ switch (rev) {
+ case EFIKASB_BOARD_REV_13:
+ printf("Board: Efika SB rev1.3\n");
+ break;
+ case EFIKASB_BOARD_REV_20:
+ printf("Board: Efika SB rev2.0\n");
+ break;
+ default:
+ printf("Board: Efika SB, rev Unknown\n");
+ break;
+ }
+ }
return 0;
}
diff --git a/board/efikamx/imximage.cfg b/board/efikamx/imximage_mx.cfg
index 6fe0ff9..6fe0ff9 100644
--- a/board/efikamx/imximage.cfg
+++ b/board/efikamx/imximage_mx.cfg
diff --git a/board/efikamx/imximage_sb.cfg b/board/efikamx/imximage_sb.cfg
new file mode 100644
index 0000000..878146f
--- /dev/null
+++ b/board/efikamx/imximage_sb.cfg
@@ -0,0 +1,122 @@
+#
+# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+#
+# BASED ON: imx51evk
+#
+# (C) Copyright 2009
+# Stefano Babic DENX Software Engineering sbabic@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not write to the Free Software
+# Foundation Inc. 51 Franklin Street Fifth Floor Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.imxmage for more details about how-to configure
+# and create imximage boot image
+#
+# The syntax is taken as close as possible with the kwbimage
+
+# Boot Device : one of
+# spi, sd (the board has no nand neither onenand)
+BOOT_FROM spi
+
+# Device Configuration Data (DCD)
+#
+# Each entry must have the format:
+# Addr-type Address Value
+#
+# where:
+# Addr-type register length (1,2 or 4 bytes)
+# Address absolute address of the register
+# value value to be stored in the register
+
+# Setting IOMUXC
+DATA 4 0x73fa88a0 0x200
+DATA 4 0x73fa850c 0x20c3
+DATA 4 0x73fa8510 0x20c3
+DATA 4 0x73fa883c 0x2
+DATA 4 0x73fa8848 0x2
+DATA 4 0x73fa84b8 0xe7
+DATA 4 0x73fa84bc 0x45
+DATA 4 0x73fa84c0 0x45
+DATA 4 0x73fa84c4 0x45
+DATA 4 0x73fa84c8 0x45
+DATA 4 0x73fa8820 0x0
+DATA 4 0x73fa84a4 0x5
+DATA 4 0x73fa84a8 0x5
+DATA 4 0x73fa84ac 0xe3
+DATA 4 0x73fa84b0 0xe3
+DATA 4 0x73fa84b4 0xe3
+DATA 4 0x73fa84cc 0xe3
+DATA 4 0x73fa84d0 0xe2
+
+DATA 4 0x73fa882c 0x4
+DATA 4 0x73fa88a4 0x4
+DATA 4 0x73fa88ac 0x4
+DATA 4 0x73fa88b8 0x4
+
+# Setting DDR for micron
+# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model
+# CAS=3 BL=4
+# ESDCTL_ESDCTL0
+DATA 4 0x83fd9000 0x82a20000
+# ESDCTL_ESDCTL1
+DATA 4 0x83fd9008 0x82a20000
+# ESDCTL_ESDMISC
+DATA 4 0x83fd9010 0xcaaaf6d0
+# ESDCTL_ESDCFG0
+DATA 4 0x83fd9004 0x333574aa
+# ESDCTL_ESDCFG1
+DATA 4 0x83fd900c 0x333574aa
+
+# Init DRAM on CS0
+# ESDCTL_ESDSCR
+DATA 4 0x83fd9014 0x04008008
+DATA 4 0x83fd9014 0x0000801a
+DATA 4 0x83fd9014 0x0000801b
+DATA 4 0x83fd9014 0x00448019
+DATA 4 0x83fd9014 0x07328018
+DATA 4 0x83fd9014 0x04008008
+DATA 4 0x83fd9014 0x00008010
+DATA 4 0x83fd9014 0x00008010
+DATA 4 0x83fd9014 0x06328018
+DATA 4 0x83fd9014 0x03808019
+DATA 4 0x83fd9014 0x00408019
+DATA 4 0x83fd9014 0x00008000
+
+# Init DRAM on CS1
+DATA 4 0x83fd9014 0x0400800c
+DATA 4 0x83fd9014 0x0000801e
+DATA 4 0x83fd9014 0x0000801f
+DATA 4 0x83fd9014 0x0000801d
+DATA 4 0x83fd9014 0x0732801c
+DATA 4 0x83fd9014 0x0400800c
+DATA 4 0x83fd9014 0x00008014
+DATA 4 0x83fd9014 0x00008014
+DATA 4 0x83fd9014 0x0632801c
+DATA 4 0x83fd9014 0x0380801d
+DATA 4 0x83fd9014 0x0040801d
+DATA 4 0x83fd9014 0x00008004
+
+# Write to CTL0
+DATA 4 0x83fd9000 0xb2a20000
+# Write to CTL1
+DATA 4 0x83fd9008 0xb2a20000
+# ESDMISC
+DATA 4 0x83fd9010 0xcaaaf6d0
+#ESDCTL_ESDCDLYGD
+DATA 4 0x83fd9034 0x90000000
+DATA 4 0x83fd9014 0x00000000
diff --git a/board/freescale/mx25pdk/Makefile b/board/freescale/mx25pdk/Makefile
new file mode 100644
index 0000000..4d45ae3
--- /dev/null
+++ b/board/freescale/mx25pdk/Makefile
@@ -0,0 +1,49 @@
+#
+# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
+#
+# (C) Copyright 2011 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := mx25pdk.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/mx25pdk/imximage.cfg b/board/freescale/mx25pdk/imximage.cfg
new file mode 100644
index 0000000..f7af7ff
--- /dev/null
+++ b/board/freescale/mx25pdk/imximage.cfg
@@ -0,0 +1,73 @@
+#
+# (C) Copyright 2009
+# Stefano Babic DENX Software Engineering sbabic@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# Refer docs/README.imxmage for more details about how-to configure
+# and create imximage boot image
+#
+# The syntax is taken as close as possible with the kwbimage
+
+# Boot Device : one of
+# spi, sd (the board has no nand neither onenand)
+
+BOOT_FROM sd
+
+# Device Configuration Data (DCD)
+#
+# Each entry must have the format:
+# Addr-type Address Value
+#
+# where:
+# Addr-type register length (1,2 or 4 bytes)
+# Address absolute address of the register
+# value value to be stored in the register
+
+# EIM config-CS5 init -- CPLD
+DATA 4 0xB8002050 0x0000D843
+DATA 4 0xB8002054 0x22252521
+DATA 4 0xB8002058 0x22220A00
+
+# DDR2 init
+DATA 4 0xB8001004 0x0076E83A
+DATA 4 0xB8001010 0x00000204
+DATA 4 0xB8001000 0x92210000
+DATA 4 0x80000f00 0x12344321
+DATA 4 0xB8001000 0xB2210000
+DATA 1 0x82000000 0xda
+DATA 1 0x83000000 0xda
+DATA 1 0x81000400 0xda
+DATA 1 0x80000333 0xda
+
+DATA 4 0xB8001000 0x92210000
+DATA 1 0x80000400 0x12345678
+
+DATA 4 0xB8001000 0xA2210000
+DATA 4 0x80000000 0x87654321
+DATA 4 0x80000000 0x87654321
+
+DATA 4 0xB8001000 0xB2210000
+DATA 1 0x80000233 0xda
+DATA 1 0x81000780 0xda
+DATA 1 0x81000400 0xda
+DATA 4 0xB8001000 0x82216080
+DATA 4 0x43FAC454 0x00001000
+
+DATA 4 0x53F80008 0x20034000
+
+# Enable the clocks
+DATA 4 0x53f8000c 0x1fffffff
+DATA 4 0x53f80010 0xffffffff
+DATA 4 0x53f80014 0xfdfff
diff --git a/board/freescale/mx25pdk/lowlevel_init.S b/board/freescale/mx25pdk/lowlevel_init.S
new file mode 100644
index 0000000..6e6810f
--- /dev/null
+++ b/board/freescale/mx25pdk/lowlevel_init.S
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2011 Freescale Semiconductor
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+.globl lowlevel_init
+lowlevel_init:
+
+ mov pc, lr
diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c
new file mode 100644
index 0000000..4a8352f
--- /dev/null
+++ b/board/freescale/mx25pdk/mx25pdk.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * Author: Fabio Estevam <fabio.estevam@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/imx25-pinmux.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ /* dram_init must store complete ramsize in gd->ram_size */
+ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+ PHYS_SDRAM_1_SIZE);
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ mx25_uart1_init_pins();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: MX25PDK\n");
+
+ return 0;
+}
diff --git a/board/freescale/mx31ads/mx31ads.c b/board/freescale/mx31ads/mx31ads.c
index 7637c92..4dd1e63 100644
--- a/board/freescale/mx31ads/mx31ads.c
+++ b/board/freescale/mx31ads/mx31ads.c
@@ -36,12 +36,6 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-}
-
int board_early_init_f(void)
{
int i;
@@ -105,7 +99,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX31ADS; /* board id for linux */
gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
return 0;
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
index f6e190a..276d451 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -47,12 +47,6 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-}
-
int board_early_init_f(void)
{
/* CS5: CPLD incl. network controller */
@@ -69,7 +63,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 94ea1f2..8da1ee8 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -403,7 +403,6 @@ int board_init(void)
{
system_rev = get_cpu_rev();
- gd->bd->bi_arch_number = MACH_TYPE_MX51_BABBAGE;
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c
index 6e3360b..c89da13 100644
--- a/board/freescale/mx53ard/mx53ard.c
+++ b/board/freescale/mx53ard/mx53ard.c
@@ -278,7 +278,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX53_ARD;
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c
index 81857ff..fd821c0 100644
--- a/board/freescale/mx53evk/mx53evk.c
+++ b/board/freescale/mx53evk/mx53evk.c
@@ -355,7 +355,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX53_EVK;
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index ade1006..156f8b5 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -288,7 +288,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX53_LOCO;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
return 0;
diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c
index 4a7ee55..776784f 100644
--- a/board/freescale/mx53smd/mx53smd.c
+++ b/board/freescale/mx53smd/mx53smd.c
@@ -214,7 +214,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX53_SMD;
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c
index 2279cc0..6a3777e 100644
--- a/board/isee/igep0020/igep0020.c
+++ b/board/isee/igep0020/igep0020.c
@@ -29,6 +29,7 @@
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/sys_proto.h>
+#include <asm/arch/omap_gpmc.h>
#include <asm/mach-types.h>
#include "igep0020.h"
diff --git a/board/isee/igep0020/igep0020.h b/board/isee/igep0020/igep0020.h
index c08d758..3d6e15f 100644
--- a/board/isee/igep0020/igep0020.h
+++ b/board/isee/igep0020/igep0020.h
@@ -29,15 +29,6 @@ const omap3_sysinfo sysinfo = {
"ONENAND",
};
-/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */
-#define NET_LAN9221_GPMC_CONFIG1 0x00001000
-#define NET_LAN9221_GPMC_CONFIG2 0x00080701
-#define NET_LAN9221_GPMC_CONFIG3 0x00020201
-#define NET_LAN9221_GPMC_CONFIG4 0x08030703
-#define NET_LAN9221_GPMC_CONFIG5 0x00060908
-#define NET_LAN9221_GPMC_CONFIG6 0x87030000
-#define NET_LAN9221_GPMC_CONFIG7 0x00000f6c
-
static void setup_net_chip(void);
/*
diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c
index ce75468..307ffd0 100644
--- a/board/karo/tx25/tx25.c
+++ b/board/karo/tx25/tx25.c
@@ -29,6 +29,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/imx25-pinmux.h>
#include <asm/gpio.h>
+#include <asm/arch/sys_proto.h>
static void mdelay(int n)
{
@@ -142,8 +143,6 @@ void tx25_fec_init(void)
int board_init()
{
#ifdef CONFIG_MXC_UART
- extern void mx25_uart1_init_pins(void);
-
mx25_uart1_init_pins();
#endif
/* board id for linux */
diff --git a/board/logicpd/imx31_litekit/imx31_litekit.c b/board/logicpd/imx31_litekit/imx31_litekit.c
index 09cc9c5..7214008 100644
--- a/board/logicpd/imx31_litekit/imx31_litekit.c
+++ b/board/logicpd/imx31_litekit/imx31_litekit.c
@@ -37,12 +37,6 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-}
-
int board_early_init_f(void)
{
__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
@@ -76,7 +70,6 @@ int board_early_init_f(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_MX31LITE; /* board id for linux */
gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
return 0;
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 4bbe1b8..850dfee 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -36,6 +36,7 @@
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
+#include <asm/arch/omap_gpmc.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include "overo.h"
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 68e1243..d394f90 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -33,15 +33,6 @@ const omap3_sysinfo sysinfo = {
#endif
};
-/* GPMC CS 5 connected to an SMSC LAN9221 ethernet controller */
-#define NET_LAN9221_GPMC_CONFIG1 0x00001000
-#define NET_LAN9221_GPMC_CONFIG2 0x00080701
-#define NET_LAN9221_GPMC_CONFIG3 0x00020201
-#define NET_LAN9221_GPMC_CONFIG4 0x08030703
-#define NET_LAN9221_GPMC_CONFIG5 0x00060908
-#define NET_LAN9221_GPMC_CONFIG6 0x87030000
-#define NET_LAN9221_GPMC_CONFIG7 0x00000f6c
-
/*
* IEN - Input Enable
* IDIS - Input Disable
@@ -128,7 +119,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\
MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\
MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nCS3*/\
- MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\
+ MUX_VAL(CP(GPMC_CLK), (IEN | PTU | EN | M0)) /*GPMC_CLK*/\
MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /*GPMC_nADV_ALE*/\
MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /*GPMC_nOE*/\
MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /*GPMC_nWE*/\
diff --git a/board/syteco/zmx25/zmx25.c b/board/syteco/zmx25/zmx25.c
index 893adc6..a89ee1a 100644
--- a/board/syteco/zmx25/zmx25.c
+++ b/board/syteco/zmx25/zmx25.c
@@ -117,8 +117,6 @@ int board_init()
writel(input_select1, &inputselect->i2c3_ipp_sda_in); /* I2C3 SDA */
writel(input_select2, &inputselect->i2c3_ipp_scl_in); /* I2C3 SCL */
- /* board id for linux */
- gd->bd->bi_arch_number = MACH_TYPE_ZMX25;
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
return 0;
@@ -188,9 +186,3 @@ int dram_init(void)
PHYS_SDRAM_SIZE);
return 0;
}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = gd->ram_size;
-}
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 533af5a..f50d113 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -128,7 +128,7 @@ int board_mmc_init(bd_t *bis)
}
#endif
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index 17a2558..ebca7b6 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -653,7 +653,6 @@ void lcd_enable(void)
int board_init(void)
{
- gd->bd->bi_arch_number = MACH_TYPE_TTC_VISION2; /* board id for linux */
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;